#include "jaguar.h"
#include "jerry.h"
#include "log.h"
-#include "m68k.h"
+#include "m68000/m68kinterface.h"
//#include "memory.h"
// Maybe it works like this: It acknowledges the 1st interrupt, but never clears it.
// So subsequent interrupts come into the chip, but they're never serviced but the
// I2S subsystem keeps going.
+// After some testing on real hardware, it seems that if you enable TIMER0 and EXTERNAL
+// IRQs on J_INT ($F10020), you don't have to run an I2S interrupt on the DSP. Also,
+// It seems that it's only stable for values of SCLK <= 9.
+// All of the preceeding is moot now; we run the DSP in the host audio IRQ. This means
+// that we don't actually need this stuff anymore. :-D
+#if 0
if (data & INT_ENA1) // I2S interrupt
{
int freq = GetCalculatedFrequency();
// WriteLog("DSP: Setting audio freqency to %u Hz...\n", freq);
DACSetNewFrequency(freq);
}
+#endif
/* if (IMASKCleared) // If IMASK was cleared,
#ifdef DSP_DEBUG_IRQ
// GPUSetIRQLine(GPUIRQ_DSP, ASSERT_LINE);
}
+bool DSPIsRunning(void)
+{
+ return (DSP_RUNNING ? true : false);
+}
+
void DSPInit(void)
{
// memory_malloc_secure((void **)&dsp_ram_8, 0x2000, "DSP work RAM");
dsp_build_branch_condition_table();
DSPReset();
- srandom(time(NULL)); // For randomizing local RAM
+ srand(time(NULL)); // For randomizing local RAM
}
void DSPReset(void)
// Contents of local RAM are quasi-stable; we simulate this by randomizing RAM contents
for(uint32 i=0; i<8192; i+=4)
{
- *((uint32 *)(&dsp_ram_8[i])) = random();
+ *((uint32 *)(&dsp_ram_8[i])) = rand();
}
}