.equr overhaul part 5: enabled .equr for all registers for all architectures

[rmac] / mach.c

diff --git a/mach.c b/mach.c
index 27123b2cd9308a3e9f06036044a05f1387c83c05..90c0412e05244a9a8feec5e2ec7f7a9535cbfc99 100644 (file)
--- a/mach.c
+++ b/mach.c
@@ -1,7 +1,7 @@
 //
-// RMAC - Reboot's Macro Assembler for all Atari computers
+// RMAC - Renamed Macro Assembler for all Atari computers
 // MACH.C - Code Generation
-// Copyright (C) 199x Landon Dyer, 2011-2020 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2021 Reboot and Friends
 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
 // Source utilised with the kind permission of Landon Dyer
 //
@@ -356,7 +356,7 @@ int m_lea(WORD inst, WORD siz)
                D_word(inst);
 
                if (optim_warn_flag)
-                       warn("lea size(An),An converted to addq #size,An");
+                       warn("o4: lea size(An),An converted to addq #size,An");
 
                return OK;
        }
@@ -471,7 +471,7 @@ int m_adda(WORD inst, WORD siz)
                                return m_addq(B16(01010000, 00000000), siz);
 
                                if (optim_warn_flag)
-                                       warn("adda/suba size(An),An converted to addq/subq #size,An");
+                                       warn("o8: adda/suba size(An),An converted to addq/subq #size,An");
                        }
                }
 
@@ -496,6 +496,8 @@ int m_adda(WORD inst, WORD siz)
                                optim_flags[OPT_LEA_ADDQ] = 1;                          // Temporarily save switch state
                                return_value = m_lea(B16(01000001, 11011000), SIZW);
                                optim_flags[OPT_LEA_ADDQ] = temp_flag;          // Restore switch state
+                               if (optim_warn_flag)
+                                       warn("o9: adda.w/l #x,Ay converted to lea x(Dy),Ay");
                                return return_value;
                        }
                }
@@ -755,7 +757,7 @@ int m_move(WORD inst, WORD size)
                m_moveq((WORD)0x7000, (WORD)0);
 
                if (optim_warn_flag)
-                       warn("move.l #size,dx converted to moveq");
+                       warn("o1: move.l #size,dx converted to moveq");
        }
        else
        {
@@ -796,6 +798,7 @@ int m_move(WORD inst, WORD size)
 int m_move30(WORD inst, WORD size)
 {
        int siz = (int)size;
+
        if (am0 > ABASE)
                inst |= siz_12[siz] | reg_9[a1reg & 7] | a0reg | extra_addressing[am0 - ABASE];
        else
@@ -916,7 +919,7 @@ int m_br(WORD inst, WORD siz)
                                D_word(inst);
 
                                if (optim_warn_flag)
-                                       warn("Bcc.w/BSR.w converted to .s");
+                                       warn("o2: Bcc.w/BSR.w converted to .s");
 
                                return OK;
                        }
@@ -1160,7 +1163,11 @@ int m_clrd(WORD inst, WORD siz)
        if (!CHECK_OPTS(OPT_CLR_DX))
                inst |= a0reg;
        else
+       {
                inst = (a0reg << 9) | B16(01110000, 00000000);
+               if (optim_warn_flag)
+                       warn("o7: clr.l Dx converted to moveq #0,Dx");
+       }
 
        D_word(inst);
 
@@ -2437,7 +2444,6 @@ int m_pload(WORD inst, WORD siz, WORD extension)
                        inst = 1;
                else
                        return error("illegal control register specified");
-
                break;
        case DREG:
                inst = (1 << 3) | a0reg;