- SET16(tom_ram_8, MEMCON1, 0x1861);
- SET16(tom_ram_8, MEMCON2, 0x0000);
- SET16(tom_ram_8, VMODE, 0x06C1);
- SET16(tom_ram_8, VP, 523);
- SET16(tom_ram_8, HP, 844);
- SET16(tom_ram_8, VS, 523 - 6);
- SET16(tom_ram_8, VBB, 434);
- SET16(tom_ram_8, VBE, 24);
- SET16(tom_ram_8, HBB, 689 + 0x400);
- SET16(tom_ram_8, HBE, 125);
-
- SET16(tom_ram_8, VDE, 2047);//65535);
- SET16(tom_ram_8, VDB, 28);
- SET16(tom_ram_8, HDB1, 166);
- SET16(tom_ram_8, HDE, 2047);//65535);
+
+ if (hardwareTypeNTSC)
+ {
+ SET16(tom_ram_8, MEMCON1, 0x1861);
+ SET16(tom_ram_8, MEMCON2, 0x35CC);
+ SET16(tom_ram_8, HP, 844); // Horizontal Period
+ SET16(tom_ram_8, HBB, 1713); // Horizontal Blank Begin
+ SET16(tom_ram_8, HBE, 125); // Horizontal Blank End
+ SET16(tom_ram_8, HDE, 1665); // Horizontal Display End
+ SET16(tom_ram_8, HDB1, 203); // Horizontal Display Begin 1
+ SET16(tom_ram_8, VP, 523); // Vertical Period (1-based; in this case VP = 524)
+ SET16(tom_ram_8, VBE, 24); // Vertical Blank End
+ SET16(tom_ram_8, VDB, 38); // Vertical Display Begin
+ SET16(tom_ram_8, VDE, 518); // Vertical Display End
+ SET16(tom_ram_8, VBB, 500); // Vertical Blank Begin
+ SET16(tom_ram_8, VS, 517); // Vertical Sync
+ SET16(tom_ram_8, VMODE, 0x06C1);
+ }
+ else // PAL Jaguar
+ {
+ SET16(tom_ram_8, MEMCON1, 0x1861);
+ SET16(tom_ram_8, MEMCON2, 0x35CC);
+ SET16(tom_ram_8, HP, 850); // Horizontal Period
+ SET16(tom_ram_8, HBB, 1711); // Horizontal Blank Begin
+ SET16(tom_ram_8, HBE, 158); // Horizontal Blank End
+ SET16(tom_ram_8, HDE, 1665); // Horizontal Display End
+ SET16(tom_ram_8, HDB1, 203); // Horizontal Display Begin 1
+ SET16(tom_ram_8, VP, 623); // Vertical Period (1-based; in this case VP = 624)
+ SET16(tom_ram_8, VBE, 34); // Vertical Blank End
+ SET16(tom_ram_8, VDB, 38); // Vertical Display Begin
+ SET16(tom_ram_8, VDE, 518); // Vertical Display End
+ SET16(tom_ram_8, VBB, 600); // Vertical Blank Begin
+ SET16(tom_ram_8, VS, 618); // Vertical Sync
+ SET16(tom_ram_8, VMODE, 0x06C1);
+ }