-uint8_t Slot6R(uint16_t address)
-{
-//WriteLog("Slot6R: address = %X\n", address & 0x0F);
-// HandleSlot6(address, 0);
-// return 0;
- uint8_t state = address & 0x0F;
-
- switch (state)
- {
- case 0x00:
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
- floppyDrive.ControlStepper(state);
- break;
- case 0x08:
- case 0x09:
- floppyDrive.ControlMotor(state & 0x01);
- break;
- case 0x0A:
- case 0x0B:
- floppyDrive.DriveEnable(state & 0x01);
- break;
- case 0x0C:
- return floppyDrive.ReadWrite();
- break;
- case 0x0D:
- return floppyDrive.GetLatchValue();
- break;
- case 0x0E:
- floppyDrive.SetReadMode();
- break;
- case 0x0F:
- floppyDrive.SetWriteMode();
- break;
- }
-
- return 0;
-}
-
-
-void Slot6W(uint16_t address, uint8_t byte)
-{
-//WriteLog("Slot6W: address = %X, byte= %X\n", address & 0x0F, byte);
-// HandleSlot6(address, byte);
- uint8_t state = address & 0x0F;
-
- switch (state)
- {
- case 0x00:
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
- floppyDrive.ControlStepper(state);
- break;
- case 0x08:
- case 0x09:
- floppyDrive.ControlMotor(state & 0x01);
- break;
- case 0x0A:
- case 0x0B:
- floppyDrive.DriveEnable(state & 0x01);
- break;
- case 0x0C:
- floppyDrive.ReadWrite();
- break;
- case 0x0D:
- floppyDrive.SetLatchValue(byte);
- break;
- case 0x0E:
- floppyDrive.SetReadMode();
- break;
- case 0x0F:
- floppyDrive.SetWriteMode();
- break;
- }
-}
-
-
-void HandleSlot6(uint16_t address, uint8_t byte)
-{
-}
-
-
-uint8_t MBRead(uint16_t address)
-{
-#if 1
- // Not sure [Seems to work OK]
- if (!slotCXROM)
- {
- return slot4Memory[address & 0x00FF];
- }
-#endif
-
- uint8_t regNum = address & 0x0F;
- uint8_t chipNum = (address & 0x80) >> 7;
-
-#if 0
- WriteLog("MBRead: address = %X [chip %d, reg %X, clock=$%X]\n", address & 0xFF, chipNum, regNum, GetCurrentV65C02Clock());
-#endif
-
- switch (regNum)
- {
- case 0x00:
- return mbvia[chipNum].orb & mbvia[chipNum].ddrb;
-
- case 0x01:
- return mbvia[chipNum].ora & mbvia[chipNum].ddra;
-
- case 0x02:
- return mbvia[chipNum].ddrb;
-
- case 0x03:
- return mbvia[chipNum].ddra;
-
- case 0x04:
- return mbvia[chipNum].timer1counter & 0xFF;
-
- case 0x05:
- return (mbvia[chipNum].timer1counter & 0xFF00) >> 8;
-
- case 0x06:
- return mbvia[chipNum].timer1latch & 0xFF;
-
- case 0x07:
- return (mbvia[chipNum].timer1latch & 0xFF00) >> 8;
-
- case 0x08:
- return mbvia[chipNum].timer2counter & 0xFF;
-
- case 0x09:
- return (mbvia[chipNum].timer2counter & 0xFF00) >> 8;
-
- case 0x0B:
- return mbvia[chipNum].acr;
-
- case 0x0D:
- return (mbvia[chipNum].ifr & 0x7F)
- | (mbvia[chipNum].ifr & 0x7F ? 0x80 : 0);
-
- case 0x0E:
- return mbvia[chipNum].ier | 0x80;
-
- default:
- WriteLog("Unhandled 6522 register %X read (chip %d)\n", regNum, chipNum);
- }
-
- return 0;
-}
-
-
-static uint8_t regLatch[2];
-void MBWrite(uint16_t address, uint8_t byte)
-{
- uint8_t regNum = address & 0x0F;
- uint8_t chipNum = (address & 0x80) >> 7;
-/*
-NOTES:
-bit 7 = L/R channel select (AY chip 1 versus AY chip 2)
- 0 = Left, 1 = Right
-
-Reg. B is connected to BC1, BDIR, RST' (bits 0, 1, 2)
-
-Left VIA IRQ line is tied to 6502 IRQ line
-Rght VIA IRQ line is tied to 6502 NMI line
-
-Register Function
--------- -------------------------
-0 Output Register B
-1 Output Register A
-2 Data Direction Register B
-3 Data Direction Register A
-4 Timer 1 Low byte counter (& latch)
-5 Timer 1 Hgh byte counter (& latch)
-6 Timer 1 Low byte latch
-7 Timer 1 Hgh byte latch (& reset IRQ flag)
-B Aux Control Register
-D Interrupt Flag Register
-E Interrupt Enable Register
-
-bit 6 of ACR is like so:
-0: Timed interrupt each time Timer 1 is loaded
-1: Continuous interrupts
-
-bit 7 enables PB7 (bit 6 controls output type):
-0: One shot output
-1: Square wave output
-
-
-*/
-#if 0
- WriteLog("MBWrite: address = %X, byte= %X [clock=$%X]", address & 0xFF, byte, GetCurrentV65C02Clock());
-
- if (regNum == 0)
- WriteLog("[OUTB -> %s%s%s]\n", (byte & 0x01 ? "BC1" : ""), (byte & 0x02 ? " BDIR" : ""), (byte & 0x04 ? " RST'" : ""));
- else if (regNum == 1)
- WriteLog("[OUTA -> %02X]\n", byte);
- else if (regNum == 2)
- WriteLog("[DDRB -> %02X]\n", byte);
- else if (regNum == 3)
- WriteLog("[DDRA -> %02X]\n", byte);
- else
- WriteLog("\n");
-#endif
-
- switch (regNum)
- {
- case 0x00:
- // Control of the AY-3-8912 is thru this port pretty much...
- mbvia[chipNum].orb = byte;
-
- if ((byte & 0x04) == 0)
-#ifdef USE_NEW_AY8910
- AYReset(chipNum);
-#else
- AY8910_reset(chipNum);
-#endif
- else if ((byte & 0x03) == 0x03)
- regLatch[chipNum] = mbvia[chipNum].ora;
- else if ((byte & 0x03) == 0x02)
-#ifdef USE_NEW_AY8910
- AYWrite(chipNum, regLatch[chipNum], mbvia[chipNum].ora);
-#else
- _AYWriteReg(chipNum, regLatch[chipNum], mbvia[chipNum].ora);
-#endif
-
- break;
-
- case 0x01:
- mbvia[chipNum].ora = byte;
- break;
-
- case 0x02:
- mbvia[chipNum].ddrb = byte;
- break;
-
- case 0x03:
- mbvia[chipNum].ddra = byte;
- break;
-
- case 0x04:
- mbvia[chipNum].timer1latch = (mbvia[chipNum].timer1latch & 0xFF00)
- | byte;
- break;
-
- case 0x05:
- mbvia[chipNum].timer1latch = (mbvia[chipNum].timer1latch & 0x00FF)
- | (((uint16_t)byte) << 8);
- mbvia[chipNum].timer1counter = mbvia[chipNum].timer1latch;
- mbvia[chipNum].ifr &= 0x3F; // Clear T1 interrupt flag
- break;
-
- case 0x06:
- mbvia[chipNum].timer1latch = (mbvia[chipNum].timer1latch & 0xFF00)
- | byte;
- break;
-
- case 0x07:
- mbvia[chipNum].timer1latch = (mbvia[chipNum].timer1latch & 0x00FF)
- | (((uint16_t)byte) << 8);
- mbvia[chipNum].ifr &= 0x3F; // Clear T1 interrupt flag
- break;
-
- case 0x0B:
- mbvia[chipNum].acr = byte;
- break;
-
- case 0x0D:
- mbvia[chipNum].ifr &= ~byte;
- break;
-
- case 0x0E:
- if (byte & 0x80)
- // Setting bits in the IER
- mbvia[chipNum].ier |= byte;
- else
- // Clearing bits in the IER
- mbvia[chipNum].ier &= ~byte;
-
- break;
- default:
- WriteLog("Unhandled 6522 register $%X write $%02X (chip %d)\n", regNum, byte, chipNum);
- }
-}
-
-