+// For tracebacks...
+// Ideally, we'd save all the registers as well...
+ pcQueue[pcQPtr++] = m68kPC;
+ pcQPtr &= 0x3FF;
+
+ if (m68kPC & 0x01) // Oops! We're fetching an odd address!
+ {
+ WriteLog("M68K: Attempted to execute from an odd adress!\n\nBacktrace:\n\n");
+
+ static char buffer[2048];
+ for(int i=0; i<0x400; i++)
+ {
+ m68k_disassemble(buffer, pcQueue[(pcQPtr + i) & 0x3FF], M68K_CPU_TYPE_68000);
+ WriteLog("\t%08X: %s\n", pcQueue[(pcQPtr + i) & 0x3FF], buffer);
+ }
+ WriteLog("\n");
+
+ uint32 topOfStack = m68k_get_reg(NULL, M68K_REG_A7);
+ WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack));
+ for(int i=0; i<10; i++)
+ WriteLog("%06X: %08X\n", topOfStack - (i * 4), JaguarReadLong(topOfStack - (i * 4)));
+ WriteLog("Jaguar: VBL interrupt is %s\n", ((tom_irq_enabled(IRQ_VBLANK)) && (jaguar_interrupt_handler_is_valid(64))) ? "enabled" : "disabled");
+ M68K_show_context();
+ log_done();
+ exit(0);
+ }
+
+/* if (m68kPC >= 0x807EC4 && m68kPC <= 0x807EDB)
+ {
+ static char buffer[2048];
+ m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
+ WriteLog("%08X: %s", m68kPC, buffer);
+ WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
+ m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
+ m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
+ }//*/
+/* if (m68kPC == 0x8D0E48 && effect_start5)
+ {
+ WriteLog("\nM68K: At collision detection code. Exiting!\n\n");
+ GPUDumpRegisters();
+ GPUDumpDisassembly();
+ log_done();
+ exit(0);
+ }//*/
+/* uint16 opcode = JaguarReadWord(m68kPC);
+ if (opcode == 0x4E75) // RTS
+ {
+ if (startMemLog)
+// WriteLog("Jaguar: Returning from subroutine to %08X\n", JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7)));
+ {
+ uint32 addr = JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7));
+ bool found = false;
+ if (raPtr != 0xFFFFFFFF)
+ {
+ for(uint32 i=0; i<=raPtr; i++)
+ {
+ if (returnAddr[i] == addr)
+ {
+ found = true;
+ break;
+ }
+ }
+ }
+
+ if (!found)
+ returnAddr[++raPtr] = addr;
+ }
+ }//*/
+