+//Problems: JR and any other instruction that relies on DSP_PC is getting WRONG values!
+//!!! FIX !!!
+// Should be fixed now. Another problem is figuring how to do the sequence following
+// a branch followed with the JR & JUMP instructions...
+//
+// There are two conflicting problems:
+
+/*
+F1B236: LOAD (R31), R03 [NCZ:000, R31=00F1CFDC, R03=00F14000] -> [NCZ:000, R03=00F1B084]
+F1B238: BCLR #3, R00 [NCZ:000, R00=00004039] -> [NCZ:000, R00=00004031]
+F1B23A: ADDQ #2, R03 [NCZ:000, R03=00F1B084] -> [NCZ:000, R03=00F1B086]
+F1B23C: SUBQ #1, R17 [NCZ:000, R17=00000040] -> [NCZ:000, R17=0000003F]
+F1B23E: MOVEI #$00F1CFE0, R31 [NCZ:000, R31=00F1CFDC] -> [NCZ:000, R31=00F1CFE0]
+F1B244: JR z, F1B254 [NCZ:000] Branch NOT taken.
+F1B246: BSET #10, R00 [NCZ:000, R00=00004031] -> [NCZ:000, R00=00004431]
+F1B248: MOVEI #$00F1A100, R01 [NCZ:000, R01=00F1A148] -> [NCZ:000, R01=00F1A100]
+F1B24E: STORE R00, (R01) [NCZ:000, R00=00004431, R01=00F1A100]
+DSP: Writing 00004431 to DSP_FLAGS by DSP...
+DSP: Finished interrupt.
+; Without pipeline effects, the value in R03 is erroneously read from bank 1 instead of
+; bank 0 (where is was prepared)!
+F1B250: JUMP T, (R03) [NCZ:001, R03=00000000] Branched!
+F1B252: NOP [NCZ:001]
+*/
+
+// The other is when you see this at the end of an IRQ:
+
+/*
+JUMP T, (R29) ; R29 = Previous stack + 2
+STORE R28, (R30) ; R28 = Modified flags register, R30 = $F1A100
+
+; Actually, this is OK if we do the atomic JUMP/JR operation correctly:
+; 1) The STORE goes through the pipeline and is executed/written back
+; 2) The pipeline is flushed
+; 3) The DSP_PC is set to the new address
+; 4) Execution resumes
+
+JUMP T, (R25) ; Oops! Because of pipeline effects R25 has the value from
+ ; bank 0 instead of the current bank 1 and so goes astray!
+*/
+
+//One other thing: Since these stages are supposed to happen simulaneously, try executing
+//them in reverse order to see if that reduces pipeline stalls from late writebacks...
+
+
+/*
+Small problem here: The return address when INT0 comes up is $F1B088, but when INT1
+follows it, the JUMP out of the previous interrupt is bypassed immediately--this is
+because the STORE instruction writes back on stage #2 of the pipeline instead of stage #3...
+If it were done properly, the STORE write back would occur *after* (well, technically,
+during) the execution of the the JUMP that follows it.
+
+!!! FIX !!!
+
+F1B08A: JR z, F1B082 [NCZ:001] Branched!
+F1B08A: NOP [NCZ:001]
+[STALL...]
+F1B080: MOVEI #$00F1B178, R00 [NCZ:001, R00=00F1B178] -> [NCZ:001, R00=00F1B178]
+[STALL...]
+[STALL...]
+F1B086: LOAD (R00), R01 [NCZ:001, R00=00F1B178, R01=00000000] -> [NCZ:001, R01=00000000]
+[STALL...]
+[STALL...]
+F1B088: OR R01, R01 [NCZ:001, R01=00000000, R01=00000000] -> [NCZ:001, R01=00000000, R01=00000000]
+F1B08A: JR z, F1B082 [NCZ:001] Branched!
+F1B08A: NOP [NCZ:001]
+[STALL...]
+F1B080: MOVEI #$00F1B178, R00 [NCZ:001, R00=00F1B178] -> [NCZ:001, R00=00F1B178]
+[STALL...]
+[STALL...]
+Write to DSP CTRL: 00002301 --> Starting to run at 00F1B088 by M68K...
+DSP: CPU -> DSP interrupt
+DSP: Generating interrupt #0... [PC will return to 00F1B088, R31 = 00F1CFE0]
+Write to DSP CTRL: 00000001 --> Starting to run at 00F1B000 by M68K...
+[STALL...]
+F1B000: MOVEI #$00F1B0D4, R30 [NCZ:001, R30=00F1B000] -> [NCZ:001, R30=00F1B0D4]
+[STALL...]
+[STALL...]
+F1B006: JUMP T, (R30) [NCZ:001, R30=00F1B0D4] Branched!
+F1B006: NOP [NCZ:001]
+[STALL...]
+F1B0D4: MOVEI #$00F1A100, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1A100]
+[STALL...]
+[STALL...]
+F1B0DA: LOAD (R01), R00 [NCZ:001, R01=00F1A100, R00=00004431] -> [NCZ:001, R00=00004039]
+F1B0DC: MOVEI #$00F1B0C8, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1B0C8]
+[STALL...]
+[STALL...]
+F1B0E2: LOAD (R01), R02 [NCZ:001, R01=00F1B0C8, R02=00000000] -> [NCZ:001, R02=00000001]
+F1B0E4: MOVEI #$00F1B0CC, R01 [NCZ:001, R01=00F1B0C8] -> [NCZ:001, R01=00F1B0CC]
+[STALL...]
+[STALL...]
+F1B0EA: LOAD (R01), R03 [NCZ:001, R01=00F1B0CC, R03=00F1B086] -> [NCZ:001, R03=00000064]
+F1B0EC: MOVEI #$00F1B0D0, R01 [NCZ:001, R01=00F1B0CC] -> [NCZ:001, R01=00F1B0D0]
+[STALL...]
+[STALL...]
+F1B0F2: LOAD (R01), R04 [NCZ:001, R01=00F1B0D0, R04=00000000] -> [NCZ:001, R04=00000008]
+F1B0F4: MOVEI #$00F1B0BC, R01 [NCZ:001, R01=00F1B0D0] -> [NCZ:001, R01=00F1B0BC]
+[STALL...]
+[STALL...]
+F1B0FA: ADD R04, R01 [NCZ:001, R04=00000008, R01=00F1B0BC] -> [NCZ:000, R04=00000008, R01=00F1B0C4]
+[STALL...]
+[STALL...]
+F1B0FC: LOAD (R01), R01 [NCZ:000, R01=00F1B0C4, R01=00F1B0C4] -> [NCZ:000, R01=00F1B12E]
+[STALL...]
+[STALL...]
+F1B0FE: JUMP T, (R01) [NCZ:000, R01=00F1B12E] Branched!
+F1B0FE: NOP [NCZ:000]
+[STALL...]
+F1B12E: MOVE R02, R08 [NCZ:000, R02=00000001, R08=00000000] -> [NCZ:000, R02=00000001, R08=00000001]
+[STALL...]
+[STALL...]
+F1B132: MOVEI #$00F1B102, R01 [NCZ:000, R01=00F1B12E] -> [NCZ:000, R01=00F1B102]
+[STALL...]
+[STALL...]
+F1B138: JUMP T, (R01) [NCZ:000, R01=00F1B102] Branched!
+F1B138: NOP [NCZ:000]
+[STALL...]
+F1B102: MOVEI #$00F1B0C8, R01 [NCZ:000, R01=00F1B102] -> [NCZ:000, R01=00F1B0C8]
+[STALL...]
+[STALL...]
+F1B108: STORE R08, (R01) [NCZ:000, R08=00000000, R01=00F1B0C8]
+F1B10A: MOVEI #$00F1B0D0, R01 [NCZ:000, R01=00F1B0C8] -> [NCZ:000, R01=00F1B0D0]
+F1B110: MOVEQ #0, R04 [NCZ:000, R04=00000008] -> [NCZ:000, R04=00000000]
+[STALL...]
+[STALL...]
+F1B112: STORE R04, (R01) [NCZ:000, R04=00000000, R01=00F1B0D0]
+F1B114: BCLR #3, R00 [NCZ:000, R00=00004039] -> [NCZ:000, R00=00004031]
+[STALL...]
+[STALL...]
+F1B116: BSET #9, R00 [NCZ:000, R00=00004031] -> [NCZ:000, R00=00004231]
+F1B118: LOAD (R31), R04 [NCZ:000, R31=00F1CFDC, R04=00000000] -> [NCZ:000, R04=00F1B086]
+F1B11A: MOVEI #$00F1CFE0, R31 [NCZ:000, R31=00F1CFDC] -> [NCZ:000, R31=00F1CFE0]
+[STALL...]
+F1B120: ADDQ #2, R04 [NCZ:000, R04=00F1B086] -> [NCZ:000, R04=00F1B088]
+F1B122: MOVEI #$00F1A100, R01 [NCZ:000, R01=00F1B0D0] -> [NCZ:000, R01=00F1A100]
+[STALL...]
+[STALL...]
+F1B128: STORE R00, (R01) [NCZ:000, R00=00004231, R01=00F1A100]
+DSP: Writing 00004231 to DSP_FLAGS by DSP (REGPAGE is set)...
+DSP: Finished interrupt.
+DSP: Generating interrupt #1... [PC will return to 00F1B12A, R31 = 00F1CFE0]
+[STALL...]
+F1B010: MOVEI #$00F1B1FC, R30 [NCZ:001, R30=00F1B010] -> [NCZ:001, R30=00F1B1FC]
+[STALL...]
+[STALL...]
+F1B016: JUMP T, (R30) [NCZ:001, R30=00F1B1FC] Branched!
+F1B016: NOP [NCZ:001]
+[STALL...]
+F1B1FC: MOVEI #$00F1A100, R01 [NCZ:001, R01=00F1A100] -> [NCZ:001, R01=00F1A100]
+*/
+
+uint32 pcQueue1[0x400];
+uint32 pcQPtr1 = 0;