+// Need to set up defaults that the BIOS sets for the SSI here in DACInit()... !!! FIX !!!
+// or something like that... Seems like it already does, but it doesn't seem to
+// work correctly...! Perhaps just need to set up SSI stuff so BUTCH doesn't get
+// confused...
+
+// ALSO: Need to implement some form of proper locking to replace the clusterfuck
+// that is the current spinlock implementation. Since the DSP is a separate
+// entity, could we get away with running it in the sound IRQ?
+
+// After testing on a real Jaguar, it seems clear that the I2S interrupt drives
+// the audio subsystem. So while you can drive the audio at a *slower* rate than
+// set by SCLK, you can't drive it any *faster*. Also note, that if the I2S
+// interrupt is not enabled/running on the DSP, then there is no audio. Also,
+// audio can be muted by clearing bit 8 of JOYSTICK (JOY1).
+//
+// Approach: We can run the DSP in the host system's audio IRQ, by running the
+// DSP for the alloted time (depending on the host buffer size & sample rate)
+// by simply reading the L/R_I2S (L/RTXD) registers at regular intervals. We
+// would also have to time the I2S/TIMER0/TIMER1 interrupts in the DSP as well.
+// This way, we can run the host audio IRQ at, say, 48 KHz and not have to care
+// so much about SCLK and running a separate buffer and all the attendant
+// garbage that comes with that awful approach.
+//
+// There would still be potential gotchas, as the SCLK can theoretically drive
+// the I2S at 26590906 / 2 (for SCLK == 0) = 13.3 MHz which corresponds to an
+// audio rate 416 KHz (dividing the I2S rate by 32, for 16-bit stereo). It
+// seems doubtful that anything useful could come of such a high rate, and we
+// can probably safely ignore any such ridiculously high audio rates. It won't
+// sound the same as on a real Jaguar, but who cares? :-)
+