- bool via1T1HitZero = (mbvia[0].timer1counter <= cycles ? true : false);
- bool via2T1HitZero = (mbvia[1].timer1counter <= cycles ? true : false);
-
- mbvia[0].timer1counter -= cycles;
- mbvia[0].timer2counter -= cycles;
- mbvia[1].timer1counter -= cycles;
- mbvia[1].timer2counter -= cycles;
-
- if (via1T1HitZero)
- {
- if (mbvia[0].acr & 0x40)
- {
- mbvia[0].timer1counter += mbvia[0].timer1latch;
-
- if (mbvia[0].ier & 0x40)
- {
- mbvia[0].ifr |= (0x80 | 0x40);
- mainCPU.cpuFlags |= V65C02_ASSERT_LINE_IRQ;
- }
- }
- else
- {
- mbvia[0].ier &= 0x3F; // Disable T1 interrupt (VIA #1)
- }
- }
-
- if (via2T1HitZero)
- {
- if (mbvia[1].acr & 0x40)
- {
- mbvia[1].timer1counter += mbvia[1].timer1latch;
-
- if (mbvia[1].ier & 0x40)
- {
- mbvia[1].ifr |= (0x80 | 0x40);
- mainCPU.cpuFlags |= V65C02_ASSERT_LINE_NMI;
- }
- }
- else
- {
- mbvia[1].ier &= 0x3F; // Disable T1 interrupt (VIA #2)
- }
- }