//
-// RMAC - Reboot's Macro Assembler for the Atari Jaguar Console System
+// RMAC - Renamed Macro Assembler for all Atari computers
// RISCA.C - GPU/DSP Assembler
-// Copyright (C) 199x Landon Dyer, 2011 Reboot and Friends
+// Copyright (C) 199x Landon Dyer, 2011-2021 Reboot and Friends
// RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
// Source utilised with the kind permission of Landon Dyer
//
#include "riscasm.h"
+#include "amode.h"
+#include "direct.h"
#include "error.h"
-#include "sect.h"
-#include "token.h"
#include "expr.h"
-#include "direct.h"
#include "mark.h"
-#include "amode.h"
+#include "procln.h"
+#include "rmac.h"
+#include "sect.h"
+#include "token.h"
#define DEF_MR // Declare keyword values
#include "risckw.h" // Incl. generated risc keywords
-#define DEF_KW // Declare keyword values
+#define DEF_KW // Declare keyword values
#include "kwtab.h" // Incl. generated keyword tables & defs
+#define MAXINTERNCC 26 // Maximum internal condition codes
+
unsigned altbankok = 0; // Ok to use alternate register bank
-unsigned orgactive = 0; // RISC org directive active
+unsigned orgactive = 0; // RISC/6502 org directive active
unsigned orgaddr = 0; // Org'd address
unsigned orgwarning = 0; // Has an ORG warning been issued
int lastOpcode = -1; // Last RISC opcode assembled
+uint8_t riscImmTokenSeen; // The '#' (immediate) token was seen
-const char reg_err[] = "missing register R0...R31";
+static const char reg_err[] = "missing register R0...R31";
-// Jaguar Jump Condition Names
-const char condname[MAXINTERNCC][5] = {
+// Jaguar jump condition names
+static const char condname[MAXINTERNCC][5] = {
"NZ", "Z", "NC", "NCNZ", "NCZ", "C", "CNZ", "CZ", "NN", "NNNZ", "NNZ",
"N", "N_NZ", "N_Z", "T", "A", "NE", "EQ", "CC", "HS", "HI", "CS", "LO",
"PL", "MI", "F"
};
-// Jaguar Jump Condition Numbers
-const char condnumber[] = {
+// Jaguar jump condition numbers
+static const char condnumber[] = {
1, 2, 4, 5, 6, 8, 9, 10, 20, 21, 22, 24, 25, 26,
0, 0, 1, 2, 4, 4, 5, 8, 8, 20, 24, 31
};
-const struct opcoderecord roptbl[] = {
+// Opcode Specific Data
+struct opcoderecord {
+ uint16_t state; // Opcode Name (unused)
+ uint16_t type; // Opcode Type
+ uint16_t param; // Opcode Parameter
+};
+
+static const struct opcoderecord roptbl[] = {
{ MR_ADD, RI_TWO, 0 },
{ MR_ADDC, RI_TWO, 1 },
{ MR_ADDQ, RI_NUM_32, 2 },
{ MR_NORMI, RI_TWO, 56 },
{ MR_NOP, RI_NONE, 57 },
{ MR_SAT24, RI_ONE, 62 },
- { MR_UNPACK, RI_ONE, 63 + GPUONLY },
- { MR_PACK, RI_ONE, 63 + GPUONLY },
+ { MR_UNPACK, RI_ONE, 63 + GPUONLY | (0 << 6) },
+ { MR_PACK, RI_ONE, 63 + GPUONLY | (1 << 6) },
{ MR_ADDQMOD, RI_NUM_32, 63 + DSPONLY },
{ MR_MOVE, RI_MOVE, 0 },
{ MR_LOAD, RI_LOAD, 0 },
{ MR_STORE, RI_STORE, 0 }
};
+#define MALF_NUM 0
+#define MALF_EXPR 1
+#define MALF_LPAREN 2
+#define MALF_RPAREN 3
+
+static const char malform1[] = "missing '#'";
+static const char malform2[] = "bad expression";
+static const char malform3[] = "missing ')'";
+static const char malform4[] = "missing '('";
+
+static const char * malformErr[] = {
+ malform1, malform2, malform3, malform4
+};
+
//
-// Convert a string to uppercase
+// Function to return "malformed expression" error
+// This is done mainly to remove a bunch of GOTO statements in the parser
//
-void strtoupper(char * s)
+static inline int MalformedOpcode(int signal)
{
- while (*s)
- *s++ &= 0xDF;
+ return error("Malformed opcode, %s", malformErr[signal]);
}
//
-// Function to return "malformed expression" error
-// This is done mainly to remove a bunch of GOTO statements in the parser
+// Function to return "Illegal Indexed Register" error
+// Anyone trying to index something other than R14 or R15
//
-static inline int MalformedOpcode(int signal)
+static inline int IllegalIndexedRegister(int reg)
{
- char buf[16];
- sprintf(buf, "%02X", signal);
- return errors("Malformed opcode [internal $%s]", buf);
+ return error("Attempted index reference with non-indexable register (r%d)", reg - KW_R0);
}
//
-// Build RISC instruction word
+// Function to return "Illegal Indexed Register" error for EQUR scenarios
+// Trying to use register value within EQUR that isn't 14 or 15
//
-void BuildRISCIntructionWord(unsigned short opcode, int reg1, int reg2)
+static inline int IllegalIndexedRegisterEqur(SYM * sy)
+{
+ return error("Attempted index reference with non-indexable register within EQUR (%s = r%d)", sy->sname, sy->svalue);
+}
+
+
+//
+// Build up & deposit RISC instruction word
+//
+static void DepositRISCInstructionWord(uint16_t opcode, int reg1, int reg2)
{
// Check for absolute address setting
if (!orgwarning && !orgactive)
{
-// warn("GPU/DSP code outside of absolute section");
warn("RISC code generated with no origin defined");
orgwarning = 1;
}
//
-// Get a RISC register
+// Evaluate the RISC register from the token stream. Passed in value is the
+// FIXUP attribute to use if the expression comes back as undefined.
//
-int GetRegister(WORD rattr)
+static int EvaluateRegisterFromTokenStream(uint32_t attr)
{
- VALUE eval; // Expression value
+ uint64_t eval; // Expression value
WORD eattr; // Expression attributes
SYM * esym; // External symbol involved in expr.
TOKEN r_expr[EXPRSIZE]; // Expression token list
// Evaluate what's in the global "tok" buffer
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- // Hmm, the evaluator should report the error to us...
-// return MalformedOpcode(0x00);
return ERROR;
- if ((challoc - ch_size) < 4)
- chcheck(4L);
-
if (!(eattr & DEFINED))
{
- AddFixup((WORD)(FU_WORD | rattr), sloc, r_expr);
+ AddFixup(FU_WORD | attr, sloc, r_expr);
return 0;
}
// If we got a register in range (0-31), return it
- if ((eval >= 0) && (eval <= 31))
- return eval;
+ if (eval <= 31)
+ return (int)eval;
// Otherwise, it's out of range & we flag an error
return error(reg_err);
SYM * sy;
int i, commaFound;
TOKEN * t;
- WORD attrflg;
+ uint16_t attrflg;
int indexed; // Indexed register flag
- VALUE eval; // Expression value
- WORD eattr; // Expression attributes
- SYM * esym; // External symbol involved in expr.
+ uint64_t eval; // Expression value
+ uint16_t eattr; // Expression attributes
+ SYM * esym = NULL; // External symbol involved in expr.
TOKEN r_expr[EXPRSIZE]; // Expression token list
// Get opcode parameter and type
- unsigned short parm = (WORD)(roptbl[state - 3000].parm);
- unsigned type = roptbl[state - 3000].typ;
+ uint16_t parm = roptbl[state - 3000].param;
+ uint16_t type = roptbl[state - 3000].type;
+ riscImmTokenSeen = 0; // Set to "token not seen yet"
// Detect whether the opcode parmeter passed determines that the opcode is
// specific to only one of the RISC processors and ensure it is legal in
// No operand instructions
// NOP (57)
case RI_NONE:
- BuildRISCIntructionWord(parm, 0, 0);
+ DepositRISCInstructionWord(parm, 0, 0);
break;
// Single operand instructions (Rd)
- // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S, UNPACK
+ // ABS, MIRROR, NEG, NOT, PACK, RESMAC, SAT8, SAT16, SAT16S, SAT24, SAT32S,
+ // UNPACK
case RI_ONE:
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, parm >> 6, reg2);
- break;
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, parm >> 6, reg2);
+ break;
// Two operand instructions (Rs,Rd)
- // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT, MMULT,
- // MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
- case RI_TWO:
+ // ADD, ADDC, AND, CMP, DIV, IMACN, IMULT, IMULTN, MOVEFA, MOVETA, MULT,
+ // MMULT, MTOI, NORMI, OR, ROR, SH, SHA, SUB, SUBC, XOR
+ case RI_TWO:
if (parm == 37)
altbankok = 1; // MOVEFA
- reg1 = GetRegister(FU_REGONE);
- CHECK_COMMA;
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
+ CHECK_COMMA;
if (parm == 36)
altbankok = 1; // MOVETA
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, reg1, reg2);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg1, reg2);
break;
// Numeric operand (n,Rd) where n = -16..+15
case RI_NUM_31:
// Numeric operand (n,Rd) where n = 1..32
- // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ, RORQ
+ // ADDQ, ADDQMOD, ADDQT, SHARQ, SHLQ, SHRQ, SUBQ, SUBQMOD, SUBQT, ROLQ,
+ // RORQ
case RI_NUM_32:
switch (type)
{
attrflg |= FU_SUB32;
if (*tok != '#')
- return MalformedOpcode(0x01);
+ return MalformedOpcode(MALF_NUM);
tok++;
+ riscImmTokenSeen = 1;
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- return MalformedOpcode(0x02);
-
- if ((challoc - ch_size) < 4)
- chcheck(4L);
+ return MalformedOpcode(MALF_EXPR);
if (!(eattr & DEFINED))
{
}
else
{
- if ((int)eval < reg1 || (int)eval > reg2)
- return error("constant out of range");
+ if (esym && (esym->sattre & EQUATEDREG))
+ return error("equated register seen for immediate value");
+
+ if (eattr & RISCREG)
+ return error("register seen for immediate value");
- if (parm & SUB32)
- reg1 = 32 - eval;
+ if (((int)eval < reg1) || ((int)eval > reg2))
+ return error("constant out of range (%d to %d)", reg1, reg2);
+
+ if (parm & SUB32)
+ reg1 = 32 - (int)eval;
else if (type == RI_NUM_32)
- reg1 = (reg1 == 32 ? 0 : eval);
+ reg1 = (reg1 == 32 ? 0 : (int)eval);
else
- reg1 = eval;
+ reg1 = (int)eval;
}
CHECK_COMMA;
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, reg1, reg2);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg1, reg2);
break;
// Move Immediate--n,Rn--n in Second Word
case RI_MOVEI:
if (*tok != '#')
- return MalformedOpcode(0x03);
+ return MalformedOpcode(MALF_NUM);
tok++;
+ riscImmTokenSeen = 1;
+
+ // Check for equated register after # and return error if so
+ if (*tok == SYMBOL)
+ {
+ sy = lookup(string[tok[1]], LABEL, 0);
+
+ if (sy && (sy->sattre & EQUATEDREG))
+ return error("equated register in 1st operand of MOVEI instruction");
+ }
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- return MalformedOpcode(0x04);
+ return MalformedOpcode(MALF_EXPR);
- if (lastOpcode == RI_JUMP || lastOpcode == RI_JR)
+ if ((lastOpcode == RI_JUMP) || (lastOpcode == RI_JR))
{
if (legacy_flag)
{
// User doesn't care, emit a NOP to fix
- BuildRISCIntructionWord(57, 0, 0);
+ DepositRISCInstructionWord(57, 0, 0);
warn("MOVEI following JUMP, inserting NOP to fix your BROKEN CODE");
}
else
warn("MOVEI immediately follows JUMP");
}
- if ((challoc - ch_size) < 4)
- chcheck(4L);
-
if (!(eattr & DEFINED))
{
AddFixup(FU_LONG | FU_MOVEI, sloc + 2, r_expr);
else
{
if (eattr & TDB)
-//{
-//printf("risca: Doing rmark for RI_MOVEI (tdb=$%X)...\n", eattr & TDB);
- rmark(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
-//}
+ MarkRelocatable(cursect, sloc + 2, (eattr & TDB), (MLONG | MMOVEI), NULL);
}
- val = ((eval >> 16) & 0x0000FFFF) | ((eval << 16) & 0xFFFF0000);
CHECK_COMMA;
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- D_word((((parm & 0x3F) << 10) + reg2));
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+
+ DepositRISCInstructionWord(parm, 0, reg2);
+ val = WORDSWAP32(eval);
D_long(val);
break;
else
{
parm = 34;
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
}
CHECK_COMMA;
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, reg1, reg2);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg1, reg2);
break;
// (Rn),Rn = 41 / (R14/R15+n),Rn = 43/44 / (R14/R15+Rn),Rn = 58/59
- case RI_LOAD:
+ case RI_LOAD:
indexed = 0;
parm = 41;
if (*tok != '(')
- return MalformedOpcode(0x05);
+ return MalformedOpcode(MALF_LPAREN);
tok++;
- if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
- indexed = (*tok - KW_R0);
+ if ((tok[1] == '+') || (tok[1] == '-'))
+ {
+ // Trying to make indexed call
+ if ((*tok == KW_R14) || (*tok == KW_R15))
+ indexed = (*tok - KW_R0);
+ else
+ return IllegalIndexedRegister(*tok);
+ }
if (*tok == SYMBOL)
{
-// sy = lookup((char *)tok[1], LABEL, 0);
sy = lookup(string[tok[1]], LABEL, 0);
if (!sy)
if (sy->sattre & EQUATEDREG)
{
- if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
- && (*(tok + 2) != ')'))
+ if ((tok[2] == '+') || (tok[2] == '-'))
{
- indexed = (sy->svalue & 0x1F);
- tok++;
+ if ((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15) {
+ indexed = (sy->svalue & 0x1F);
+ tok++;
+ }
+ else
+ return IllegalIndexedRegisterEqur(sy);
}
}
}
if (!indexed)
{
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
}
else
{
parm = (WORD)(reg1 - 14 + 58);
tok++;
- if (*tok >= KW_R0 && *tok <= KW_R31)
+ if ((*tok >= KW_R0) && (*tok <= KW_R31))
indexed = 1;
if (*tok == SYMBOL)
{
-// sy = lookup((char *)tok[1], LABEL, 0);
sy = lookup(string[tok[1]], LABEL, 0);
if (!sy)
if (indexed)
{
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
}
else
{
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- return MalformedOpcode(0x06);
-
- if ((challoc - ch_size) < 4)
- chcheck(4L);
+ return MalformedOpcode(MALF_EXPR);
if (!(eattr & DEFINED))
return error("constant expected after '+'");
- reg1 = eval;
+ reg1 = (int)eval;
if (reg1 == 0)
{
}
else
{
- if (reg1 < 1 || reg1 > 32)
- return error("constant in LOAD out of range");
+ if ((reg1 < 1) || (reg1 > 32))
+ return error("constant in LOAD out of range (1-32)");
if (reg1 == 32)
reg1 = 0;
}
else
{
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
}
}
if (*tok != ')')
- return MalformedOpcode(0x07);
+ return MalformedOpcode(MALF_RPAREN);
tok++;
CHECK_COMMA;
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, reg1, reg2);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg1, reg2);
break;
// Rn,(Rn) = 47 / Rn,(R14/R15+n) = 49/50 / Rn,(R14/R15+Rn) = 60/61
- case RI_STORE:
+ case RI_STORE:
parm = 47;
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
CHECK_COMMA;
if (*tok != '(')
- return MalformedOpcode(0x08);
+ return MalformedOpcode(MALF_LPAREN);
tok++;
indexed = 0;
- if ((*tok == KW_R14 || *tok == KW_R15) && (*(tok + 1) != ')'))
- indexed = (*tok - KW_R0);
+ if (((*tok == KW_R14) || (*tok == KW_R15)) && (tok[1] != ')'))
+ indexed = *tok - KW_R0;
if (*tok == SYMBOL)
{
return ERROR;
}
- if (sy->sattre & EQUATEDREG)
+ if (sy->sattre & EQUATEDREG)
{
if (((sy->svalue & 0x1F) == 14 || (sy->svalue & 0x1F) == 15)
- && (*(tok + 2) != ')'))
+ && (tok[2] != ')'))
{
indexed = (sy->svalue & 0x1F);
tok++;
if (!indexed)
{
- reg2 = GetRegister(FU_REGTWO);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
}
else
{
parm = (WORD)(reg2 - 14 + 60);
tok++;
- if (*tok >= KW_R0 && *tok <= KW_R31)
+ if ((*tok >= KW_R0) && (*tok <= KW_R31))
indexed = 1;
if (*tok == SYMBOL)
if (indexed)
{
- reg2 = GetRegister(FU_REGTWO);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
}
else
{
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- return MalformedOpcode(0x09);
-
- if ((challoc - ch_size) < 4)
- chcheck(4L);
+ return MalformedOpcode(MALF_EXPR);
if (!(eattr & DEFINED))
{
}
else
{
- reg2 = eval;
+ reg2 = (int)eval;
if (reg2 == 0)
{
}
else
{
- if (reg2 < 1 || reg2 > 32)
- return error("constant in STORE out of range");
+ if ((reg2 < 1) || (reg2 > 32))
+ return error("constant in STORE out of range (1-32)");
if (reg2 == 32)
reg2 = 0;
}
else
{
- reg2 = GetRegister(FU_REGTWO);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
}
}
if (*tok != ')')
- return MalformedOpcode(0x0A);
+ return MalformedOpcode(MALF_RPAREN);
tok++;
- at_eol();
- BuildRISCIntructionWord(parm, reg2, reg1);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg2, reg1);
break;
// LOADB/LOADP/LOADW (Rn),Rn
- case RI_LOADN:
+ case RI_LOADN:
if (*tok != '(')
- return MalformedOpcode(0x0B);
+ return MalformedOpcode(MALF_LPAREN);
tok++;
- reg1 = GetRegister(FU_REGONE);
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
if (*tok != ')')
- return MalformedOpcode(0x0C);
+ return MalformedOpcode(MALF_RPAREN);
tok++;
CHECK_COMMA;
- reg2 = GetRegister(FU_REGTWO);
- at_eol();
- BuildRISCIntructionWord(parm, reg1, reg2);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg1, reg2);
break;
// STOREB/STOREP/STOREW Rn,(Rn)
- case RI_STOREN:
- reg1 = GetRegister(FU_REGONE);
+ case RI_STOREN:
+ reg1 = EvaluateRegisterFromTokenStream(FU_REGONE);
CHECK_COMMA;
if (*tok != '(')
- return MalformedOpcode(0x0D);
+ return MalformedOpcode(MALF_LPAREN);
tok++;
- reg2 = GetRegister(FU_REGTWO);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
if (*tok != ')')
- return MalformedOpcode(0x0E);
+ return MalformedOpcode(MALF_RPAREN);
tok++;
- at_eol();
- BuildRISCIntructionWord(parm, reg2, reg1);
+ ErrorIfNotAtEOL();
+ DepositRISCInstructionWord(parm, reg2, reg1);
break;
// Jump Relative - cc,n - n=-16..+15 words, reg2=cc
{
if (*tok == CONST)
{
- // CC using a constant number
- tok++;
- val = *tok;
- tok++;
+ // CC using a constant number (O_o)
+ PTR tp;
+ tp.tk = tok + 1;
+ val = *tp.i64++;
+ tok = tp.tk;
CHECK_COMMA;
}
else if (*tok == SYMBOL)
{
- val = 99;
-// strcpy(scratch, (char *)tok[1]);
+ val = 9999;
strcpy(scratch, string[tok[1]]);
strtoupper(scratch);
}
// Standard CC was not found, look for an equated one
- if (val == 99)
+ if (val == 9999)
{
-// ccsym = lookup((char *)tok[1], LABEL, 0);
ccsym = lookup(string[tok[1]], LABEL, 0);
if (ccsym && (ccsym->sattre & EQUATEDCC) && !(ccsym->sattre & UNDEF_CC))
- {
- val = ccsym->svalue;
- }
+ val = (int)ccsym->svalue;
else
return error("unknown condition code");
}
val = 0;
}
- if (val < 0 || val > 31)
+ if ((val < 0) || (val > 31))
return error("condition constant out of range");
// Store condition code
{
// JR cc,n
if (expr(r_expr, &eval, &eattr, &esym) != OK)
- return MalformedOpcode(0x0F);
-
- if ((challoc - ch_size) < 4)
- chcheck(4L);
+ return MalformedOpcode(MALF_EXPR);
if (!(eattr & DEFINED))
{
reg2 = ((int)(eval - ((orgactive ? orgaddr : sloc) + 2))) / 2;
if ((reg2 < -16) || (reg2 > 15))
- error("PC relative overflow");
+ error("PC relative overflow in JR (outside of -16 to 15)");
}
-
- BuildRISCIntructionWord(parm, reg2, reg1);
}
else
{
// JUMP cc, (Rn)
if (*tok != '(')
- return MalformedOpcode(0x10);
+ return MalformedOpcode(MALF_LPAREN);
tok++;
- reg2 = GetRegister(FU_REGTWO);
+ reg2 = EvaluateRegisterFromTokenStream(FU_REGTWO);
if (*tok != ')')
- return MalformedOpcode(0x11);
+ return MalformedOpcode(MALF_RPAREN);
tok++;
- at_eol();
- BuildRISCIntructionWord(parm, reg2, reg1);
+ ErrorIfNotAtEOL();
}
+ DepositRISCInstructionWord(parm, reg2, reg1);
break;
- // Should never get here :-D
+ // We should never get here. If we do, somebody done fucked up. :-D
default:
return error("Unknown RISC opcode type");
}