Shamusworld >> Repos - virtualjaguar/blob - src/tom.cpp

   1 //
   2 // TOM Processing
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups and endian wrongness amelioration by James L. Hammons
   7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
   8 //       the braindead way in which MAME handles memory. :-)
   9 //
  10 // Note: TOM has only a 16K memory space
  11 //
  12 //      ------------------------------------------------------------
  13 //      TOM REGISTERS (Mapped by Aaron Giles)
  14 //      ------------------------------------------------------------
  15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
  16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
  17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
  18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
  19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
  20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
  21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
  22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
  23 //                            -------- -------x      (ROMHI - controls ROM mapping)
  24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
  25 //                            --x----- --------      (HILO - image display bit order)
  26 //                            ---x---- --------      (BIGEND - big endian addressing?)
  27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
  28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
  29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
  30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
  31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
  32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
  33 //                            -----x-- --------      (which half of the display)
  34 //                            ------xx xxxxxxxx      (10-bit counter)
  35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
  36 //                            ----x--- --------      (which field is being generated)
  37 //                            -----xxx xxxxxxxx      (11-bit counter)
  38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
  39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
  40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
  41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
  42 //      F00026            W   -------- -------x   OBF - object processor flag
  43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
  44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
  45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
  46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
  47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
  48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
  49 //                        W   -------- ---x----      (INCEN - encrustation enable)
  50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
  51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
  52 //                        W   -------- -------x      (VIDEN - enables video)
  53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
  54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
  55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
  56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
  57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
  58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
  59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
  60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
  61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
  62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
  63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
  64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
  65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
  66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
  67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
  68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
  69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
  70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
  71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
  72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
  73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
  74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
  75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
  76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
  77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
  78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
  79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
  80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
  81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
  82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
  83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
  84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
  85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
  86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
  87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
  88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
  89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
  90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
  91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
  92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
  93 //      ------------------------------------------------------------
  94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
  95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
  96 //                      R/W   x------- --------      (DMAEN - DMA enable)
  97 //                      R/W   -x------ --------      (REGPAGE - register page)
  98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
  99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
 100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
 101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
 102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
 103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
 104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
 105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
 106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
 107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
 108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
 109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
 110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
 111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
 112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
 113 //                        W   -------- ----x---      (MATCOL - column/row major)
 114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
 115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
 116 //      F0210C            W   -------- -----xxx   G_END - data organization register
 117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
 119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
 120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
 121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
 122 //                      R     xxxx---- --------      (VERSION - GPU version code)
 123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
 125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
 126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
 127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
 128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
 129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
 134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
 135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
 136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
 137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 138 //      ------------------------------------------------------------
 139 //      BLITTER REGISTERS
 140 //      ------------------------------------------------------------
 141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
 142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
 143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
 144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 146 //                        W   -------- -----x-- -------- --------      (Y add control)
 147 //                        W   -------- ------xx -------- --------      (X add control)
 148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
 153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
 154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
 155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
 156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
 159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
 162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
 163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
 164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
 165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
 166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
 167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
 168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
 169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
 170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
 171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
 172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
 173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
 174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
 175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 177 //                        W   -------- -----x-- -------- --------      (Y add control)
 178 //                        W   -------- ------xx -------- --------      (X add control)
 179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
 184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
 185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
 188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
 191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
 192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
 193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
 194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
 195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
 196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
 197 //                        W   -------x xxx----- -------- --------      (logical operation)
 198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
 199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
 200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
 201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
 202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
 203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
 204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
 205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
 206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
 207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
 208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
 209 //                        W   -------- -------- -------- x-------      (diagnostic use)
 210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
 211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
 212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
 213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
 214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
 215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
 216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
 217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
 218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
 219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
 220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
 221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
 222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
 223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
 224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
 225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
 226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
 227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
 228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
 229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
 230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
 231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
 232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
 233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
 234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
 235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
 236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
 237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
 238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
 239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
 240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
 241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
 242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
 243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
 244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
 245 //      ------------------------------------------------------------
 246
 247 #include <SDL.h>
 248 #include "SDLptc.h"
 249 #include "tom.h"
 250 #include "gpu.h"
 251 #include "objectp.h"
 252 #include "cry2rgb.h"
 253
 254 // TOM registers (offset from $F00000)
 255
 256 #define MEMCON1         0x00
 257 #define MEMCON2         0x02
 258 #define HC                      0x04
 259 #define VMODE           0x28
 260 #define   MODE          0x0006          // Line buffer to video generator mode
 261 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
 262 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode
 263 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles
 264 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
 265 #define HBB                     0x30
 266 #define HBE                     0x32
 267 #define HDB1            0x38
 268 #define HDB2            0x3A
 269 #define HDE                     0x3C
 270 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
 271 #define VBB                     0x40
 272 #define VBE                     0x42
 273 #define VS                      0x44
 274 #define VDB                     0x46
 275 #define VDE                     0x48
 276 #define BG                      0x58
 277
 278 //This can be defined in the makefile as well...
 279 //(It's easier to do it here...)
 280 //#define TOM_DEBUG
 281
 282 extern uint32 jaguar_mainRom_crc32;
 283 extern Console console;
 284 extern Surface * surface;
 285 extern uint8 objectp_running;
 286
 287 static uint8 * tom_ram_8;
 288 uint32 tom_width, tom_height, tom_real_internal_width;
 289 static uint32 tom_timer_prescaler;
 290 static uint32 tom_timer_divider;
 291 static int32 tom_timer_counter;
 292 uint32 tom_scanline;
 293 uint32 hblankWidthInPixels = 0;
 294 uint16 tom_puck_int_pending;
 295 uint16 tom_timer_int_pending;
 296 uint16 tom_object_int_pending;
 297 uint16 tom_gpu_int_pending;
 298 uint16 tom_video_int_pending;
 299 uint16 * tom_cry_rgb_mix_lut;
 300
 301 static char * videoMode_to_str[8] =
 302         { "16 bpp CRY", "24 bpp RGB", "16 bpp DIRECT", "16 bpp RGB",
 303           "Mixed mode", "24 bpp RGB", "16 bpp DIRECT", "16 bpp RGB" };
 304
 305 typedef void (render_xxx_scanline_fn)(int16 *);
 306
 307 // Private function prototypes
 308
 309 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
 310 void tom_render_24bpp_scanline(int16 * backbuffer);
 311 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
 312 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
 313 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
 314
 315 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
 316 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
 317 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
 318 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
 319 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
 320
 321 render_xxx_scanline_fn * scanline_render_normal[]=
 322 {
 323         tom_render_16bpp_cry_scanline,
 324         tom_render_24bpp_scanline,
 325         tom_render_16bpp_direct_scanline,
 326         tom_render_16bpp_rgb_scanline,
 327         tom_render_16bpp_cry_rgb_mix_scanline,
 328         tom_render_24bpp_scanline,
 329         tom_render_16bpp_direct_scanline,
 330         tom_render_16bpp_rgb_scanline,
 331 };
 332
 333 render_xxx_scanline_fn * scanline_render_stretch[]=
 334 {
 335         tom_render_16bpp_cry_stretch_scanline,
 336         tom_render_24bpp_stretch_scanline,
 337         tom_render_16bpp_direct_stretch_scanline,
 338         tom_render_16bpp_rgb_stretch_scanline,
 339         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
 340         tom_render_24bpp_stretch_scanline,
 341         tom_render_16bpp_direct_stretch_scanline,
 342         tom_render_16bpp_rgb_stretch_scanline,
 343 };
 344
 345 render_xxx_scanline_fn * scanline_render[8];
 346
 347
 348 void tom_calc_cry_rgb_mix_lut(void)
 349 {
 350         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
 351
 352         for (uint32 i=0; i<0x10000; i++)
 353         {
 354                 uint16 color = i;
 355
 356                 if (color & 0x01)
 357                 {
 358                         color >>= 1;
 359                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
 360                 }
 361                 else
 362                 {
 363                         uint32 chrm = (color & 0xF000) >> 12,
 364                                 chrl = (color & 0x0F00) >> 8,
 365                                 y = color & 0x00FF;
 366                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 367                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 368                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 369                         color = (red << 10) | (green << 5) | blue;
 370                 }
 371                 tom_cry_rgb_mix_lut[i] = color;
 372         }
 373 }
 374
 375 void tom_set_pending_puck_int(void)
 376 {
 377         tom_puck_int_pending = 1;
 378 }
 379
 380 void tom_set_pending_timer_int(void)
 381 {
 382         tom_timer_int_pending = 1;
 383 }
 384
 385 void tom_set_pending_object_int(void)
 386 {
 387         tom_object_int_pending = 1;
 388 }
 389
 390 void tom_set_pending_gpu_int(void)
 391 {
 392         tom_gpu_int_pending = 1;
 393 }
 394
 395 void tom_set_pending_video_int(void)
 396 {
 397         tom_video_int_pending = 1;
 398 }
 399
 400 uint8 * tom_get_ram_pointer(void)
 401 {
 402         return tom_ram_8;
 403 }
 404
 405 uint8 tom_getVideoMode(void)
 406 {
 407         uint16 vmode = GET16(tom_ram_8, VMODE);
 408         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
 409 }
 410
 411 uint16 tom_get_scanline(void)
 412 {
 413         return tom_scanline;
 414 }
 415
 416 /*uint16 tom_get_hdb(void)
 417 {
 418         return GET16(tom_ram_8, HDB);
 419 }*/
 420
 421 uint16 tom_get_vdb(void)
 422 {
 423         return GET16(tom_ram_8, VBE);
 424 }
 425
 426 //
 427 // 16 BPP CRY/RGB mixed mode rendering
 428 //
 429 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
 430 {
 431         uint16 width = tom_width;
 432         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 433
 434         while (width)
 435         {
 436                 uint16 color = (*current_line_buffer++) << 8;
 437                 color |= *current_line_buffer++;
 438                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
 439                 width--;
 440         }
 441 }
 442
 443 //
 444 // 16 BPP CRY mode rendering
 445 //
 446 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
 447 {
 448         uint16 width = tom_width;
 449         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 450
 451         while (width)
 452         {
 453                 uint16 color = (*current_line_buffer++) << 8;
 454                 color |= *current_line_buffer++;
 455
 456                 uint32 chrm = (color & 0xF000) >> 12,
 457                         chrl = (color & 0x0F00) >> 8,
 458                         y = (color & 0x00FF);
 459
 460                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 461                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 462                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 463
 464                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 465                 width--;
 466         }
 467 }
 468
 469 //
 470 // 24 BPP mode rendering
 471 //
 472 void tom_render_24bpp_scanline(int16 * backbuffer)
 473 {
 474         uint16 width = tom_width;
 475         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 476
 477         while (width)
 478         {
 479                 uint16 green = (*current_line_buffer++) >> 3;
 480                 uint16 red = (*current_line_buffer++) >> 3;
 481                 current_line_buffer++;
 482                 uint16 blue = (*current_line_buffer++) >> 3;
 483                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 484                 width--;
 485         }
 486 }
 487
 488 //
 489 // 16 BPP direct mode rendering
 490 //
 491 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
 492 {
 493         uint16 width = tom_width;
 494         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 495
 496         while (width)
 497         {
 498                 uint16 color = (*current_line_buffer++) << 8;
 499                 color |= *current_line_buffer++;
 500                 *backbuffer++ = color >> 1;
 501                 width--;
 502         }
 503 }
 504
 505 //
 506 // 16 BPP RGB mode rendering
 507 //
 508 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
 509 {
 510         uint16 width = tom_width;
 511         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 512
 513         while (width)
 514         {
 515                 uint16 color = (*current_line_buffer++) << 8;
 516                 color = (color | *current_line_buffer++) >> 1;
 517                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
 518                 *backbuffer++ = color;
 519                 width--;
 520         }
 521 }
 522
 523 // This stuff may just go away by itself, especially if we do some
 524 // good old OpenGL goodness...
 525
 526 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
 527 {
 528         uint16 width=tom_width;
 529         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 530
 531         while (width)
 532         {
 533                 uint16 color;
 534                 color=*current_line_buffer++;
 535                 color<<=8;
 536                 color|=*current_line_buffer++;
 537                 *backbuffer++=tom_cry_rgb_mix_lut[color];
 538                 current_line_buffer+=2;
 539                 width--;
 540         }
 541 }
 542
 543 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
 544 {
 545         uint32 chrm, chrl, y;
 546
 547         uint16 width=tom_width;
 548         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 549
 550         while (width)
 551         {
 552                 uint16 color;
 553                 color=*current_line_buffer++;
 554                 color<<=8;
 555                 color|=*current_line_buffer++;
 556
 557                 chrm = (color & 0xF000) >> 12;
 558                 chrl = (color & 0x0F00) >> 8;
 559                 y    = (color & 0x00FF);
 560
 561                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
 562                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
 563                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
 564
 565                 uint16 color2;
 566                 color2=*current_line_buffer++;
 567                 color2<<=8;
 568                 color2|=*current_line_buffer++;
 569
 570                 chrm = (color2 & 0xF000) >> 12;
 571                 chrl = (color2 & 0x0F00) >> 8;
 572                 y    = (color2 & 0x00FF);
 573
 574                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
 575                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
 576                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
 577
 578                 red=(red+red2)>>1;
 579                 green=(green+green2)>>1;
 580                 blue=(blue+blue2)>>1;
 581
 582                 *backbuffer++=(red<<10)|(green<<5)|blue;
 583                 width--;
 584         }
 585 }
 586
 587 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
 588 {
 589         uint16 width=tom_width;
 590         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 591
 592         while (width)
 593         {
 594                 uint16 green=*current_line_buffer++;
 595                 uint16 red=*current_line_buffer++;
 596                 /*uint16 nc=*/current_line_buffer++;
 597                 uint16 blue=*current_line_buffer++;
 598                 red>>=3;
 599                 green>>=3;
 600                 blue>>=3;
 601                 *backbuffer++=(red<<10)|(green<<5)|blue;
 602                 current_line_buffer+=4;
 603                 width--;
 604         }
 605 }
 606
 607 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
 608 {
 609         uint16 width=tom_width;
 610         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 611
 612         while (width)
 613         {
 614                 uint16 color=*current_line_buffer++;
 615                 color<<=8;
 616                 color|=*current_line_buffer++;
 617                 color>>=1;
 618                 *backbuffer++=color;
 619                 current_line_buffer+=2;
 620                 width--;
 621         }
 622 }
 623
 624 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
 625 {
 626         uint16 width=tom_width;
 627         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 628
 629         while (width)
 630         {
 631                 uint16 color1=*current_line_buffer++;
 632                 color1<<=8;
 633                 color1|=*current_line_buffer++;
 634                 color1>>=1;
 635                 uint16 color2=*current_line_buffer++;
 636                 color2<<=8;
 637                 color2|=*current_line_buffer++;
 638                 color2>>=1;
 639                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
 640                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
 641                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
 642
 643                 color1=(red<<10)|(blue<<5)|green;
 644                 *backbuffer++=color1;
 645                 width--;
 646         }
 647 }
 648
 649 //
 650 // Process a single scanline
 651 //
 652 void tom_exec_scanline(int16 * backbuffer, int32 scanline, bool render)
 653 {
 654         tom_scanline = scanline;
 655
 656         // Increment the horizontal count (why?)
 657         SET16(tom_ram_8, HC, GET16(tom_ram_8, HC) + 1);
 658
 659         if (render)
 660         {
 661                 uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 662                 uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG+1];
 663
 664                 // Clear line buffer with BG
 665                 if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
 666                         for(uint32 i=0; i<tom_real_internal_width; i++)
 667                                 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
 668
 669 //              op_process_list(backbuffer, scanline, render);
 670                 OPProcessList(scanline, render);
 671
 672                 scanline_render[tom_getVideoMode()](backbuffer);
 673         }
 674 }
 675
 676 //
 677 // TOM initialization
 678 //
 679 void tom_init(void)
 680 {
 681         op_init();
 682         blitter_init();
 683         pcm_init();
 684         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
 685         tom_reset();
 686         // Setup the non-stretchy scanline rendering...
 687         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 688         tom_calc_cry_rgb_mix_lut();
 689 }
 690
 691 void tom_done(void)
 692 {
 693         op_done();
 694         pcm_done();
 695         blitter_done();
 696         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
 697                 videoMode_to_str[tom_getVideoMode()]);
 698 //      WriteLog("\ntom: object processor:\n");
 699 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
 700 //      WriteLog("tom: INT1=0x%.2x%.2x\n",tom_byte_read(0xf000e0),tom_byte_read(0xf000e1));
 701         gpu_done();
 702         dsp_done();
 703         memory_free(tom_ram_8);
 704 }
 705
 706 uint32 tom_getHBlankWidthInPixels(void)
 707 {
 708         return hblankWidthInPixels;
 709 }
 710
 711 uint32 tom_getVideoModeWidth(void)
 712 {
 713 //      static uint16 onetime = 1;
 714
 715         uint16 vmode = GET16(tom_ram_8, VMODE);
 716         uint16 hdb1 = GET16(tom_ram_8, HDB1);
 717 //      uint16 hde = GET16(tom_ram_8, HDE);
 718 //      uint16 hbb = GET16(tom_ram_8, HBB);
 719 //      uint16 hbe = GET16(tom_ram_8, HBE);
 720
 721         int clock_cycles_per_pixel = (vmode & PWIDTH) >> 9;
 722
 723         uint32 width = 640;
 724         switch (clock_cycles_per_pixel)
 725         {
 726         case 0: width = 640; break;
 727         case 1: width = 640; break;
 728         case 2: width = 448; break;
 729         case 3: width = 320; break;
 730         case 4: width = 256; break;
 731         case 5: width = 256; break;
 732         case 6: width = 256; break;
 733         case 7: width = 320; break;
 734 //      default: WriteLog("%i \n",clock_cycles_per_pixel);
 735         }
 736
 737 /*      if (jaguar_mainRom_crc32 == 0x3c7bfda8) // Kludge for what???
 738         {
 739                 if (width == 320)
 740                         width += 80;
 741                 if (width == 448)
 742                         width -= 16;
 743         }//*/
 744
 745         if (hdb1 == 123)
 746                 hblankWidthInPixels = 16;
 747         else
 748                 hblankWidthInPixels = 0;
 749
 750 //      WriteLog("hdb1=%i hbe=%i\n",hdb1,hbe);
 751         return width;
 752 }
 753
 754 // *** SPECULATION ***
 755 // It might work better to virtualize the height settings, i.e., set the vertical
 756 // height at 240 lines and clip using the VDB and VDE/VP registers...
 757 // Same with the width...
 758
 759 uint32 tom_getVideoModeHeight(void)
 760 {
 761 //      uint16 vmode = GET16(tom_ram_8, VMODE);
 762 //      uint16 vbe = GET16(tom_ram_8, VBE);
 763 //      uint16 vbb = GET16(tom_ram_8, VBB);
 764         uint16 vdb = GET16(tom_ram_8, VDB);
 765         uint16 vde = GET16(tom_ram_8, VDE);
 766         uint16 vp = GET16(tom_ram_8, VP);
 767
 768 /*      if (vde == 0xFFFF)
 769                 vde = vbb;//*/
 770
 771 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
 772         // The video mode height probably works this way:
 773         // VC counts from 0 to VP. VDB starts the OP. Either when
 774         // VDE is reached or VP, the OP is stopped. Let's try it...
 775         // Also note that we're conveniently ignoring interlaced display modes...!
 776         return ((vde > vp ? vp : vde) - vdb) >> 1;
 777 }
 778
 779 //
 780 // TOM reset code
 781 // NOTE: Should set up PAL values here when in PAL mode (use BIOS to find default values)
 782 //       for when user starts with -nobios -pal flags...
 783 //
 784 void tom_reset(void)
 785 {
 786         op_reset();
 787         blitter_reset();
 788         pcm_reset();
 789
 790         memset(tom_ram_8, 0x00, 0x4000);
 791         SET16(tom_ram_8, MEMCON1, 0x1861);
 792         SET16(tom_ram_8, MEMCON2, 0x0000);
 793         SET16(tom_ram_8, VMODE, 0x06C1);
 794         SET16(tom_ram_8, VP, 523);
 795         SET16(tom_ram_8, HP, 844);
 796         SET16(tom_ram_8, VS, 523 - 6);
 797         SET16(tom_ram_8, VBB, 434);
 798         SET16(tom_ram_8, VBE, 24);
 799         SET16(tom_ram_8, HBB, 689 + 0x400);
 800         SET16(tom_ram_8, HBE, 125);
 801
 802         SET16(tom_ram_8, VDE, 2047);//65535);
 803         SET16(tom_ram_8, VDB, 28);
 804         SET16(tom_ram_8, HDB1, 166);
 805         SET16(tom_ram_8, HDE, 2047);//65535);
 806
 807         tom_width = tom_real_internal_width = 0;
 808         tom_height = 0;
 809         tom_scanline = 0;
 810
 811         hblankWidthInPixels = GET16(tom_ram_8, HDB1) >> 1;
 812
 813         tom_puck_int_pending = 0;
 814         tom_timer_int_pending = 0;
 815         tom_object_int_pending = 0;
 816         tom_gpu_int_pending = 0;
 817         tom_video_int_pending = 0;
 818
 819         tom_timer_prescaler = 0;
 820         tom_timer_divider = 0;
 821         tom_timer_counter = 0;
 822         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 823 }
 824
 825 //
 826 // TOM byte access (read)
 827 //
 828
 829 unsigned tom_byte_read(unsigned int offset)
 830 {
 831 //???Is this needed???
 832 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
 833 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
 834 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
 835         offset &= 0xFF3FFF;
 836
 837 #ifdef TOM_DEBUG
 838         WriteLog("TOM: Reading byte at %06X\n", offset);
 839 #endif
 840
 841         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 842                 return gpu_byte_read(offset);
 843         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 844                 return gpu_byte_read(offset);
 845         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 846                 return op_byte_read(offset);
 847         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 848                 return blitter_byte_read(offset);
 849         else if (offset == 0xF00050)
 850                 return tom_timer_prescaler >> 8;
 851         else if (offset == 0xF00051)
 852                 return tom_timer_prescaler & 0xFF;
 853         else if (offset == 0xF00052)
 854                 return tom_timer_divider >> 8;
 855         else if (offset == 0xF00053)
 856                 return tom_timer_divider & 0xFF;
 857
 858         return tom_ram_8[offset & 0x3FFF];
 859 }
 860
 861 //
 862 // TOM word access (read)
 863 //
 864
 865 unsigned tom_word_read(unsigned int offset)
 866 {
 867 //???Is this needed???
 868         offset &= 0xFF3FFF;
 869 #ifdef TOM_DEBUG
 870         WriteLog("TOM: Reading word at %06X\n", offset);
 871 #endif
 872         if (offset == 0xF000E0)
 873         {
 874                 uint16 data = (tom_puck_int_pending << 4) | (tom_timer_int_pending << 3)
 875                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
 876                         | (tom_video_int_pending << 0);
 877                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
 878                 return data;
 879         }
 880         else if (offset == 0xF00006)    // VC
 881         // What if we're in interlaced mode?
 882         // According to docs, in non-interlace mode VC is ALWAYS even...
 883 //              return (tom_scanline << 1);// + 1;
 884 //But it's causing Rayman to be fucked up... Why???
 885                 return (tom_scanline << 1) + 1;
 886         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 887                 return gpu_word_read(offset);
 888         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 889                 return gpu_word_read(offset);
 890         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 891                 return op_word_read(offset);
 892         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 893                 return blitter_word_read(offset);
 894         else if (offset == 0xF00050)
 895                 return tom_timer_prescaler;
 896         else if (offset == 0xF00052)
 897                 return tom_timer_divider;
 898
 899         offset &= 0x3FFF;
 900         return (tom_byte_read(offset) << 8) | tom_byte_read(offset+1);
 901 }
 902
 903 //
 904 // TOM byte access (write)
 905 //
 906
 907 void tom_byte_write(unsigned offset, unsigned data)
 908 {
 909 //???Is this needed???
 910 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
 911         offset &= 0xFF3FFF;
 912
 913 #ifdef TOM_DEBUG
 914         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
 915 #endif
 916
 917         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 918         {
 919                 gpu_byte_write(offset, data);
 920                 return;
 921         }
 922         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 923         {
 924                 gpu_byte_write(offset, data);
 925                 return;
 926         }
 927         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 928         {
 929                 op_byte_write(offset, data);
 930                 return;
 931         }
 932         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 933         {
 934                 blitter_byte_write(offset, data);
 935                 return;
 936         }
 937         else if (offset == 0xF00050)
 938         {
 939                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
 940                 tom_reset_timer();
 941                 return;
 942         }
 943         else if (offset == 0xF00051)
 944         {
 945                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
 946                 tom_reset_timer();
 947                 return;
 948         }
 949         else if (offset == 0xF00052)
 950         {
 951                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
 952                 tom_reset_timer();
 953                 return;
 954         }
 955         else if (offset == 0xF00053)
 956         {
 957                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
 958                 tom_reset_timer();
 959                 return;
 960         }
 961         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
 962         {
 963                 // Writing to one CLUT writes to the other
 964                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
 965                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
 966         }
 967
 968         tom_ram_8[offset & 0x3FFF] = data;
 969 }
 970
 971 //
 972 // TOM word access (write)
 973 //
 974
 975 void tom_word_write(unsigned offset, unsigned data)
 976 {
 977 //???Is this needed???
 978         offset &= 0xFF3FFF;
 979
 980 #ifdef TOM_DEBUG
 981         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
 982 #endif
 983
 984         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 985         {
 986                 gpu_word_write(offset, data);
 987                 return;
 988         }
 989         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 990         {
 991                 gpu_word_write(offset, data);
 992                 return;
 993         }
 994         else if ((offset >= 0xF00000) && (offset < 0xF00002))
 995         {
 996                 tom_byte_write(offset, data >> 8);
 997                 tom_byte_write(offset+1, data & 0xFF);
 998         }
 999         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1000         {
1001                 op_word_write(offset, data);
1002                 return;
1003         }
1004         else if (offset == 0xF00050)
1005         {
1006                 tom_timer_prescaler = data;
1007                 tom_reset_timer();
1008                 return;
1009         }
1010         else if (offset == 0xF00052)
1011         {
1012                 tom_timer_divider = data;
1013                 tom_reset_timer();
1014                 return;
1015         }
1016         else if (offset == 0xF000E0)
1017         {
1018                 if (data & 0x0100)
1019                         tom_video_int_pending = 0;
1020                 if (data & 0x0200)
1021                         tom_gpu_int_pending = 0;
1022                 if (data & 0x0400)
1023                         tom_object_int_pending = 0;
1024                 if (data & 0x0800)
1025                         tom_timer_int_pending = 0;
1026                 if (data & 0x1000)
1027                         tom_puck_int_pending = 0;
1028         }
1029         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1030         {
1031                 blitter_word_write(offset, data);
1032                 return;
1033         }
1034         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1035         {
1036                 // Writing to one CLUT writes to the other
1037                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1038 // Watch out for unaligned writes here! (Not fixed yet)
1039                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1040         }
1041
1042         offset &= 0x3FFF;
1043         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1044                 objectp_running = 1;
1045
1046         if (offset >= 0x30 && offset <= 0x4E)
1047                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1048         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1049                 data &= 0x03FF;                 // These are all 10-bit registers
1050
1051         tom_byte_write(offset, data >> 8);
1052         tom_byte_write(offset+1, data & 0xFF);
1053
1054         // detect screen resolution changes
1055         if ((offset >= 0x28) && (offset <= 0x4F))
1056         {
1057 if (offset == VDB)
1058         WriteLog("TOM: Vertical Display Begin written: %04X\n", data);
1059 if (offset == VDE)
1060         WriteLog("TOM: Vertical Display End written: %04X\n", data);
1061 if (offset == VP)
1062         WriteLog("TOM: Vertical Period written: %04X (%sinterlaced)\n", data, (data & 0x01 ? "non-" : ""));
1063 if (offset == HDB1)
1064         WriteLog("TOM: Horizontal Display Begin 1 written: %04X\n", data);
1065 if (offset == HDE)
1066         WriteLog("TOM: Horizontal Display End written: %04X\n", data);
1067 if (offset == HP)
1068         WriteLog("TOM: Horizontal Period written: %04X\n", data);
1069 if (offset == VMODE)
1070         WriteLog("TOM: Video Mode written: %04X\n", data);
1071
1072                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1073                 tom_real_internal_width = width;
1074
1075                 if (width == 640)
1076                 {
1077                         memcpy(scanline_render, scanline_render_stretch, sizeof(scanline_render));
1078                         width = 320;
1079                 }
1080                 else
1081                         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1082
1083                 if ((width != tom_width) || (height != tom_height))
1084                 {
1085                         ws_audio_done();
1086
1087                         static char window_title[256];
1088                         delete surface;
1089
1090                         tom_width = width, tom_height = height;
1091                         Format format(16, 0x007C00, 0x00003E0, 0x0000001F);
1092                         surface = new Surface(tom_width, tom_height, format);
1093                         console.close();
1094                         sprintf(window_title, "Virtual Jaguar (%i x %i)", (int)tom_width, (int)tom_height);
1095                         console.open(window_title, width, tom_height, format);
1096
1097                         ws_audio_init();
1098                         ws_audio_reset();
1099                 }
1100         }
1101 }
1102
1103 int tom_irq_enabled(int irq)
1104 {
1105         return jaguar_byte_read(0xF000E1) & (1 << irq);
1106 }
1107
1108 void tom_set_irq_latch(int irq, int enabled)
1109 {
1110         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1111 }
1112
1113 uint16 tom_irq_control_reg(void)
1114 {
1115         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1116 }
1117
1118 void tom_reset_timer(void)
1119 {
1120         if ((!tom_timer_prescaler) || (!tom_timer_divider))
1121                 tom_timer_counter = 0;
1122         else
1123                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1124 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1125 }
1126
1127 void tom_pit_exec(uint32 cycles)
1128 {
1129         if (tom_timer_counter > 0)
1130         {
1131                 tom_timer_counter -= cycles;
1132
1133                 if (tom_timer_counter <= 0)
1134                 {
1135                         tom_set_pending_timer_int();
1136                         gpu_set_irq_line(2, 1);
1137                         if ((tom_irq_enabled(IRQ_TIMER)) && (jaguar_interrupt_handler_is_valid(64)))
1138                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1139
1140                         tom_reset_timer();
1141                 }
1142         }
1143 }