]> Shamusworld >> Repos - virtualjaguar/blob - src/tom.cpp
Changes to accomodate PAL/NTSC screen heights
[virtualjaguar] / src / tom.cpp
1 //
2 // TOM Processing
3 //
4 // by cal2
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Cleanups and endian wrongness amelioration by James L. Hammons
7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
8 //       the braindead way in which MAME handles memory. :-)
9 //
10 // Note: TOM has only a 16K memory space
11 //
12 //      ------------------------------------------------------------
13 //      TOM REGISTERS (Mapped by Aaron Giles)
14 //      ------------------------------------------------------------
15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
23 //                            -------- -------x      (ROMHI - controls ROM mapping)
24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
25 //                            --x----- --------      (HILO - image display bit order)
26 //                            ---x---- --------      (BIGEND - big endian addressing?)
27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
33 //                            -----x-- --------      (which half of the display)
34 //                            ------xx xxxxxxxx      (10-bit counter)
35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
36 //                            ----x--- --------      (which field is being generated)
37 //                            -----xxx xxxxxxxx      (11-bit counter)
38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
42 //      F00026            W   -------- -------x   OBF - object processor flag
43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
49 //                        W   -------- ---x----      (INCEN - encrustation enable)
50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
52 //                        W   -------- -------x      (VIDEN - enables video)
53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
93 //      ------------------------------------------------------------
94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
96 //                      R/W   x------- --------      (DMAEN - DMA enable)
97 //                      R/W   -x------ --------      (REGPAGE - register page)
98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
113 //                        W   -------- ----x---      (MATCOL - column/row major)
114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
116 //      F0210C            W   -------- -----xxx   G_END - data organization register
117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
122 //                      R     xxxx---- --------      (VERSION - GPU version code)
123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
138 //      ------------------------------------------------------------
139 //      BLITTER REGISTERS
140 //      ------------------------------------------------------------
141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
146 //                        W   -------- -----x-- -------- --------      (Y add control)
147 //                        W   -------- ------xx -------- --------      (X add control)
148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
177 //                        W   -------- -----x-- -------- --------      (Y add control)
178 //                        W   -------- ------xx -------- --------      (X add control)
179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
197 //                        W   -------x xxx----- -------- --------      (logical operation)
198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
209 //                        W   -------- -------- -------- x-------      (diagnostic use)
210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
245 //      ------------------------------------------------------------
246
247 //#include <SDL.h>
248 #include "tom.h"
249 #include "video.h"
250 #include "gpu.h"
251 #include "objectp.h"
252 #include "cry2rgb.h"
253 #include "settings.h"
254
255 // TOM registers (offset from $F00000)
256
257 #define MEMCON1         0x00
258 #define MEMCON2         0x02
259 #define HC                      0x04
260 #define VC                      0x06
261 #define VMODE           0x28
262 #define   MODE          0x0006          // Line buffer to video generator mode
263 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
264 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode (only works in MODE 0!)
265 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)
266 #define BORD1           0x2A            // Border green/red values (8 BPP)
267 #define BORD2           0x2C            // Border blue value (8 BPP)
268 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
269 #define HBB                     0x30
270 #define HBE                     0x32
271 #define HDB1            0x38
272 #define HDB2            0x3A
273 #define HDE                     0x3C
274 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
275 #define VBB                     0x40
276 #define VBE                     0x42
277 #define VS                      0x44
278 #define VDB                     0x46
279 #define VDE                     0x48
280 #define VI                      0x4E
281 #define BG                      0x58
282 #define INT1            0xE0
283
284 //NOTE: These arbitrary cutoffs are NOT taken into account for PAL jaguar screens. !!! FIX !!!
285
286 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
287 /*#define LEFT_VISIBLE_HC               208
288 #define RIGHT_VISIBLE_HC        1528//*/
289 #define LEFT_VISIBLE_HC         208
290 #define RIGHT_VISIBLE_HC        1488
291 //#define TOP_VISIBLE_VC                25
292 //#define BOTTOM_VISIBLE_VC     503
293 #define TOP_VISIBLE_VC          31
294 #define BOTTOM_VISIBLE_VC       511
295
296 //This can be defined in the makefile as well...
297 //(It's easier to do it here, though...)
298 //#define TOM_DEBUG
299
300 extern uint32 jaguar_mainRom_crc32;
301 extern uint8 objectp_running;
302
303 static uint8 * tom_ram_8;
304 uint32 tom_width, tom_height, tom_real_internal_width;
305 static uint32 tom_timer_prescaler;
306 static uint32 tom_timer_divider;
307 static int32 tom_timer_counter;
308 //uint32 tom_scanline;
309 //uint32 hblankWidthInPixels = 0;
310 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
311         tom_gpu_int_pending, tom_video_int_pending;
312 uint16 * tom_cry_rgb_mix_lut;
313 int16 * TOMBackbuffer;
314
315 static char * videoMode_to_str[8] =
316         { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
317           "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
318
319 typedef void (render_xxx_scanline_fn)(int16 *);
320
321 // Private function prototypes
322
323 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
324 void tom_render_24bpp_scanline(int16 * backbuffer);
325 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
326 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
327 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
328
329 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
330 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
331 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
332 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
333 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
334
335 render_xxx_scanline_fn * scanline_render_normal[]=
336 {
337         tom_render_16bpp_cry_scanline,
338         tom_render_24bpp_scanline,
339         tom_render_16bpp_direct_scanline,
340         tom_render_16bpp_rgb_scanline,
341         tom_render_16bpp_cry_rgb_mix_scanline,
342         tom_render_24bpp_scanline,
343         tom_render_16bpp_direct_scanline,
344         tom_render_16bpp_rgb_scanline
345 };
346
347 render_xxx_scanline_fn * scanline_render_stretch[]=
348 {
349         tom_render_16bpp_cry_stretch_scanline,
350         tom_render_24bpp_stretch_scanline,
351         tom_render_16bpp_direct_stretch_scanline,
352         tom_render_16bpp_rgb_stretch_scanline,
353         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
354         tom_render_24bpp_stretch_scanline,
355         tom_render_16bpp_direct_stretch_scanline,
356         tom_render_16bpp_rgb_stretch_scanline,
357 };
358
359 render_xxx_scanline_fn * scanline_render[8];
360
361
362 // Screen info for various games [NTSC]...
363 /*
364 Doom
365 TOM: Horizontal Display End written by M68K: 1727
366 TOM: Horizontal Display Begin 1 written by M68K: 123
367 TOM: Vertical Display Begin written by M68K: 25
368 TOM: Vertical Display End written by M68K: 2047
369 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
370 Also does PWIDTH = 4...
371 Vertical resolution: 238 lines
372
373 Rayman
374 TOM: Horizontal Display End written by M68K: 1727
375 TOM: Horizontal Display Begin 1 written by M68K: 123
376 TOM: Vertical Display Begin written by M68K: 25
377 TOM: Vertical Display End written by M68K: 2047
378 TOM: Vertical Interrupt written by M68K: 507
379 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
380 TOM: Horizontal Display Begin 1 written by M68K: 208
381 TOM: Horizontal Display End written by M68K: 1670
382 Display starts at 31, then 52!
383 Vertical resolution: 238 lines
384
385 Atari Karts
386 TOM: Horizontal Display End written by M68K: 1727
387 TOM: Horizontal Display Begin 1 written by M68K: 123
388 TOM: Vertical Display Begin written by M68K: 25
389 TOM: Vertical Display End written by M68K: 2047
390 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
391 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
392 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
393
394 Iron Soldier
395 TOM: Vertical Interrupt written by M68K: 2047
396 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
397 TOM: Horizontal Display End written by M68K: 1727
398 TOM: Horizontal Display Begin 1 written by M68K: 123
399 TOM: Vertical Display Begin written by M68K: 25
400 TOM: Vertical Display End written by M68K: 2047
401 TOM: Vertical Interrupt written by M68K: 507
402 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
403 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
404 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
405 Display starts at 31
406 Vertical resolution: 238 lines
407 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
408
409 JagMania
410 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
411 TOM: Horizontal Blank Begin written by M68K: 1713
412 TOM: Horizontal Blank End written by M68K: 125
413 TOM: Horizontal Display End written by M68K: 1696
414 TOM: Horizontal Display Begin 1 written by M68K: 166
415 TOM: Vertical Period written by M68K: 523 (non-interlaced)
416 TOM: Vertical Blank End written by M68K: 24
417 TOM: Vertical Display Begin written by M68K: 46
418 TOM: Vertical Display End written by M68K: 496
419 TOM: Vertical Blank Begin written by M68K: 500
420 TOM: Vertical Sync written by M68K: 517
421 TOM: Vertical Interrupt written by M68K: 497
422 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
423 Display starts at 55
424
425 Double Dragon V
426 TOM: Horizontal Display End written by M68K: 1727
427 TOM: Horizontal Display Begin 1 written by M68K: 123
428 TOM: Vertical Display Begin written by M68K: 25
429 TOM: Vertical Display End written by M68K: 2047
430 TOM: Vertical Interrupt written by M68K: 507
431 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
432
433 Dino Dudes
434 TOM: Horizontal Display End written by M68K: 1823
435 TOM: Horizontal Display Begin 1 written by M68K: 45
436 TOM: Vertical Display Begin written by M68K: 40
437 TOM: Vertical Display End written by M68K: 2047
438 TOM: Vertical Interrupt written by M68K: 491
439 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
440 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
441 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
442 Vertical resolution: 238 lines
443
444 Flashback
445 TOM: Horizontal Display End written by M68K: 1727
446 TOM: Horizontal Display Begin 1 written by M68K: 188
447 TOM: Vertical Display Begin written by M68K: 1
448 TOM: Vertical Display End written by M68K: 2047
449 TOM: Vertical Interrupt written by M68K: 483
450 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
451 Width would be 303 with above scheme, but border width would be 13 pixels
452
453 Trevor McFur
454 Vertical resolution: 238 lines
455 */
456
457
458 void tom_calc_cry_rgb_mix_lut(void)
459 {
460         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
461
462         for (uint32 i=0; i<0x10000; i++)
463         {
464                 uint16 color = i;
465
466                 if (color & 0x01)
467                 {
468                         color >>= 1;
469                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
470                 }
471                 else
472                 {
473                         uint32 chrm = (color & 0xF000) >> 12,
474                                 chrl = (color & 0x0F00) >> 8,
475                                 y = color & 0x00FF;
476                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
477                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
478                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
479                         color = (red << 10) | (green << 5) | blue;
480                 }
481                 tom_cry_rgb_mix_lut[i] = color;
482         }
483 }
484
485 void tom_set_pending_jerry_int(void)
486 {
487         tom_jerry_int_pending = 1;
488 }
489
490 void tom_set_pending_timer_int(void)
491 {
492         tom_timer_int_pending = 1;
493 }
494
495 void tom_set_pending_object_int(void)
496 {
497         tom_object_int_pending = 1;
498 }
499
500 void tom_set_pending_gpu_int(void)
501 {
502         tom_gpu_int_pending = 1;
503 }
504
505 void tom_set_pending_video_int(void)
506 {
507         tom_video_int_pending = 1;
508 }
509
510 uint8 * tom_get_ram_pointer(void)
511 {
512         return tom_ram_8;
513 }
514
515 uint8 tom_getVideoMode(void)
516 {
517         uint16 vmode = GET16(tom_ram_8, VMODE);
518         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
519 }
520
521 //Used in only one place (and for debug purposes): OBJECTP.CPP
522 uint16 tom_get_vdb(void)
523 {
524 // This in NOT VDB!!!
525 //      return GET16(tom_ram_8, VBE);
526         return GET16(tom_ram_8, VDB);
527 }
528
529 //
530 // 16 BPP CRY/RGB mixed mode rendering
531 //
532 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
533 {
534         uint16 width = tom_width;
535         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
536         
537         //New stuff--restrict our drawing...
538         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
539         //NOTE: May have to check HDB2 as well!
540         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
541         startPos /= pwidth;
542         if (startPos < 0)
543                 current_line_buffer += 2 * -startPos;
544         else
545                 backbuffer += 2 * startPos, width -= startPos;
546
547         while (width)
548         {
549                 uint16 color = (*current_line_buffer++) << 8;
550                 color |= *current_line_buffer++;
551                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
552                 width--;
553         }
554 }
555
556 //
557 // 16 BPP CRY mode rendering
558 //
559 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
560 {
561         uint16 width = tom_width;
562         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
563
564         //New stuff--restrict our drawing...
565         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
566         //NOTE: May have to check HDB2 as well!
567         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
568         startPos /= pwidth;
569         if (startPos < 0)
570                 current_line_buffer += 2 * -startPos;
571         else
572                 backbuffer += 2 * startPos, width -= startPos;
573
574         while (width)
575         {
576                 uint16 color = (*current_line_buffer++) << 8;
577                 color |= *current_line_buffer++;
578                 
579                 uint32 chrm = (color & 0xF000) >> 12,
580                         chrl = (color & 0x0F00) >> 8,
581                         y = (color & 0x00FF);
582                                 
583                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
584                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
585                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
586                 
587                 *backbuffer++ = (red << 10) | (green << 5) | blue;
588                 width--;
589         }
590 }
591
592 //
593 // 24 BPP mode rendering
594 //
595 void tom_render_24bpp_scanline(int16 * backbuffer)
596 {
597         uint16 width = tom_width;
598         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
599         
600         //New stuff--restrict our drawing...
601         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
602         //NOTE: May have to check HDB2 as well!
603         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
604         startPos /= pwidth;
605         if (startPos < 0)
606                 current_line_buffer += 4 * -startPos;
607         else
608                 backbuffer += 2 * startPos, width -= startPos;
609
610         while (width)
611         {
612                 // This is NOT a good 8 -> 5 bit RGB conversion! (It saturates values below 8
613                 // to zero and throws away almost *half* the color resolution!)
614                 uint16 green = (*current_line_buffer++) >> 3;
615                 uint16 red = (*current_line_buffer++) >> 3;
616                 current_line_buffer++;
617                 uint16 blue = (*current_line_buffer++) >> 3;
618                 *backbuffer++ = (red << 10) | (green << 5) | blue;
619                 width--;
620         }
621 }
622
623 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
624 //extra hardware outside of the Jaguar console to support this!
625 //
626 // 16 BPP direct mode rendering
627 //
628 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
629 {
630         uint16 width = tom_width;
631         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
632         
633         while (width)
634         {
635                 uint16 color = (*current_line_buffer++) << 8;
636                 color |= *current_line_buffer++;
637                 *backbuffer++ = color >> 1;
638                 width--;
639         }
640 }
641
642 //
643 // 16 BPP RGB mode rendering
644 //
645 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
646 {
647         uint16 width = tom_width;
648         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
649         
650         //New stuff--restrict our drawing...
651         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
652         //NOTE: May have to check HDB2 as well!
653         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
654         startPos /= pwidth;
655         if (startPos < 0)
656                 current_line_buffer += 2 * -startPos;
657         else
658                 backbuffer += 2 * startPos, width -= startPos;
659
660         while (width)
661         {
662                 uint16 color = (*current_line_buffer++) << 8;
663                 color = (color | *current_line_buffer++) >> 1;
664                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
665                 *backbuffer++ = color;
666                 width--;
667         }
668 }
669
670 // This stuff may just go away by itself, especially if we do some
671 // good old OpenGL goodness...
672
673 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
674 {
675         uint16 width=tom_width;
676         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
677         
678         while (width)
679         {
680                 uint16 color;
681                 color=*current_line_buffer++;
682                 color<<=8;
683                 color|=*current_line_buffer++;
684                 *backbuffer++=tom_cry_rgb_mix_lut[color];
685                 current_line_buffer+=2;
686                 width--;
687         }
688 }
689
690 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
691 {
692         uint32 chrm, chrl, y;
693
694         uint16 width=tom_width;
695         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
696         
697         while (width)
698         {
699                 uint16 color;
700                 color=*current_line_buffer++;
701                 color<<=8;
702                 color|=*current_line_buffer++;
703                 
704                 chrm = (color & 0xF000) >> 12;    
705                 chrl = (color & 0x0F00) >> 8;
706                 y    = (color & 0x00FF);
707                                 
708                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
709                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
710                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
711                 
712                 uint16 color2;
713                 color2=*current_line_buffer++;
714                 color2<<=8;
715                 color2|=*current_line_buffer++;
716                 
717                 chrm = (color2 & 0xF000) >> 12;    
718                 chrl = (color2 & 0x0F00) >> 8;
719                 y    = (color2 & 0x00FF);
720                                 
721                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
722                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
723                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
724                 
725                 red=(red+red2)>>1;
726                 green=(green+green2)>>1;
727                 blue=(blue+blue2)>>1;
728
729                 *backbuffer++=(red<<10)|(green<<5)|blue;
730                 width--;
731         }
732 }
733
734 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
735 {
736         uint16 width=tom_width;
737         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
738         
739         while (width)
740         {
741                 uint16 green=*current_line_buffer++;
742                 uint16 red=*current_line_buffer++;
743                 /*uint16 nc=*/current_line_buffer++;
744                 uint16 blue=*current_line_buffer++;
745                 red>>=3;
746                 green>>=3;
747                 blue>>=3;
748                 *backbuffer++=(red<<10)|(green<<5)|blue;
749                 current_line_buffer+=4;
750                 width--;
751         }
752 }
753
754 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
755 {
756         uint16 width=tom_width;
757         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
758         
759         while (width)
760         {
761                 uint16 color=*current_line_buffer++;
762                 color<<=8;
763                 color|=*current_line_buffer++;
764                 color>>=1;
765                 *backbuffer++=color;
766                 current_line_buffer+=2;
767                 width--;
768         }
769 }
770
771 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
772 {
773         uint16 width=tom_width;
774         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
775         
776         while (width)
777         {
778                 uint16 color1=*current_line_buffer++;
779                 color1<<=8;
780                 color1|=*current_line_buffer++;
781                 color1>>=1;
782                 uint16 color2=*current_line_buffer++;
783                 color2<<=8;
784                 color2|=*current_line_buffer++;
785                 color2>>=1;
786                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
787                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
788                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
789
790                 color1=(red<<10)|(blue<<5)|green;
791                 *backbuffer++=color1;
792                 width--;
793         }
794 }
795
796 void TOMResetBackbuffer(int16 * backbuffer)
797 {
798         TOMBackbuffer = backbuffer;
799 }
800
801 //
802 // Process a single scanline
803 //
804 void TOMExecScanline(uint16 scanline, bool render)
805 {
806         bool inActiveDisplayArea = true;
807
808 //Interlacing is still not handled correctly here... !!! FIX !!!
809         if (scanline & 0x01)                                                    // Execute OP only on even lines (non-interlaced only!)
810                 return;
811
812         if (scanline >= (uint16)GET16(tom_ram_8, VDB) && scanline < (uint16)GET16(tom_ram_8, VDE))
813         {
814                 if (render)
815                 {
816                         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
817                         uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG + 1];
818
819                         // Clear line buffer with BG
820                         if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
821                                 for(uint32 i=0; i<720; i++)
822                                         *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
823
824                         OPProcessList(scanline, render);
825                 }
826         }
827         else
828                 inActiveDisplayArea = false;
829
830         // Here's our virtualized scanline code...
831         if (scanline >= TOP_VISIBLE_VC && scanline < BOTTOM_VISIBLE_VC)
832         {
833                 if (inActiveDisplayArea)
834                         scanline_render[tom_getVideoMode()](TOMBackbuffer);
835                 else
836                 {
837                         // If outside of VDB & VDE, then display the border color
838                         int16 * currentLineBuffer = TOMBackbuffer;
839                         uint8 g = tom_ram_8[BORD1], r = tom_ram_8[BORD1 + 1], b = tom_ram_8[BORD2 + 1];
840                         uint16 pixel = ((r & 0xF8) << 7) | ((g & 0xF8) << 2) | (b >> 3);
841
842                         for(uint32 i=0; i<tom_width; i++)
843                                 *currentLineBuffer++ = pixel;
844                 }
845
846                 TOMBackbuffer += GetSDLScreenPitch() / 2;       // Returns bytes, but we need words
847         }
848 }
849
850 //
851 // TOM initialization
852 //
853 void tom_init(void)
854 {
855         op_init();
856         blitter_init();
857 //This should be done by JERRY! pcm_init();
858         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
859         tom_reset();
860         // Setup the non-stretchy scanline rendering...
861         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
862         tom_calc_cry_rgb_mix_lut();
863 }
864
865 void tom_done(void)
866 {
867         op_done();
868 //This should be done by JERRY! pcm_done();
869         blitter_done();
870         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
871                 videoMode_to_str[tom_getVideoMode()]);
872 //      WriteLog("\ntom: object processor:\n");
873 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
874 //      WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
875 //      gpu_done();
876 //      dsp_done();
877         memory_free(tom_ram_8);
878 }
879
880 /*uint32 tom_getHBlankWidthInPixels(void)
881 {
882         return hblankWidthInPixels;
883 }*/
884
885 uint32 tom_getVideoModeWidth(void)
886 {
887         //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
888 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
889 //Temporary, for testing Doom...
890 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
891
892         // Note that the following PWIDTH values have the following pixel aspect ratios:
893         // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
894         // PWIDTH = 2 -> 0.50:1 (1:2) pixels
895         // PWIDTH = 3 -> 0.75:1 (3:4) pixels
896         // PWIDTH = 4 -> 1.00:1 (1:1) pixels
897         // PWIDTH = 5 -> 1.25:1 (5:4) pixels
898         // PWIDTH = 6 -> 1.50:1 (3:2) pixels
899         // PWIDTH = 7 -> 1.75:1 (7:4) pixels
900         // PWIDTH = 8 -> 2.00:1 (2:1) pixels
901
902         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
903         // this implies that the other modes have pixels that are *not* square!
904         // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
905
906         // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
907         //       so we don't bother to add one...
908 //      return width[(GET16(tom_ram_8, VMODE) & PWIDTH) >> 9];
909
910         // Now, we just calculate it...
911 /*      uint16 hdb1 = GET16(tom_ram_8, HDB1), hde = GET16(tom_ram_8, HDE),
912                 hbb = GET16(tom_ram_8, HBB), pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
913 //      return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
914 //Temporary, for testing Doom...
915         return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
916
917         // To make it easier to make a quasi-fixed display size, we restrict the viewing
918         // area to an arbitrary range of the Horizontal Count.
919         uint16 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
920 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / pwidth;
921 //Temporary, for testing Doom...
922         return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
923 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
924
925 // More speculating...
926 // According to the JTRM, the number of potential pixels across is given by the
927 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
928 // zero to this value twice per scanline (the high bit is set on the second count).
929 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
930 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
931 // HDB1, it starts fetching the line from position 0 in LBUF.
932
933 // The trick, it would seem, is to figure out how long the typical visible scanline
934 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
935 // course). Using that length, we can establish an "absolute left display limit" with
936 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
937 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
938 // backbuffer + 5 pixels).
939
940 // That's basically what we're doing now...!
941 }
942
943 // *** SPECULATION ***
944 // It might work better to virtualize the height settings, i.e., set the vertical
945 // height at 240 lines and clip using the VDB and VDE/VP registers...
946 // Same with the width... [Width is pretty much virtualized now.]
947
948 // Now that that the width is virtualized, let's virtualize the height. :-)
949 uint32 tom_getVideoModeHeight(void)
950 {
951 //      uint16 vmode = GET16(tom_ram_8, VMODE);
952 //      uint16 vbe = GET16(tom_ram_8, VBE);
953 //      uint16 vbb = GET16(tom_ram_8, VBB);
954 //      uint16 vdb = GET16(tom_ram_8, VDB);
955 //      uint16 vde = GET16(tom_ram_8, VDE);
956 //      uint16 vp = GET16(tom_ram_8, VP);
957         
958 /*      if (vde == 0xFFFF)
959                 vde = vbb;//*/
960
961 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
962         // The video mode height probably works this way:
963         // VC counts from 0 to VP. VDB starts the OP. Either when
964         // VDE is reached or VP, the OP is stopped. Let's try it...
965         // Also note that we're conveniently ignoring interlaced display modes...!
966 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
967 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
968 //Let's try from the Vertical Blank interval...
969 //Seems to work OK!
970 //      return (vbb - vbe) >> 1;        // Again, doesn't take interlacing into account...
971 // This of course doesn't take interlacing into account. But I haven't seen any
972 // Jaguar software that takes advantage of it either...
973 //Also, doesn't reflect PAL Jaguar either... !!! FIX !!! [DONE]
974 //      return 240;                                                                             // Set virtual screen height to 240 lines...
975         return (vjs.hardwareTypeNTSC ? 240 : 256);
976 }
977
978 //
979 // TOM reset code
980 // Now PAL friendly!
981 //
982 void tom_reset(void)
983 {
984         op_reset();
985         blitter_reset();
986 //This should be done by JERRY!         pcm_reset();
987
988         memset(tom_ram_8, 0x00, 0x4000);
989
990         if (vjs.hardwareTypeNTSC)
991         {
992                 SET16(tom_ram_8, MEMCON1, 0x1861);
993                 SET16(tom_ram_8, MEMCON2, 0x35CC);
994                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period (1-based; HP=845)
995                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
996                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
997                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
998                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
999                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
1000                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
1001                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1002                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1003                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
1004                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
1005                 SET16(tom_ram_8, VMODE, 0x06C1);
1006         }
1007         else    // PAL Jaguar
1008         {
1009                 SET16(tom_ram_8, MEMCON1, 0x1861);
1010                 SET16(tom_ram_8, MEMCON2, 0x35CC);
1011                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
1012                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
1013                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
1014                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
1015                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
1016                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
1017                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
1018                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1019                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1020                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
1021                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
1022                 SET16(tom_ram_8, VMODE, 0x06C1);
1023         }
1024
1025         tom_width = tom_real_internal_width = 0;
1026         tom_height = 0;
1027
1028         tom_jerry_int_pending = 0;
1029         tom_timer_int_pending = 0;
1030         tom_object_int_pending = 0;
1031         tom_gpu_int_pending = 0;
1032         tom_video_int_pending = 0;
1033
1034         tom_timer_prescaler = 0;
1035         tom_timer_divider = 0;
1036         tom_timer_counter = 0;
1037         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1038 }
1039
1040 //
1041 // TOM byte access (read)
1042 //
1043 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
1044 {
1045 //???Is this needed???
1046 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1047 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1048 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1049 //      offset &= 0xFF3FFF;
1050
1051 #ifdef TOM_DEBUG
1052         WriteLog("TOM: Reading byte at %06X\n", offset);
1053 #endif
1054
1055         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1056                 return GPUReadByte(offset, who);
1057         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1058                 return GPUReadByte(offset, who);
1059         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1060                 return OPReadByte(offset, who);
1061         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1062                 return BlitterReadByte(offset, who);
1063         else if (offset == 0xF00050)
1064                 return tom_timer_prescaler >> 8;
1065         else if (offset == 0xF00051)
1066                 return tom_timer_prescaler & 0xFF;
1067         else if (offset == 0xF00052)
1068                 return tom_timer_divider >> 8;
1069         else if (offset == 0xF00053)
1070                 return tom_timer_divider & 0xFF;
1071
1072         return tom_ram_8[offset & 0x3FFF];
1073 }
1074
1075 //
1076 // TOM word access (read)
1077 //
1078 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1079 {
1080 //???Is this needed???
1081 //      offset &= 0xFF3FFF;
1082 #ifdef TOM_DEBUG
1083         WriteLog("TOM: Reading word at %06X\n", offset);
1084 #endif
1085 if (offset >= 0xF02000 && offset <= 0xF020FF)
1086         WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1087
1088         if (offset == 0xF000E0)
1089         {
1090                 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1091                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1092                         | (tom_video_int_pending << 0);
1093                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1094                 return data;
1095         }
1096 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1097 /*      else if (offset == 0xF00006)    // VC
1098         // What if we're in interlaced mode?
1099         // According to docs, in non-interlace mode VC is ALWAYS even...
1100 //              return (tom_scanline << 1);// + 1;
1101 //But it's causing Rayman to be fucked up... Why???
1102 //Because VC is even in NI mode when calling the OP! That's why!
1103                 return (tom_scanline << 1) + 1;//*/
1104         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1105                 return GPUReadWord(offset, who);
1106         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1107                 return GPUReadWord(offset, who);
1108         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1109                 return OPReadWord(offset, who);
1110         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1111                 return BlitterReadWord(offset, who);
1112         else if (offset == 0xF00050)
1113                 return tom_timer_prescaler;
1114         else if (offset == 0xF00052)
1115                 return tom_timer_divider;
1116
1117         offset &= 0x3FFF;
1118         return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1119 }
1120
1121 //
1122 // TOM byte access (write)
1123 //
1124 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1125 {
1126 //???Is this needed???
1127 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1128         offset &= 0xFF3FFF;
1129
1130 #ifdef TOM_DEBUG
1131         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1132 #endif
1133
1134         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1135         {
1136                 GPUWriteByte(offset, data, who);
1137                 return;
1138         }
1139         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1140         {
1141                 GPUWriteByte(offset, data, who);
1142                 return;
1143         }
1144         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1145         {
1146                 OPWriteByte(offset, data, who);
1147                 return;
1148         }
1149         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1150         {
1151                 BlitterWriteByte(offset, data, who);
1152                 return;
1153         }
1154         else if (offset == 0xF00050)
1155         {
1156                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
1157                 TOMResetPIT();
1158                 return;
1159         }
1160         else if (offset == 0xF00051)
1161         {
1162                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
1163                 TOMResetPIT();
1164                 return;
1165         }
1166         else if (offset == 0xF00052)
1167         {
1168                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
1169                 TOMResetPIT();
1170                 return;
1171         }
1172         else if (offset == 0xF00053)
1173         {
1174                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
1175                 TOMResetPIT();
1176                 return;
1177         }
1178         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
1179         {
1180                 // Writing to one CLUT writes to the other
1181                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1182                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
1183         }
1184
1185         tom_ram_8[offset & 0x3FFF] = data;
1186 }
1187
1188 //
1189 // TOM word access (write)
1190 //
1191 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1192 {
1193 //???Is this needed???
1194         offset &= 0xFF3FFF;
1195
1196 #ifdef TOM_DEBUG
1197         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1198 #endif
1199 if (offset == 0xF00000 + MEMCON1)
1200         WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1201 if (offset == 0xF00000 + MEMCON2)
1202         WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1203 if (offset >= 0xF02000 && offset <= 0xF020FF)
1204         WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1205
1206         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1207         {
1208                 GPUWriteWord(offset, data, who);
1209                 return;
1210         }
1211         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1212         {
1213                 GPUWriteWord(offset, data, who);
1214                 return;
1215         }
1216 //What's so special about this?
1217 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1218         {
1219                 TOMWriteByte(offset, data >> 8);
1220                 TOMWriteByte(offset+1, data & 0xFF);
1221         }*/
1222         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1223         {
1224                 OPWriteWord(offset, data, who);
1225                 return;
1226         }
1227         else if (offset == 0xF00050)
1228         {
1229                 tom_timer_prescaler = data;
1230                 TOMResetPIT();
1231                 return;
1232         }
1233         else if (offset == 0xF00052)
1234         {
1235                 tom_timer_divider = data;
1236                 TOMResetPIT();
1237                 return;
1238         }
1239         else if (offset == 0xF000E0)
1240         {
1241 //Check this out...
1242                 if (data & 0x0100)
1243                         tom_video_int_pending = 0;
1244                 if (data & 0x0200)
1245                         tom_gpu_int_pending = 0;
1246                 if (data & 0x0400)
1247                         tom_object_int_pending = 0;
1248                 if (data & 0x0800)
1249                         tom_timer_int_pending = 0;
1250                 if (data & 0x1000)
1251                         tom_jerry_int_pending = 0;
1252         }
1253         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1254         {
1255                 BlitterWriteWord(offset, data, who);
1256                 return;
1257         }
1258         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1259         {
1260                 // Writing to one CLUT writes to the other
1261                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1262 // Watch out for unaligned writes here! (Not fixed yet)
1263                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1264         }
1265
1266         offset &= 0x3FFF;
1267         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1268                 objectp_running = 1;
1269
1270         if (offset >= 0x30 && offset <= 0x4E)
1271                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1272         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1273                 data &= 0x03FF;                 // These are all 10-bit registers
1274
1275         TOMWriteByte(offset, data >> 8, who);
1276         TOMWriteByte(offset+1, data & 0xFF, who);
1277
1278 if (offset == VDB)
1279         WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1280 if (offset == VDE)
1281         WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1282 if (offset == VP)
1283         WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1284 if (offset == HDB1)
1285         WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1286 if (offset == HDE)
1287         WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1288 if (offset == HP)
1289         WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1290 if (offset == VBB)
1291         WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1292 if (offset == VBE)
1293         WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1294 if (offset == VS)
1295         WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1296 if (offset == VI)
1297         WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1298 if (offset == HBB)
1299         WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1300 if (offset == HBE)
1301         WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1302 if (offset == VMODE)
1303         WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tom_ram_8, VC));
1304
1305         // detect screen resolution changes
1306 //This may go away in the future, if we do the virtualized screen thing...
1307 //This may go away soon!
1308         if ((offset >= 0x28) && (offset <= 0x4F))
1309         {
1310                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1311                 tom_real_internal_width = width;
1312
1313                 if ((width != tom_width) || (height != tom_height))
1314                 {
1315                         tom_width = width, tom_height = height;
1316                         ResizeScreen(tom_width, tom_height);
1317                 }
1318         }
1319 }
1320
1321 int tom_irq_enabled(int irq)
1322 {
1323         // This is the correct byte in big endian... D'oh!
1324 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1325         return tom_ram_8[INT1 + 1/*0xE1*/] & (1 << irq);
1326 }
1327
1328 //unused
1329 /*void tom_set_irq_latch(int irq, int enabled)
1330 {
1331         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1332 }*/
1333
1334 //unused
1335 /*uint16 tom_irq_control_reg(void)
1336 {
1337         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1338 }*/
1339
1340 void TOMResetPIT(void)
1341 {
1342         if (!tom_timer_prescaler || !tom_timer_divider)
1343                 tom_timer_counter = 0;
1344         else
1345 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!!
1346 //Also, why +1???
1347                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1348 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1349 }
1350
1351 //
1352 // TOM Programmable Interrupt Timer handler
1353 //
1354 void TOMExecPIT(uint32 cycles)
1355 {
1356         if (tom_timer_counter > 0)
1357         {
1358                 tom_timer_counter -= cycles;
1359
1360                 if (tom_timer_counter <= 0)
1361                 {
1362                         tom_set_pending_timer_int();
1363                         GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE);
1364                         if (tom_irq_enabled(IRQ_TIMER) && jaguar_interrupt_handler_is_valid(64))
1365                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1366
1367                         TOMResetPIT();
1368                 }
1369         }
1370 }