Shamusworld >> Repos - virtualjaguar/blob - src/tom.cpp

   1 //
   2 // TOM Processing
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups and endian wrongness amelioration by James L. Hammons
   7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
   8 //       the braindead way in which MAME handles memory. :-)
   9 //
  10 // Note: TOM has only a 16K memory space
  11 //
  12 //      ------------------------------------------------------------
  13 //      TOM REGISTERS (Mapped by Aaron Giles)
  14 //      ------------------------------------------------------------
  15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
  16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
  17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
  18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
  19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
  20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
  21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
  22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
  23 //                            -------- -------x      (ROMHI - controls ROM mapping)
  24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
  25 //                            --x----- --------      (HILO - image display bit order)
  26 //                            ---x---- --------      (BIGEND - big endian addressing?)
  27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
  28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
  29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
  30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
  31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
  32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
  33 //                            -----x-- --------      (which half of the display)
  34 //                            ------xx xxxxxxxx      (10-bit counter)
  35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
  36 //                            ----x--- --------      (which field is being generated)
  37 //                            -----xxx xxxxxxxx      (11-bit counter)
  38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
  39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
  40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
  41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
  42 //      F00026            W   -------- -------x   OBF - object processor flag
  43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
  44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
  45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
  46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
  47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
  48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
  49 //                        W   -------- ---x----      (INCEN - encrustation enable)
  50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
  51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
  52 //                        W   -------- -------x      (VIDEN - enables video)
  53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
  54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
  55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
  56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
  57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
  58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
  59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
  60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
  61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
  62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
  63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
  64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
  65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
  66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
  67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
  68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
  69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
  70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
  71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
  72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
  73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
  74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
  75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
  76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
  77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
  78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
  79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
  80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
  81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
  82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
  83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
  84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
  85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
  86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
  87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
  88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
  89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
  90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
  91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
  92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
  93 //      ------------------------------------------------------------
  94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
  95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
  96 //                      R/W   x------- --------      (DMAEN - DMA enable)
  97 //                      R/W   -x------ --------      (REGPAGE - register page)
  98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
  99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
 100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
 101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
 102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
 103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
 104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
 105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
 106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
 107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
 108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
 109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
 110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
 111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
 112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
 113 //                        W   -------- ----x---      (MATCOL - column/row major)
 114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
 115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
 116 //      F0210C            W   -------- -----xxx   G_END - data organization register
 117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
 119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
 120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
 121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
 122 //                      R     xxxx---- --------      (VERSION - GPU version code)
 123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
 125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
 126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
 127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
 128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
 129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
 134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
 135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
 136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
 137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 138 //      ------------------------------------------------------------
 139 //      BLITTER REGISTERS
 140 //      ------------------------------------------------------------
 141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
 142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
 143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
 144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 146 //                        W   -------- -----x-- -------- --------      (Y add control)
 147 //                        W   -------- ------xx -------- --------      (X add control)
 148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
 153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
 154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
 155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
 156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
 159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
 162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
 163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
 164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
 165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
 166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
 167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
 168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
 169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
 170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
 171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
 172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
 173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
 174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
 175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 177 //                        W   -------- -----x-- -------- --------      (Y add control)
 178 //                        W   -------- ------xx -------- --------      (X add control)
 179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
 184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
 185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
 188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
 191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
 192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
 193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
 194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
 195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
 196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
 197 //                        W   -------x xxx----- -------- --------      (logical operation)
 198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
 199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
 200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
 201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
 202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
 203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
 204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
 205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
 206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
 207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
 208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
 209 //                        W   -------- -------- -------- x-------      (diagnostic use)
 210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
 211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
 212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
 213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
 214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
 215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
 216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
 217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
 218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
 219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
 220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
 221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
 222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
 223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
 224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
 225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
 226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
 227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
 228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
 229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
 230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
 231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
 232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
 233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
 234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
 235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
 236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
 237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
 238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
 239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
 240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
 241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
 242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
 243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
 244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
 245 //      ------------------------------------------------------------
 246
 247 //#include <SDL.h>
 248 #include "tom.h"
 249 #include "video.h"
 250 #include "gpu.h"
 251 #include "objectp.h"
 252 #include "cry2rgb.h"
 253 #include "settings.h"
 254
 255 // TOM registers (offset from $F00000)
 256
 257 #define MEMCON1         0x00
 258 #define MEMCON2         0x02
 259 #define HC                      0x04
 260 #define VC                      0x06
 261 #define VMODE           0x28
 262 #define   MODE          0x0006          // Line buffer to video generator mode
 263 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
 264 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode (only works in MODE 0!)
 265 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)
 266 #define BORD1           0x2A            // Border green/red values (8 BPP)
 267 #define BORD2           0x2C            // Border blue value (8 BPP)
 268 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
 269 #define HBB                     0x30
 270 #define HBE                     0x32
 271 #define HDB1            0x38
 272 #define HDB2            0x3A
 273 #define HDE                     0x3C
 274 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
 275 #define VBB                     0x40
 276 #define VBE                     0x42
 277 #define VS                      0x44
 278 #define VDB                     0x46
 279 #define VDE                     0x48
 280 #define VI                      0x4E
 281 #define BG                      0x58
 282 #define INT1            0xE0
 283
 284 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
 285 /*#define LEFT_VISIBLE_HC               208
 286 #define RIGHT_VISIBLE_HC        1528//*/
 287 #define LEFT_VISIBLE_HC         208
 288 #define RIGHT_VISIBLE_HC        1488
 289 //#define TOP_VISIBLE_VC                25
 290 //#define BOTTOM_VISIBLE_VC     503
 291 #define TOP_VISIBLE_VC          31
 292 #define BOTTOM_VISIBLE_VC       511
 293
 294 //This can be defined in the makefile as well...
 295 //(It's easier to do it here, though...)
 296 //#define TOM_DEBUG
 297
 298 extern uint32 jaguar_mainRom_crc32;
 299 extern uint8 objectp_running;
 300
 301 static uint8 * tom_ram_8;
 302 uint32 tom_width, tom_height, tom_real_internal_width;
 303 static uint32 tom_timer_prescaler;
 304 static uint32 tom_timer_divider;
 305 static int32 tom_timer_counter;
 306 //uint32 tom_scanline;
 307 //uint32 hblankWidthInPixels = 0;
 308 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
 309         tom_gpu_int_pending, tom_video_int_pending;
 310 uint16 * tom_cry_rgb_mix_lut;
 311 int16 * TOMBackbuffer;
 312
 313 static char * videoMode_to_str[8] =
 314         { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
 315           "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
 316
 317 typedef void (render_xxx_scanline_fn)(int16 *);
 318
 319 // Private function prototypes
 320
 321 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
 322 void tom_render_24bpp_scanline(int16 * backbuffer);
 323 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
 324 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
 325 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
 326
 327 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
 328 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
 329 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
 330 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
 331 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
 332
 333 render_xxx_scanline_fn * scanline_render_normal[]=
 334 {
 335         tom_render_16bpp_cry_scanline,
 336         tom_render_24bpp_scanline,
 337         tom_render_16bpp_direct_scanline,
 338         tom_render_16bpp_rgb_scanline,
 339         tom_render_16bpp_cry_rgb_mix_scanline,
 340         tom_render_24bpp_scanline,
 341         tom_render_16bpp_direct_scanline,
 342         tom_render_16bpp_rgb_scanline
 343 };
 344
 345 render_xxx_scanline_fn * scanline_render_stretch[]=
 346 {
 347         tom_render_16bpp_cry_stretch_scanline,
 348         tom_render_24bpp_stretch_scanline,
 349         tom_render_16bpp_direct_stretch_scanline,
 350         tom_render_16bpp_rgb_stretch_scanline,
 351         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
 352         tom_render_24bpp_stretch_scanline,
 353         tom_render_16bpp_direct_stretch_scanline,
 354         tom_render_16bpp_rgb_stretch_scanline,
 355 };
 356
 357 render_xxx_scanline_fn * scanline_render[8];
 358
 359
 360 // Screen info for various games...
 361 /*
 362 Doom
 363 TOM: Horizontal Display End written by M68K: 1727
 364 TOM: Horizontal Display Begin 1 written by M68K: 123
 365 TOM: Vertical Display Begin written by M68K: 25
 366 TOM: Vertical Display End written by M68K: 2047
 367 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
 368 Also does PWIDTH = 4...
 369 Vertical resolution: 238 lines
 370
 371 Rayman
 372 TOM: Horizontal Display End written by M68K: 1727
 373 TOM: Horizontal Display Begin 1 written by M68K: 123
 374 TOM: Vertical Display Begin written by M68K: 25
 375 TOM: Vertical Display End written by M68K: 2047
 376 TOM: Vertical Interrupt written by M68K: 507
 377 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
 378 TOM: Horizontal Display Begin 1 written by M68K: 208
 379 TOM: Horizontal Display End written by M68K: 1670
 380 Display starts at 31, then 52!
 381 Vertical resolution: 238 lines
 382
 383 Atari Karts
 384 TOM: Horizontal Display End written by M68K: 1727
 385 TOM: Horizontal Display Begin 1 written by M68K: 123
 386 TOM: Vertical Display Begin written by M68K: 25
 387 TOM: Vertical Display End written by M68K: 2047
 388 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
 389 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
 390 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
 391
 392 Iron Soldier
 393 TOM: Vertical Interrupt written by M68K: 2047
 394 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
 395 TOM: Horizontal Display End written by M68K: 1727
 396 TOM: Horizontal Display Begin 1 written by M68K: 123
 397 TOM: Vertical Display Begin written by M68K: 25
 398 TOM: Vertical Display End written by M68K: 2047
 399 TOM: Vertical Interrupt written by M68K: 507
 400 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
 401 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
 402 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
 403 Display starts at 31
 404 Vertical resolution: 238 lines
 405 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
 406
 407 JagMania
 408 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
 409 TOM: Horizontal Blank Begin written by M68K: 1713
 410 TOM: Horizontal Blank End written by M68K: 125
 411 TOM: Horizontal Display End written by M68K: 1696
 412 TOM: Horizontal Display Begin 1 written by M68K: 166
 413 TOM: Vertical Period written by M68K: 523 (non-interlaced)
 414 TOM: Vertical Blank End written by M68K: 24
 415 TOM: Vertical Display Begin written by M68K: 46
 416 TOM: Vertical Display End written by M68K: 496
 417 TOM: Vertical Blank Begin written by M68K: 500
 418 TOM: Vertical Sync written by M68K: 517
 419 TOM: Vertical Interrupt written by M68K: 497
 420 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
 421 Display starts at 55
 422
 423 Double Dragon V
 424 TOM: Horizontal Display End written by M68K: 1727
 425 TOM: Horizontal Display Begin 1 written by M68K: 123
 426 TOM: Vertical Display Begin written by M68K: 25
 427 TOM: Vertical Display End written by M68K: 2047
 428 TOM: Vertical Interrupt written by M68K: 507
 429 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
 430
 431 Dino Dudes
 432 TOM: Horizontal Display End written by M68K: 1823
 433 TOM: Horizontal Display Begin 1 written by M68K: 45
 434 TOM: Vertical Display Begin written by M68K: 40
 435 TOM: Vertical Display End written by M68K: 2047
 436 TOM: Vertical Interrupt written by M68K: 491
 437 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
 438 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
 439 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
 440 Vertical resolution: 238 lines
 441
 442 Flashback
 443 TOM: Horizontal Display End written by M68K: 1727
 444 TOM: Horizontal Display Begin 1 written by M68K: 188
 445 TOM: Vertical Display Begin written by M68K: 1
 446 TOM: Vertical Display End written by M68K: 2047
 447 TOM: Vertical Interrupt written by M68K: 483
 448 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
 449 Width would be 303 with above scheme, but border width would be 13 pixels
 450
 451 Trevor McFur
 452 Vertical resolution: 238 lines
 453 */
 454
 455
 456 void tom_calc_cry_rgb_mix_lut(void)
 457 {
 458         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
 459
 460         for (uint32 i=0; i<0x10000; i++)
 461         {
 462                 uint16 color = i;
 463
 464                 if (color & 0x01)
 465                 {
 466                         color >>= 1;
 467                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
 468                 }
 469                 else
 470                 {
 471                         uint32 chrm = (color & 0xF000) >> 12,
 472                                 chrl = (color & 0x0F00) >> 8,
 473                                 y = color & 0x00FF;
 474                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 475                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 476                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 477                         color = (red << 10) | (green << 5) | blue;
 478                 }
 479                 tom_cry_rgb_mix_lut[i] = color;
 480         }
 481 }
 482
 483 void tom_set_pending_jerry_int(void)
 484 {
 485         tom_jerry_int_pending = 1;
 486 }
 487
 488 void tom_set_pending_timer_int(void)
 489 {
 490         tom_timer_int_pending = 1;
 491 }
 492
 493 void tom_set_pending_object_int(void)
 494 {
 495         tom_object_int_pending = 1;
 496 }
 497
 498 void tom_set_pending_gpu_int(void)
 499 {
 500         tom_gpu_int_pending = 1;
 501 }
 502
 503 void tom_set_pending_video_int(void)
 504 {
 505         tom_video_int_pending = 1;
 506 }
 507
 508 uint8 * tom_get_ram_pointer(void)
 509 {
 510         return tom_ram_8;
 511 }
 512
 513 uint8 tom_getVideoMode(void)
 514 {
 515         uint16 vmode = GET16(tom_ram_8, VMODE);
 516         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
 517 }
 518
 519 //Used in only one place (and for debug purposes): OBJECTP.CPP
 520 uint16 tom_get_vdb(void)
 521 {
 522 // This in NOT VDB!!!
 523 //      return GET16(tom_ram_8, VBE);
 524         return GET16(tom_ram_8, VDB);
 525 }
 526
 527 //
 528 // 16 BPP CRY/RGB mixed mode rendering
 529 //
 530 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
 531 {
 532         uint16 width = tom_width;
 533         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 534
 535         //New stuff--restrict our drawing...
 536         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 537         //NOTE: May have to check HDB2 as well!
 538         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 539         startPos /= pwidth;
 540         if (startPos < 0)
 541                 current_line_buffer += 2 * -startPos;
 542         else
 543                 backbuffer += 2 * startPos, width -= startPos;
 544
 545         while (width)
 546         {
 547                 uint16 color = (*current_line_buffer++) << 8;
 548                 color |= *current_line_buffer++;
 549                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
 550                 width--;
 551         }
 552 }
 553
 554 //
 555 // 16 BPP CRY mode rendering
 556 //
 557 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
 558 {
 559         uint16 width = tom_width;
 560         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 561
 562         //New stuff--restrict our drawing...
 563         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 564         //NOTE: May have to check HDB2 as well!
 565         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 566         startPos /= pwidth;
 567         if (startPos < 0)
 568                 current_line_buffer += 2 * -startPos;
 569         else
 570                 backbuffer += 2 * startPos, width -= startPos;
 571
 572         while (width)
 573         {
 574                 uint16 color = (*current_line_buffer++) << 8;
 575                 color |= *current_line_buffer++;
 576
 577                 uint32 chrm = (color & 0xF000) >> 12,
 578                         chrl = (color & 0x0F00) >> 8,
 579                         y = (color & 0x00FF);
 580
 581                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 582                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 583                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 584
 585                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 586                 width--;
 587         }
 588 }
 589
 590 //
 591 // 24 BPP mode rendering
 592 //
 593 void tom_render_24bpp_scanline(int16 * backbuffer)
 594 {
 595         uint16 width = tom_width;
 596         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 597
 598         //New stuff--restrict our drawing...
 599         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 600         //NOTE: May have to check HDB2 as well!
 601         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 602         startPos /= pwidth;
 603         if (startPos < 0)
 604                 current_line_buffer += 4 * -startPos;
 605         else
 606                 backbuffer += 2 * startPos, width -= startPos;
 607
 608         while (width)
 609         {
 610                 // This is NOT a good 8 -> 5 bit RGB conversion! (It saturates values below 8
 611                 // to zero and throws away almost *half* the color resolution!)
 612                 uint16 green = (*current_line_buffer++) >> 3;
 613                 uint16 red = (*current_line_buffer++) >> 3;
 614                 current_line_buffer++;
 615                 uint16 blue = (*current_line_buffer++) >> 3;
 616                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 617                 width--;
 618         }
 619 }
 620
 621 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
 622 //extra hardware outside of the Jaguar console to support this!
 623 //
 624 // 16 BPP direct mode rendering
 625 //
 626 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
 627 {
 628         uint16 width = tom_width;
 629         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 630
 631         while (width)
 632         {
 633                 uint16 color = (*current_line_buffer++) << 8;
 634                 color |= *current_line_buffer++;
 635                 *backbuffer++ = color >> 1;
 636                 width--;
 637         }
 638 }
 639
 640 //
 641 // 16 BPP RGB mode rendering
 642 //
 643 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
 644 {
 645         uint16 width = tom_width;
 646         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 647
 648         //New stuff--restrict our drawing...
 649         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 650         //NOTE: May have to check HDB2 as well!
 651         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 652         startPos /= pwidth;
 653         if (startPos < 0)
 654                 current_line_buffer += 2 * -startPos;
 655         else
 656                 backbuffer += 2 * startPos, width -= startPos;
 657
 658         while (width)
 659         {
 660                 uint16 color = (*current_line_buffer++) << 8;
 661                 color = (color | *current_line_buffer++) >> 1;
 662                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
 663                 *backbuffer++ = color;
 664                 width--;
 665         }
 666 }
 667
 668 // This stuff may just go away by itself, especially if we do some
 669 // good old OpenGL goodness...
 670
 671 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
 672 {
 673         uint16 width=tom_width;
 674         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 675
 676         while (width)
 677         {
 678                 uint16 color;
 679                 color=*current_line_buffer++;
 680                 color<<=8;
 681                 color|=*current_line_buffer++;
 682                 *backbuffer++=tom_cry_rgb_mix_lut[color];
 683                 current_line_buffer+=2;
 684                 width--;
 685         }
 686 }
 687
 688 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
 689 {
 690         uint32 chrm, chrl, y;
 691
 692         uint16 width=tom_width;
 693         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 694
 695         while (width)
 696         {
 697                 uint16 color;
 698                 color=*current_line_buffer++;
 699                 color<<=8;
 700                 color|=*current_line_buffer++;
 701
 702                 chrm = (color & 0xF000) >> 12;
 703                 chrl = (color & 0x0F00) >> 8;
 704                 y    = (color & 0x00FF);
 705
 706                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
 707                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
 708                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
 709
 710                 uint16 color2;
 711                 color2=*current_line_buffer++;
 712                 color2<<=8;
 713                 color2|=*current_line_buffer++;
 714
 715                 chrm = (color2 & 0xF000) >> 12;
 716                 chrl = (color2 & 0x0F00) >> 8;
 717                 y    = (color2 & 0x00FF);
 718
 719                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
 720                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
 721                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
 722
 723                 red=(red+red2)>>1;
 724                 green=(green+green2)>>1;
 725                 blue=(blue+blue2)>>1;
 726
 727                 *backbuffer++=(red<<10)|(green<<5)|blue;
 728                 width--;
 729         }
 730 }
 731
 732 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
 733 {
 734         uint16 width=tom_width;
 735         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 736
 737         while (width)
 738         {
 739                 uint16 green=*current_line_buffer++;
 740                 uint16 red=*current_line_buffer++;
 741                 /*uint16 nc=*/current_line_buffer++;
 742                 uint16 blue=*current_line_buffer++;
 743                 red>>=3;
 744                 green>>=3;
 745                 blue>>=3;
 746                 *backbuffer++=(red<<10)|(green<<5)|blue;
 747                 current_line_buffer+=4;
 748                 width--;
 749         }
 750 }
 751
 752 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
 753 {
 754         uint16 width=tom_width;
 755         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 756
 757         while (width)
 758         {
 759                 uint16 color=*current_line_buffer++;
 760                 color<<=8;
 761                 color|=*current_line_buffer++;
 762                 color>>=1;
 763                 *backbuffer++=color;
 764                 current_line_buffer+=2;
 765                 width--;
 766         }
 767 }
 768
 769 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
 770 {
 771         uint16 width=tom_width;
 772         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 773
 774         while (width)
 775         {
 776                 uint16 color1=*current_line_buffer++;
 777                 color1<<=8;
 778                 color1|=*current_line_buffer++;
 779                 color1>>=1;
 780                 uint16 color2=*current_line_buffer++;
 781                 color2<<=8;
 782                 color2|=*current_line_buffer++;
 783                 color2>>=1;
 784                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
 785                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
 786                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
 787
 788                 color1=(red<<10)|(blue<<5)|green;
 789                 *backbuffer++=color1;
 790                 width--;
 791         }
 792 }
 793
 794 void TOMResetBackbuffer(int16 * backbuffer)
 795 {
 796         TOMBackbuffer = backbuffer;
 797 }
 798
 799 //
 800 // Process a single scanline
 801 //
 802 void TOMExecScanline(uint16 scanline, bool render)
 803 {
 804         bool inActiveDisplayArea = true;
 805
 806 //Interlacing is still not handled correctly here... !!! FIX !!!
 807         if (scanline & 0x01)                                                    // Execute OP only on even lines (non-interlaced only!)
 808                 return;
 809
 810         if (scanline >= (uint16)GET16(tom_ram_8, VDB) && scanline < (uint16)GET16(tom_ram_8, VDE))
 811         {
 812                 if (render)
 813                 {
 814                         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 815                         uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG + 1];
 816
 817                         // Clear line buffer with BG
 818                         if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
 819                                 for(uint32 i=0; i<720; i++)
 820                                         *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
 821
 822                         OPProcessList(scanline, render);
 823                 }
 824         }
 825         else
 826                 inActiveDisplayArea = false;
 827
 828         // Here's our virtualized scanline code...
 829         if (scanline >= TOP_VISIBLE_VC && scanline < BOTTOM_VISIBLE_VC)
 830         {
 831                 if (inActiveDisplayArea)
 832                         scanline_render[tom_getVideoMode()](TOMBackbuffer);
 833                 else
 834                 {
 835                         // If outside of VDB & VDE, then display the border color
 836                         int16 * currentLineBuffer = TOMBackbuffer;
 837                         uint8 g = tom_ram_8[BORD1], r = tom_ram_8[BORD1 + 1], b = tom_ram_8[BORD2 + 1];
 838                         uint16 pixel = ((r & 0xF8) << 7) | ((g & 0xF8) << 2) | (b >> 3);
 839
 840                         for(uint32 i=0; i<tom_width; i++)
 841                                 *currentLineBuffer++ = pixel;
 842                 }
 843
 844                 TOMBackbuffer += GetSDLScreenPitch() / 2;       // Returns bytes, but we need words
 845         }
 846 }
 847
 848 //
 849 // TOM initialization
 850 //
 851 void tom_init(void)
 852 {
 853         op_init();
 854         blitter_init();
 855 //This should be done by JERRY! pcm_init();
 856         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
 857         tom_reset();
 858         // Setup the non-stretchy scanline rendering...
 859         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 860         tom_calc_cry_rgb_mix_lut();
 861 }
 862
 863 void tom_done(void)
 864 {
 865         op_done();
 866 //This should be done by JERRY! pcm_done();
 867         blitter_done();
 868         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
 869                 videoMode_to_str[tom_getVideoMode()]);
 870 //      WriteLog("\ntom: object processor:\n");
 871 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
 872 //      WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
 873 //      gpu_done();
 874 //      dsp_done();
 875         memory_free(tom_ram_8);
 876 }
 877
 878 /*uint32 tom_getHBlankWidthInPixels(void)
 879 {
 880         return hblankWidthInPixels;
 881 }*/
 882
 883 uint32 tom_getVideoModeWidth(void)
 884 {
 885         //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
 886 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
 887 //Temporary, for testing Doom...
 888 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
 889
 890         // Note that the following PWIDTH values have the following pixel aspect ratios:
 891         // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
 892         // PWIDTH = 2 -> 0.50:1 (1:2) pixels
 893         // PWIDTH = 3 -> 0.75:1 (3:4) pixels
 894         // PWIDTH = 4 -> 1.00:1 (1:1) pixels
 895         // PWIDTH = 5 -> 1.25:1 (5:4) pixels
 896         // PWIDTH = 6 -> 1.50:1 (3:2) pixels
 897         // PWIDTH = 7 -> 1.75:1 (7:4) pixels
 898         // PWIDTH = 8 -> 2.00:1 (2:1) pixels
 899
 900         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
 901         // this implies that the other modes have pixels that are *not* square!
 902         // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
 903
 904         // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
 905         //       so we don't bother to add one...
 906 //      return width[(GET16(tom_ram_8, VMODE) & PWIDTH) >> 9];
 907
 908         // Now, we just calculate it...
 909 /*      uint16 hdb1 = GET16(tom_ram_8, HDB1), hde = GET16(tom_ram_8, HDE),
 910                 hbb = GET16(tom_ram_8, HBB), pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 911 //      return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
 912 //Temporary, for testing Doom...
 913         return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
 914
 915         // To make it easier to make a quasi-fixed display size, we restrict the viewing
 916         // area to an arbitrary range of the Horizontal Count.
 917         uint16 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 918 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / pwidth;
 919 //Temporary, for testing Doom...
 920         return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
 921 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
 922
 923 // More speculating...
 924 // According to the JTRM, the number of potential pixels across is given by the
 925 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
 926 // zero to this value twice per scanline (the high bit is set on the second count).
 927 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
 928 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
 929 // HDB1, it starts fetching the line from position 0 in LBUF.
 930
 931 // The trick, it would seem, is to figure out how long the typical visible scanline
 932 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
 933 // course). Using that length, we can establish an "absolute left display limit" with
 934 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
 935 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
 936 // backbuffer + 5 pixels).
 937
 938 // That's basically what we're doing now...!
 939 }
 940
 941 // *** SPECULATION ***
 942 // It might work better to virtualize the height settings, i.e., set the vertical
 943 // height at 240 lines and clip using the VDB and VDE/VP registers...
 944 // Same with the width... [Width is pretty much virtualized now.]
 945
 946 // Now that that the width is virtualized, let's virtualize the height. :-)
 947 uint32 tom_getVideoModeHeight(void)
 948 {
 949 //      uint16 vmode = GET16(tom_ram_8, VMODE);
 950 //      uint16 vbe = GET16(tom_ram_8, VBE);
 951 //      uint16 vbb = GET16(tom_ram_8, VBB);
 952 //      uint16 vdb = GET16(tom_ram_8, VDB);
 953 //      uint16 vde = GET16(tom_ram_8, VDE);
 954 //      uint16 vp = GET16(tom_ram_8, VP);
 955
 956 /*      if (vde == 0xFFFF)
 957                 vde = vbb;//*/
 958
 959 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
 960         // The video mode height probably works this way:
 961         // VC counts from 0 to VP. VDB starts the OP. Either when
 962         // VDE is reached or VP, the OP is stopped. Let's try it...
 963         // Also note that we're conveniently ignoring interlaced display modes...!
 964 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
 965 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
 966 //Let's try from the Vertical Blank interval...
 967 //Seems to work OK!
 968 //      return (vbb - vbe) >> 1;        // Again, doesn't take interlacing into account...
 969 // This of course doesn't take interlacing into account. But I haven't seen any
 970 // Jaguar software that takes advantage of it either...
 971 //Also, doesn't reflect PAL Jaguar either... !!! FIX !!!
 972         return 240;                                                                             // Set virtual screen height to 240 lines...
 973 }
 974
 975 //
 976 // TOM reset code
 977 // Now PAL friendly!
 978 //
 979 void tom_reset(void)
 980 {
 981 //      extern bool hardwareTypeNTSC;
 982
 983         op_reset();
 984         blitter_reset();
 985 //This should be done by JERRY!         pcm_reset();
 986
 987         memset(tom_ram_8, 0x00, 0x4000);
 988
 989         if (vjs.hardwareTypeNTSC)
 990         {
 991                 SET16(tom_ram_8, MEMCON1, 0x1861);
 992                 SET16(tom_ram_8, MEMCON2, 0x35CC);
 993                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period (1-based; HP=845)
 994                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
 995                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
 996                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
 997                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
 998                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
 999                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
1000                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1001                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1002                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
1003                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
1004                 SET16(tom_ram_8, VMODE, 0x06C1);
1005         }
1006         else    // PAL Jaguar
1007         {
1008                 SET16(tom_ram_8, MEMCON1, 0x1861);
1009                 SET16(tom_ram_8, MEMCON2, 0x35CC);
1010                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
1011                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
1012                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
1013                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
1014                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
1015                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
1016                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
1017                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1018                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1019                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
1020                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
1021                 SET16(tom_ram_8, VMODE, 0x06C1);
1022         }
1023
1024         tom_width = tom_real_internal_width = 0;
1025         tom_height = 0;
1026
1027         tom_jerry_int_pending = 0;
1028         tom_timer_int_pending = 0;
1029         tom_object_int_pending = 0;
1030         tom_gpu_int_pending = 0;
1031         tom_video_int_pending = 0;
1032
1033         tom_timer_prescaler = 0;
1034         tom_timer_divider = 0;
1035         tom_timer_counter = 0;
1036         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1037 }
1038
1039 //
1040 // TOM byte access (read)
1041 //
1042 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
1043 {
1044 //???Is this needed???
1045 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1046 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1047 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1048 //      offset &= 0xFF3FFF;
1049
1050 #ifdef TOM_DEBUG
1051         WriteLog("TOM: Reading byte at %06X\n", offset);
1052 #endif
1053
1054         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1055                 return GPUReadByte(offset, who);
1056         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1057                 return GPUReadByte(offset, who);
1058         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1059                 return OPReadByte(offset, who);
1060         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1061                 return BlitterReadByte(offset, who);
1062         else if (offset == 0xF00050)
1063                 return tom_timer_prescaler >> 8;
1064         else if (offset == 0xF00051)
1065                 return tom_timer_prescaler & 0xFF;
1066         else if (offset == 0xF00052)
1067                 return tom_timer_divider >> 8;
1068         else if (offset == 0xF00053)
1069                 return tom_timer_divider & 0xFF;
1070
1071         return tom_ram_8[offset & 0x3FFF];
1072 }
1073
1074 //
1075 // TOM word access (read)
1076 //
1077 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1078 {
1079 //???Is this needed???
1080 //      offset &= 0xFF3FFF;
1081 #ifdef TOM_DEBUG
1082         WriteLog("TOM: Reading word at %06X\n", offset);
1083 #endif
1084 if (offset >= 0xF02000 && offset <= 0xF020FF)
1085         WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1086
1087         if (offset == 0xF000E0)
1088         {
1089                 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1090                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1091                         | (tom_video_int_pending << 0);
1092                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1093                 return data;
1094         }
1095 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1096 /*      else if (offset == 0xF00006)    // VC
1097         // What if we're in interlaced mode?
1098         // According to docs, in non-interlace mode VC is ALWAYS even...
1099 //              return (tom_scanline << 1);// + 1;
1100 //But it's causing Rayman to be fucked up... Why???
1101 //Because VC is even in NI mode when calling the OP! That's why!
1102                 return (tom_scanline << 1) + 1;//*/
1103         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1104                 return GPUReadWord(offset, who);
1105         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1106                 return GPUReadWord(offset, who);
1107         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1108                 return OPReadWord(offset, who);
1109         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1110                 return BlitterReadWord(offset, who);
1111         else if (offset == 0xF00050)
1112                 return tom_timer_prescaler;
1113         else if (offset == 0xF00052)
1114                 return tom_timer_divider;
1115
1116         offset &= 0x3FFF;
1117         return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1118 }
1119
1120 //
1121 // TOM byte access (write)
1122 //
1123 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1124 {
1125 //???Is this needed???
1126 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1127         offset &= 0xFF3FFF;
1128
1129 #ifdef TOM_DEBUG
1130         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1131 #endif
1132
1133         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1134         {
1135                 GPUWriteByte(offset, data, who);
1136                 return;
1137         }
1138         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1139         {
1140                 GPUWriteByte(offset, data, who);
1141                 return;
1142         }
1143         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1144         {
1145                 OPWriteByte(offset, data, who);
1146                 return;
1147         }
1148         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1149         {
1150                 BlitterWriteByte(offset, data, who);
1151                 return;
1152         }
1153         else if (offset == 0xF00050)
1154         {
1155                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
1156                 TOMResetPIT();
1157                 return;
1158         }
1159         else if (offset == 0xF00051)
1160         {
1161                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
1162                 TOMResetPIT();
1163                 return;
1164         }
1165         else if (offset == 0xF00052)
1166         {
1167                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
1168                 TOMResetPIT();
1169                 return;
1170         }
1171         else if (offset == 0xF00053)
1172         {
1173                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
1174                 TOMResetPIT();
1175                 return;
1176         }
1177         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
1178         {
1179                 // Writing to one CLUT writes to the other
1180                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1181                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
1182         }
1183
1184         tom_ram_8[offset & 0x3FFF] = data;
1185 }
1186
1187 //
1188 // TOM word access (write)
1189 //
1190 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1191 {
1192 //???Is this needed???
1193         offset &= 0xFF3FFF;
1194
1195 #ifdef TOM_DEBUG
1196         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1197 #endif
1198 if (offset == 0xF00000 + MEMCON1)
1199         WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1200 if (offset == 0xF00000 + MEMCON2)
1201         WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1202 if (offset >= 0xF02000 && offset <= 0xF020FF)
1203         WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1204
1205         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1206         {
1207                 GPUWriteWord(offset, data, who);
1208                 return;
1209         }
1210         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1211         {
1212                 GPUWriteWord(offset, data, who);
1213                 return;
1214         }
1215 //What's so special about this?
1216 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1217         {
1218                 TOMWriteByte(offset, data >> 8);
1219                 TOMWriteByte(offset+1, data & 0xFF);
1220         }*/
1221         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1222         {
1223                 OPWriteWord(offset, data, who);
1224                 return;
1225         }
1226         else if (offset == 0xF00050)
1227         {
1228                 tom_timer_prescaler = data;
1229                 TOMResetPIT();
1230                 return;
1231         }
1232         else if (offset == 0xF00052)
1233         {
1234                 tom_timer_divider = data;
1235                 TOMResetPIT();
1236                 return;
1237         }
1238         else if (offset == 0xF000E0)
1239         {
1240 //Check this out...
1241                 if (data & 0x0100)
1242                         tom_video_int_pending = 0;
1243                 if (data & 0x0200)
1244                         tom_gpu_int_pending = 0;
1245                 if (data & 0x0400)
1246                         tom_object_int_pending = 0;
1247                 if (data & 0x0800)
1248                         tom_timer_int_pending = 0;
1249                 if (data & 0x1000)
1250                         tom_jerry_int_pending = 0;
1251         }
1252         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1253         {
1254                 BlitterWriteWord(offset, data, who);
1255                 return;
1256         }
1257         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1258         {
1259                 // Writing to one CLUT writes to the other
1260                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1261 // Watch out for unaligned writes here! (Not fixed yet)
1262                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1263         }
1264
1265         offset &= 0x3FFF;
1266         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1267                 objectp_running = 1;
1268
1269         if (offset >= 0x30 && offset <= 0x4E)
1270                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1271         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1272                 data &= 0x03FF;                 // These are all 10-bit registers
1273
1274         TOMWriteByte(offset, data >> 8, who);
1275         TOMWriteByte(offset+1, data & 0xFF, who);
1276
1277 if (offset == VDB)
1278         WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1279 if (offset == VDE)
1280         WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1281 if (offset == VP)
1282         WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1283 if (offset == HDB1)
1284         WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1285 if (offset == HDE)
1286         WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1287 if (offset == HP)
1288         WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1289 if (offset == VBB)
1290         WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1291 if (offset == VBE)
1292         WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1293 if (offset == VS)
1294         WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1295 if (offset == VI)
1296         WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1297 if (offset == HBB)
1298         WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1299 if (offset == HBE)
1300         WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1301 if (offset == VMODE)
1302         WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tom_ram_8, VC));
1303
1304         // detect screen resolution changes
1305 //This may go away in the future, if we do the virtualized screen thing...
1306 //This may go away soon!
1307         if ((offset >= 0x28) && (offset <= 0x4F))
1308         {
1309                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1310                 tom_real_internal_width = width;
1311
1312                 if ((width != tom_width) || (height != tom_height))
1313                 {
1314                         tom_width = width, tom_height = height;
1315                         ResizeScreen(tom_width, tom_height);
1316                 }
1317         }
1318 }
1319
1320 int tom_irq_enabled(int irq)
1321 {
1322         // This is the correct byte in big endian... D'oh!
1323 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1324         return tom_ram_8[INT1 + 1/*0xE1*/] & (1 << irq);
1325 }
1326
1327 //unused
1328 /*void tom_set_irq_latch(int irq, int enabled)
1329 {
1330         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1331 }*/
1332
1333 //unused
1334 /*uint16 tom_irq_control_reg(void)
1335 {
1336         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1337 }*/
1338
1339 void TOMResetPIT(void)
1340 {
1341         if (!tom_timer_prescaler || !tom_timer_divider)
1342                 tom_timer_counter = 0;
1343         else
1344 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!!
1345 //Also, why +1???
1346                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1347 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1348 }
1349
1350 //
1351 // TOM Programmable Interrupt Timer handler
1352 //
1353 void TOMExecPIT(uint32 cycles)
1354 {
1355         if (tom_timer_counter > 0)
1356         {
1357                 tom_timer_counter -= cycles;
1358
1359                 if (tom_timer_counter <= 0)
1360                 {
1361                         tom_set_pending_timer_int();
1362                         GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE);
1363                         if (tom_irq_enabled(IRQ_TIMER) && jaguar_interrupt_handler_is_valid(64))
1364                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1365
1366                         TOMResetPIT();
1367                 }
1368         }
1369 }