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Changes for 32BPP rendering
[virtualjaguar] / src / tom.cpp
1 //
2 // TOM Processing
3 //
4 // by cal2
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Cleanups and endian wrongness amelioration by James L. Hammons
7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
8 //       the braindead way in which MAME handles memory. :-)
9 //
10 // Note: TOM has only a 16K memory space
11 //
12 //      ------------------------------------------------------------
13 //      TOM REGISTERS (Mapped by Aaron Giles)
14 //      ------------------------------------------------------------
15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
23 //                            -------- -------x      (ROMHI - controls ROM mapping)
24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
25 //                            --x----- --------      (HILO - image display bit order)
26 //                            ---x---- --------      (BIGEND - big endian addressing?)
27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
33 //                            -----x-- --------      (which half of the display)
34 //                            ------xx xxxxxxxx      (10-bit counter)
35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
36 //                            ----x--- --------      (which field is being generated)
37 //                            -----xxx xxxxxxxx      (11-bit counter)
38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
42 //      F00026            W   -------- -------x   OBF - object processor flag
43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
49 //                        W   -------- ---x----      (INCEN - encrustation enable)
50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
52 //                        W   -------- -------x      (VIDEN - enables video)
53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
93 //      ------------------------------------------------------------
94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
96 //                      R/W   x------- --------      (DMAEN - DMA enable)
97 //                      R/W   -x------ --------      (REGPAGE - register page)
98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
113 //                        W   -------- ----x---      (MATCOL - column/row major)
114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
116 //      F0210C            W   -------- -----xxx   G_END - data organization register
117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
122 //                      R     xxxx---- --------      (VERSION - GPU version code)
123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
138 //      ------------------------------------------------------------
139 //      BLITTER REGISTERS
140 //      ------------------------------------------------------------
141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
146 //                        W   -------- -----x-- -------- --------      (Y add control)
147 //                        W   -------- ------xx -------- --------      (X add control)
148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
177 //                        W   -------- -----x-- -------- --------      (Y add control)
178 //                        W   -------- ------xx -------- --------      (X add control)
179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
197 //                        W   -------x xxx----- -------- --------      (logical operation)
198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
209 //                        W   -------- -------- -------- x-------      (diagnostic use)
210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
245 //      ------------------------------------------------------------
246
247 //#include <SDL.h>
248 #include "tom.h"
249 #include "video.h"
250 #include "gpu.h"
251 #include "objectp.h"
252 #include "cry2rgb.h"
253 #include "settings.h"
254
255 // TOM registers (offset from $F00000)
256
257 #define MEMCON1         0x00
258 #define MEMCON2         0x02
259 #define HC                      0x04
260 #define VC                      0x06
261 #define VMODE           0x28
262 #define   MODE          0x0006          // Line buffer to video generator mode
263 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
264 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode (only works in MODE 0!)
265 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)
266 #define BORD1           0x2A            // Border green/red values (8 BPP)
267 #define BORD2           0x2C            // Border blue value (8 BPP)
268 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
269 #define HBB                     0x30
270 #define HBE                     0x32
271 #define HDB1            0x38
272 #define HDB2            0x3A
273 #define HDE                     0x3C
274 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
275 #define VBB                     0x40
276 #define VBE                     0x42
277 #define VS                      0x44
278 #define VDB                     0x46
279 #define VDE                     0x48
280 #define VI                      0x4E
281 #define BG                      0x58
282 #define INT1            0xE0
283
284 //NOTE: These arbitrary cutoffs are NOT taken into account for PAL jaguar screens. !!! FIX !!!
285
286 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
287 /*#define LEFT_VISIBLE_HC                       208
288 #define RIGHT_VISIBLE_HC                1528//*/
289 #define LEFT_VISIBLE_HC                 208
290 #define RIGHT_VISIBLE_HC                1488
291 //#define TOP_VISIBLE_VC                25
292 //#define BOTTOM_VISIBLE_VC             503
293 #define TOP_VISIBLE_VC                  31
294 #define BOTTOM_VISIBLE_VC               511
295
296 //Are these PAL horizontals correct?
297 //They seem to be for the most part, but there are some games that seem to be
298 //shifted over to the right from this "window".
299 #define LEFT_VISIBLE_HC_PAL             208
300 #define RIGHT_VISIBLE_HC_PAL    1488
301 #define TOP_VISIBLE_VC_PAL              67
302 #define BOTTOM_VISIBLE_VC_PAL   579
303
304 //This can be defined in the makefile as well...
305 //(It's easier to do it here, though...)
306 //#define TOM_DEBUG
307
308 extern uint8 objectp_running;
309
310 static uint8 * tom_ram_8;
311 uint32 tom_width, tom_height, tom_real_internal_width;
312 static uint32 tom_timer_prescaler;
313 static uint32 tom_timer_divider;
314 static int32 tom_timer_counter;
315 //uint32 tom_scanline;
316 //uint32 hblankWidthInPixels = 0;
317 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
318         tom_gpu_int_pending, tom_video_int_pending;
319 uint16 * tom_cry_rgb_mix_lut;
320 //int16 * TOMBackbuffer;
321 uint32 * TOMBackbuffer;
322
323 static char * videoMode_to_str[8] =
324         { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
325           "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
326
327 typedef void (render_xxx_scanline_fn)(uint32 *);
328
329 // Private function prototypes
330
331 void tom_render_16bpp_cry_scanline(uint32 * backbuffer);
332 void tom_render_24bpp_scanline(uint32 * backbuffer);
333 void tom_render_16bpp_direct_scanline(uint32 * backbuffer);
334 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer);
335 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer);
336
337 void tom_render_16bpp_cry_stretch_scanline(uint32 * backbuffer);
338 void tom_render_24bpp_stretch_scanline(uint32 * backbuffer);
339 void tom_render_16bpp_direct_stretch_scanline(uint32 * backbuffer);
340 void tom_render_16bpp_rgb_stretch_scanline(uint32 * backbuffer);
341 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(uint32 * backbuffer);
342
343 render_xxx_scanline_fn * scanline_render_normal[]=
344 {
345         tom_render_16bpp_cry_scanline,
346         tom_render_24bpp_scanline,
347         tom_render_16bpp_direct_scanline,
348         tom_render_16bpp_rgb_scanline,
349         tom_render_16bpp_cry_rgb_mix_scanline,
350         tom_render_24bpp_scanline,
351         tom_render_16bpp_direct_scanline,
352         tom_render_16bpp_rgb_scanline
353 };
354
355 render_xxx_scanline_fn * scanline_render_stretch[]=
356 {
357         tom_render_16bpp_cry_stretch_scanline,
358         tom_render_24bpp_stretch_scanline,
359         tom_render_16bpp_direct_stretch_scanline,
360         tom_render_16bpp_rgb_stretch_scanline,
361         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
362         tom_render_24bpp_stretch_scanline,
363         tom_render_16bpp_direct_stretch_scanline,
364         tom_render_16bpp_rgb_stretch_scanline,
365 };
366
367 render_xxx_scanline_fn * scanline_render[8];
368
369
370 // Screen info for various games [PAL]...
371 /*
372 BIOS
373 TOM: Horizontal Period written by M68K: 850 (+1*2 = 1702)
374 TOM: Horizontal Blank Begin written by M68K: 1711
375 TOM: Horizontal Blank End written by M68K: 158
376 TOM: Horizontal Display End written by M68K: 1696
377 TOM: Horizontal Display Begin 1 written by M68K: 166
378 TOM: Vertical Period written by M68K: 623 (non-interlaced)
379 TOM: Vertical Blank End written by M68K: 34
380 TOM: Vertical Display Begin written by M68K: 46
381 TOM: Vertical Display End written by M68K: 526
382 TOM: Vertical Blank Begin written by M68K: 600
383 TOM: Vertical Sync written by M68K: 618
384 TOM: Horizontal Display End written by M68K: 1665
385 TOM: Horizontal Display Begin 1 written by M68K: 203
386 TOM: Vertical Display Begin written by M68K: 38
387 TOM: Vertical Display End written by M68K: 518
388 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 151)
389 TOM: Horizontal Display End written by M68K: 1713
390 TOM: Horizontal Display Begin 1 written by M68K: 157
391 TOM: Vertical Display Begin written by M68K: 35
392 TOM: Vertical Display End written by M68K: 2047
393 Horizontal range: 157 - 1713 (width: 1557 / 4 = 389.25, / 5 = 315.4)
394
395 Asteroid
396 TOM: Horizontal Period written by M68K: 845 (+1*2 = 1692)
397 TOM: Horizontal Blank Begin written by M68K: 1700
398 TOM: Horizontal Blank End written by M68K: 122
399 TOM: Horizontal Display End written by M68K: 1600
400 TOM: Horizontal Display Begin 1 written by M68K: 268
401 TOM: Vertical Period written by M68K: 523 (non-interlaced)
402 TOM: Vertical Blank End written by M68K: 40
403 TOM: Vertical Display Begin written by M68K: 44
404 TOM: Vertical Display End written by M68K: 492
405 TOM: Vertical Blank Begin written by M68K: 532
406 TOM: Vertical Sync written by M68K: 513
407 TOM: Video Mode written by M68K: 04C7. PWIDTH = 3, MODE = 16 BPP RGB, flags: BGEN (VC = 461)
408
409 Rayman
410 TOM: Horizontal Display End written by M68K: 1713
411 TOM: Horizontal Display Begin 1 written by M68K: 157
412 TOM: Vertical Display Begin written by M68K: 35
413 TOM: Vertical Display End written by M68K: 2047
414 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 89)
415 TOM: Horizontal Display Begin 1 written by M68K: 208
416 TOM: Horizontal Display End written by M68K: 1662
417 TOM: Vertical Display Begin written by M68K: 100
418 TOM: Vertical Display End written by M68K: 2047
419 TOM: Video Mode written by M68K: 07C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN VARMOD (VC = 205)
420 Horizontal range: 208 - 1662 (width: 1455 / 4 = 363.5)
421
422 Alien vs Predator
423 TOM: Vertical Display Begin written by M68K: 96
424 TOM: Vertical Display End written by M68K: 2047
425 TOM: Horizontal Display Begin 1 written by M68K: 239
426 TOM: Horizontal Display End written by M68K: 1692
427 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 378)
428 TOM: Vertical Display Begin written by M68K: 44
429 TOM: Vertical Display End written by M68K: 2047
430 TOM: Horizontal Display Begin 1 written by M68K: 239
431 TOM: Horizontal Display End written by M68K: 1692
432 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 559)
433 TOM: Vertical Display Begin written by M68K: 84
434 TOM: Vertical Display End written by M68K: 2047
435 TOM: Horizontal Display Begin 1 written by M68K: 239
436 TOM: Horizontal Display End written by M68K: 1692
437 TOM: Vertical Display Begin written by M68K: 44
438 TOM: Vertical Display End written by M68K: 2047
439 TOM: Horizontal Display Begin 1 written by M68K: 239
440 TOM: Horizontal Display End written by M68K: 1692
441 Horizontal range: 239 - 1692 (width: 1454 / 4 = 363.5)
442
443 */
444
445 // Screen info for various games [NTSC]...
446 /*
447 Doom
448 TOM: Horizontal Display End written by M68K: 1727
449 TOM: Horizontal Display Begin 1 written by M68K: 123
450 TOM: Vertical Display Begin written by M68K: 25
451 TOM: Vertical Display End written by M68K: 2047
452 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
453 Also does PWIDTH = 4...
454 Vertical resolution: 238 lines
455
456 Rayman
457 TOM: Horizontal Display End written by M68K: 1727
458 TOM: Horizontal Display Begin 1 written by M68K: 123
459 TOM: Vertical Display Begin written by M68K: 25
460 TOM: Vertical Display End written by M68K: 2047
461 TOM: Vertical Interrupt written by M68K: 507
462 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
463 TOM: Horizontal Display Begin 1 written by M68K: 208
464 TOM: Horizontal Display End written by M68K: 1670
465 Display starts at 31, then 52!
466 Vertical resolution: 238 lines
467
468 Atari Karts
469 TOM: Horizontal Display End written by M68K: 1727
470 TOM: Horizontal Display Begin 1 written by M68K: 123
471 TOM: Vertical Display Begin written by M68K: 25
472 TOM: Vertical Display End written by M68K: 2047
473 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
474 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
475 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
476
477 Iron Soldier
478 TOM: Vertical Interrupt written by M68K: 2047
479 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
480 TOM: Horizontal Display End written by M68K: 1727
481 TOM: Horizontal Display Begin 1 written by M68K: 123
482 TOM: Vertical Display Begin written by M68K: 25
483 TOM: Vertical Display End written by M68K: 2047
484 TOM: Vertical Interrupt written by M68K: 507
485 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
486 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
487 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
488 Display starts at 31
489 Vertical resolution: 238 lines
490 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
491
492 JagMania
493 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
494 TOM: Horizontal Blank Begin written by M68K: 1713
495 TOM: Horizontal Blank End written by M68K: 125
496 TOM: Horizontal Display End written by M68K: 1696
497 TOM: Horizontal Display Begin 1 written by M68K: 166
498 TOM: Vertical Period written by M68K: 523 (non-interlaced)
499 TOM: Vertical Blank End written by M68K: 24
500 TOM: Vertical Display Begin written by M68K: 46
501 TOM: Vertical Display End written by M68K: 496
502 TOM: Vertical Blank Begin written by M68K: 500
503 TOM: Vertical Sync written by M68K: 517
504 TOM: Vertical Interrupt written by M68K: 497
505 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
506 Display starts at 55
507
508 Double Dragon V
509 TOM: Horizontal Display End written by M68K: 1727
510 TOM: Horizontal Display Begin 1 written by M68K: 123
511 TOM: Vertical Display Begin written by M68K: 25
512 TOM: Vertical Display End written by M68K: 2047
513 TOM: Vertical Interrupt written by M68K: 507
514 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
515
516 Dino Dudes
517 TOM: Horizontal Display End written by M68K: 1823
518 TOM: Horizontal Display Begin 1 written by M68K: 45
519 TOM: Vertical Display Begin written by M68K: 40
520 TOM: Vertical Display End written by M68K: 2047
521 TOM: Vertical Interrupt written by M68K: 491
522 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
523 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
524 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
525 Vertical resolution: 238 lines
526
527 Flashback
528 TOM: Horizontal Display End written by M68K: 1727
529 TOM: Horizontal Display Begin 1 written by M68K: 188
530 TOM: Vertical Display Begin written by M68K: 1
531 TOM: Vertical Display End written by M68K: 2047
532 TOM: Vertical Interrupt written by M68K: 483
533 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
534 Width would be 303 with above scheme, but border width would be 13 pixels
535
536 Trevor McFur
537 Vertical resolution: 238 lines
538 */
539
540 uint32 RGB16ToRGB32[0x10000];
541 uint32 CRY16ToRGB32[0x10000];
542 uint32 MIX16ToRGB32[0x10000];
543
544 void TOMFillLookupTables(void)
545 {
546         for(uint32 i=0; i<0x10000; i++)
547                 RGB16ToRGB32[i] = 0xFF000000
548                         | ((i & 0xF100) >> 8)  | ((i & 0xE000) >> 13)
549                         | ((i & 0x07C0) << 13) | ((i & 0x0700) << 8)
550                         | ((i & 0x003F) << 10) | ((i & 0x0030) << 4);
551
552
553         for(uint32 i=0; i<0x10000; i++)
554         {
555                 uint32 chrm = (i & 0xF000) >> 12,
556                         chrl = (i & 0x0F00) >> 8,
557                         y = (i & 0x00FF);
558                                 
559                 uint32 r = (((uint32)redcv[chrm][chrl]) * y) >> 8,
560                         g = (((uint32)greencv[chrm][chrl]) * y) >> 8,
561                         b = (((uint32)bluecv[chrm][chrl]) * y) >> 8;
562                 
563                 CRY16ToRGB32[i] = 0xFF000000 | (b << 16) | (g << 8) | r;
564                 MIX16ToRGB32[i] = CRY16ToRGB32[i];
565         }
566
567         for(uint32 i=0; i<0x10000; i++)
568                 if (i & 0x01)
569                         MIX16ToRGB32[i] = RGB16ToRGB32[i];
570 }
571
572 /*void tom_calc_cry_rgb_mix_lut(void)
573 {
574         for (uint32 i=0; i<0x10000; i++)
575         {
576                 uint16 color = i;
577
578                 if (color & 0x01)
579                 {
580                         color >>= 1;
581                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
582                 }
583                 else
584                 {
585                         uint32 chrm = (color & 0xF000) >> 12,
586                                 chrl = (color & 0x0F00) >> 8,
587                                 y = color & 0x00FF;
588                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
589                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
590                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
591                         color = (red << 10) | (green << 5) | blue;
592                 }
593
594                 tom_cry_rgb_mix_lut[i] = color;
595         }
596 }*/
597
598 void tom_set_pending_jerry_int(void)
599 {
600         tom_jerry_int_pending = 1;
601 }
602
603 void tom_set_pending_timer_int(void)
604 {
605         tom_timer_int_pending = 1;
606 }
607
608 void tom_set_pending_object_int(void)
609 {
610         tom_object_int_pending = 1;
611 }
612
613 void tom_set_pending_gpu_int(void)
614 {
615         tom_gpu_int_pending = 1;
616 }
617
618 void tom_set_pending_video_int(void)
619 {
620         tom_video_int_pending = 1;
621 }
622
623 uint8 * tom_get_ram_pointer(void)
624 {
625         return tom_ram_8;
626 }
627
628 uint8 tom_getVideoMode(void)
629 {
630         uint16 vmode = GET16(tom_ram_8, VMODE);
631         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
632 }
633
634 //Used in only one place (and for debug purposes): OBJECTP.CPP
635 uint16 tom_get_vdb(void)
636 {
637 // This in NOT VDB!!!
638 //      return GET16(tom_ram_8, VBE);
639         return GET16(tom_ram_8, VDB);
640 }
641
642 //
643 // 16 BPP CRY/RGB mixed mode rendering
644 //
645 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer)
646 {
647 //CHANGED TO 32BPP RENDERING
648         uint16 width = tom_width;
649         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
650         
651         //New stuff--restrict our drawing...
652         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
653         //NOTE: May have to check HDB2 as well!
654         // Get start position in HC ticks
655         int16 startPos = GET16(tom_ram_8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);
656         startPos /= pwidth;
657         if (startPos < 0)
658                 current_line_buffer += 2 * -startPos;
659         else
660 //This case doesn't properly handle the "start on the right side of virtual screen" case
661 //Dunno why--looks Ok...
662 //What *is* for sure wrong is that it doesn't copy the linebuffer's BG pixels...
663 //This should likely be 4 instead of 2 (?--not sure)
664                 backbuffer += 2 * startPos, width -= startPos;
665
666         while (width)
667         {
668                 uint16 color = (*current_line_buffer++) << 8;
669                 color |= *current_line_buffer++;
670 //              *backbuffer++ = tom_cry_rgb_mix_lut[color];
671                 *backbuffer++ = MIX16ToRGB32[color];
672                 width--;
673         }
674 }
675
676 //
677 // 16 BPP CRY mode rendering
678 //
679 void tom_render_16bpp_cry_scanline(uint32 * backbuffer)
680 {
681 //CHANGED TO 32BPP RENDERING
682         uint16 width = tom_width;
683         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
684
685         //New stuff--restrict our drawing...
686         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
687         //NOTE: May have to check HDB2 as well!
688         int16 startPos = GET16(tom_ram_8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);// Get start position in HC ticks
689         startPos /= pwidth;
690         if (startPos < 0)
691                 current_line_buffer += 2 * -startPos;
692         else
693 //This should likely be 4 instead of 2 (?--not sure)
694                 backbuffer += 2 * startPos, width -= startPos;
695
696         while (width)
697         {
698                 uint16 color = (*current_line_buffer++) << 8;
699                 color |= *current_line_buffer++;
700                 *backbuffer++ = CRY16ToRGB32[color];
701                 width--;
702         }
703 }
704
705 //
706 // 24 BPP mode rendering
707 //
708 void tom_render_24bpp_scanline(uint32 * backbuffer)
709 {
710 //CHANGED TO 32BPP RENDERING
711         uint16 width = tom_width;
712         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
713         
714         //New stuff--restrict our drawing...
715         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
716         //NOTE: May have to check HDB2 as well!
717         int16 startPos = GET16(tom_ram_8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);       // Get start position in HC ticks
718         startPos /= pwidth;
719         if (startPos < 0)
720                 current_line_buffer += 4 * -startPos;
721         else
722 //This should likely be 4 instead of 2 (?--not sure)
723                 backbuffer += 2 * startPos, width -= startPos;
724
725         while (width)
726         {
727                 uint32 g = *current_line_buffer++;
728                 uint32 r = *current_line_buffer++;
729                 current_line_buffer++;
730                 uint32 b = *current_line_buffer++;
731                 *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
732                 width--;
733         }
734 }
735
736 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
737 //extra hardware outside of the Jaguar console to support this!
738 //
739 // 16 BPP direct mode rendering
740 //
741 void tom_render_16bpp_direct_scanline(uint32 * backbuffer)
742 {
743         uint16 width = tom_width;
744         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
745         
746         while (width)
747         {
748                 uint16 color = (*current_line_buffer++) << 8;
749                 color |= *current_line_buffer++;
750                 *backbuffer++ = color >> 1;
751                 width--;
752         }
753 }
754
755 //
756 // 16 BPP RGB mode rendering
757 //
758 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer)
759 {
760 //CHANGED TO 32BPP RENDERING
761         // 16 BPP RGB: 0-5 green, 6-10 blue, 11-15 red
762
763         uint16 width = tom_width;
764         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
765         
766         //New stuff--restrict our drawing...
767         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
768         //NOTE: May have to check HDB2 as well!
769         int16 startPos = GET16(tom_ram_8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);       // Get start position in HC ticks
770         startPos /= pwidth;
771
772         if (startPos < 0)
773                 current_line_buffer += 2 * -startPos;
774         else
775 //This should likely be 4 instead of 2 (?--not sure)
776                 backbuffer += 2 * startPos, width -= startPos;
777
778         while (width)
779         {
780                 uint32 color = (*current_line_buffer++) << 8;
781                 color |= *current_line_buffer++;
782                 *backbuffer++ = RGB16ToRGB32[color];
783                 width--;
784         }
785 }
786
787 /////////////////////////////////////////////////////////////////////
788 // This stuff may just go away by itself, especially if we do some //
789 // good old OpenGL goodness...                                     //
790 /////////////////////////////////////////////////////////////////////
791
792 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(uint32 *backbuffer)
793 {
794         uint16 width=tom_width;
795         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
796         
797         while (width)
798         {
799                 uint16 color;
800                 color=*current_line_buffer++;
801                 color<<=8;
802                 color|=*current_line_buffer++;
803                 *backbuffer++=tom_cry_rgb_mix_lut[color];
804                 current_line_buffer+=2;
805                 width--;
806         }
807 }
808
809 void tom_render_16bpp_cry_stretch_scanline(uint32 *backbuffer)
810 {
811         uint32 chrm, chrl, y;
812
813         uint16 width=tom_width;
814         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
815         
816         while (width)
817         {
818                 uint16 color;
819                 color=*current_line_buffer++;
820                 color<<=8;
821                 color|=*current_line_buffer++;
822                 
823                 chrm = (color & 0xF000) >> 12;    
824                 chrl = (color & 0x0F00) >> 8;
825                 y    = (color & 0x00FF);
826                                 
827                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
828                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
829                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
830                 
831                 uint16 color2;
832                 color2=*current_line_buffer++;
833                 color2<<=8;
834                 color2|=*current_line_buffer++;
835                 
836                 chrm = (color2 & 0xF000) >> 12;    
837                 chrl = (color2 & 0x0F00) >> 8;
838                 y    = (color2 & 0x00FF);
839                                 
840                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
841                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
842                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
843                 
844                 red=(red+red2)>>1;
845                 green=(green+green2)>>1;
846                 blue=(blue+blue2)>>1;
847
848                 *backbuffer++=(red<<10)|(green<<5)|blue;
849                 width--;
850         }
851 }
852
853 void tom_render_24bpp_stretch_scanline(uint32 *backbuffer)
854 {
855         uint16 width=tom_width;
856         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
857         
858         while (width)
859         {
860                 uint16 green=*current_line_buffer++;
861                 uint16 red=*current_line_buffer++;
862                 /*uint16 nc=*/current_line_buffer++;
863                 uint16 blue=*current_line_buffer++;
864                 red>>=3;
865                 green>>=3;
866                 blue>>=3;
867                 *backbuffer++=(red<<10)|(green<<5)|blue;
868                 current_line_buffer+=4;
869                 width--;
870         }
871 }
872
873 void tom_render_16bpp_direct_stretch_scanline(uint32 *backbuffer)
874 {
875         uint16 width=tom_width;
876         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
877         
878         while (width)
879         {
880                 uint16 color=*current_line_buffer++;
881                 color<<=8;
882                 color|=*current_line_buffer++;
883                 color>>=1;
884                 *backbuffer++=color;
885                 current_line_buffer+=2;
886                 width--;
887         }
888 }
889
890 void tom_render_16bpp_rgb_stretch_scanline(uint32 *backbuffer)
891 {
892         uint16 width=tom_width;
893         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
894         
895         while (width)
896         {
897                 uint16 color1=*current_line_buffer++;
898                 color1<<=8;
899                 color1|=*current_line_buffer++;
900                 color1>>=1;
901                 uint16 color2=*current_line_buffer++;
902                 color2<<=8;
903                 color2|=*current_line_buffer++;
904                 color2>>=1;
905                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
906                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
907                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
908
909                 color1=(red<<10)|(blue<<5)|green;
910                 *backbuffer++=color1;
911                 width--;
912         }
913 }
914
915 void TOMResetBackbuffer(uint32 * backbuffer)
916 {
917         TOMBackbuffer = backbuffer;
918 }
919
920 //
921 // Process a single scanline
922 //
923 void TOMExecScanline(uint16 scanline, bool render)
924 {
925         bool inActiveDisplayArea = true;
926
927 //Interlacing is still not handled correctly here... !!! FIX !!!
928         if (scanline & 0x01)                                                    // Execute OP only on even lines (non-interlaced only!)
929                 return;
930
931         if (scanline >= (uint16)GET16(tom_ram_8, VDB) && scanline < (uint16)GET16(tom_ram_8, VDE))
932         {
933                 if (render)
934                 {
935                         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
936                         uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG + 1];
937
938                         // Clear line buffer with BG
939                         if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
940                                 for(uint32 i=0; i<720; i++)
941                                         *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
942
943                         OPProcessList(scanline, render);
944                 }
945         }
946         else
947                 inActiveDisplayArea = false;
948
949 //Try to take PAL into account...
950 uint16 topVisible = (vjs.hardwareTypeNTSC ? TOP_VISIBLE_VC : TOP_VISIBLE_VC_PAL),
951         bottomVisible = (vjs.hardwareTypeNTSC ? BOTTOM_VISIBLE_VC : BOTTOM_VISIBLE_VC_PAL);
952         // Here's our virtualized scanline code...
953         if (scanline >= topVisible && scanline < bottomVisible)
954         {
955                 if (inActiveDisplayArea)
956                         scanline_render[tom_getVideoMode()](TOMBackbuffer);
957                 else
958                 {
959                         // If outside of VDB & VDE, then display the border color
960 /*                      int16 * currentLineBuffer = TOMBackbuffer;
961                         uint8 g = tom_ram_8[BORD1], r = tom_ram_8[BORD1 + 1], b = tom_ram_8[BORD2 + 1];
962                         uint16 pixel = ((r & 0xF8) << 7) | ((g & 0xF8) << 2) | (b >> 3);//*/
963                         uint32 * currentLineBuffer = TOMBackbuffer;
964                         uint8 g = tom_ram_8[BORD1], r = tom_ram_8[BORD1 + 1], b = tom_ram_8[BORD2 + 1];
965                         uint32 pixel = 0xFF000000 | (b << 16) | (g << 8) | r;
966
967                         for(uint32 i=0; i<tom_width; i++)
968                                 *currentLineBuffer++ = pixel;
969                 }
970
971 //              TOMBackbuffer += GetSDLScreenPitch() / 2;       // Returns bytes, but we need words
972                 TOMBackbuffer += GetSDLScreenPitch() / 4;       // Returns bytes, but we need dwords
973         }
974 }
975
976 //
977 // TOM initialization
978 //
979 void tom_init(void)
980 {
981         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
982
983         op_init();
984         blitter_init();
985 //This should be done by JERRY! pcm_init();
986         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
987         tom_reset();
988         // Setup the non-stretchy scanline rendering...
989         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
990 //      tom_calc_cry_rgb_mix_lut();
991         TOMFillLookupTables();
992 }
993
994 void tom_done(void)
995 {
996         op_done();
997 //This should be done by JERRY! pcm_done();
998         blitter_done();
999         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
1000                 videoMode_to_str[tom_getVideoMode()]);
1001 //      WriteLog("\ntom: object processor:\n");
1002 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
1003 //      WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
1004 //      gpu_done();
1005 //      dsp_done();
1006         memory_free(tom_ram_8);
1007         memory_free(tom_cry_rgb_mix_lut);
1008 }
1009
1010 /*uint32 tom_getHBlankWidthInPixels(void)
1011 {
1012         return hblankWidthInPixels;
1013 }*/
1014
1015 uint32 tom_getVideoModeWidth(void)
1016 {
1017         //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
1018 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
1019 //Temporary, for testing Doom...
1020 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
1021
1022         // Note that the following PWIDTH values have the following pixel aspect ratios:
1023         // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
1024         // PWIDTH = 2 -> 0.50:1 (1:2) pixels
1025         // PWIDTH = 3 -> 0.75:1 (3:4) pixels
1026         // PWIDTH = 4 -> 1.00:1 (1:1) pixels
1027         // PWIDTH = 5 -> 1.25:1 (5:4) pixels
1028         // PWIDTH = 6 -> 1.50:1 (3:2) pixels
1029         // PWIDTH = 7 -> 1.75:1 (7:4) pixels
1030         // PWIDTH = 8 -> 2.00:1 (2:1) pixels
1031
1032         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
1033         // this implies that the other modes have pixels that are *not* square!
1034         // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
1035
1036         // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
1037         //       so we don't bother to add one...
1038 //      return width[(GET16(tom_ram_8, VMODE) & PWIDTH) >> 9];
1039
1040         // Now, we just calculate it...
1041 /*      uint16 hdb1 = GET16(tom_ram_8, HDB1), hde = GET16(tom_ram_8, HDE),
1042                 hbb = GET16(tom_ram_8, HBB), pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
1043 //      return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
1044 //Temporary, for testing Doom...
1045         return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
1046
1047         // To make it easier to make a quasi-fixed display size, we restrict the viewing
1048         // area to an arbitrary range of the Horizontal Count.
1049         uint16 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
1050         return (vjs.hardwareTypeNTSC ? RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC : RIGHT_VISIBLE_HC_PAL - LEFT_VISIBLE_HC_PAL) / pwidth;
1051 //Temporary, for testing Doom...
1052 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
1053 ////    return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
1054
1055 // More speculating...
1056 // According to the JTRM, the number of potential pixels across is given by the
1057 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
1058 // zero to this value twice per scanline (the high bit is set on the second count).
1059 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
1060 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
1061 // HDB1, it starts fetching the line from position 0 in LBUF.
1062
1063 // The trick, it would seem, is to figure out how long the typical visible scanline
1064 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
1065 // course). Using that length, we can establish an "absolute left display limit" with
1066 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
1067 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
1068 // backbuffer + 5 pixels).
1069
1070 // That's basically what we're doing now...!
1071 }
1072
1073 // *** SPECULATION ***
1074 // It might work better to virtualize the height settings, i.e., set the vertical
1075 // height at 240 lines and clip using the VDB and VDE/VP registers...
1076 // Same with the width... [Width is pretty much virtualized now.]
1077
1078 // Now that that the width is virtualized, let's virtualize the height. :-)
1079 uint32 tom_getVideoModeHeight(void)
1080 {
1081 //      uint16 vmode = GET16(tom_ram_8, VMODE);
1082 //      uint16 vbe = GET16(tom_ram_8, VBE);
1083 //      uint16 vbb = GET16(tom_ram_8, VBB);
1084 //      uint16 vdb = GET16(tom_ram_8, VDB);
1085 //      uint16 vde = GET16(tom_ram_8, VDE);
1086 //      uint16 vp = GET16(tom_ram_8, VP);
1087         
1088 /*      if (vde == 0xFFFF)
1089                 vde = vbb;//*/
1090
1091 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
1092         // The video mode height probably works this way:
1093         // VC counts from 0 to VP. VDB starts the OP. Either when
1094         // VDE is reached or VP, the OP is stopped. Let's try it...
1095         // Also note that we're conveniently ignoring interlaced display modes...!
1096 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
1097 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
1098 //Let's try from the Vertical Blank interval...
1099 //Seems to work OK!
1100 //      return (vbb - vbe) >> 1;        // Again, doesn't take interlacing into account...
1101 // This of course doesn't take interlacing into account. But I haven't seen any
1102 // Jaguar software that takes advantage of it either...
1103 //Also, doesn't reflect PAL Jaguar either... !!! FIX !!! [DONE]
1104 //      return 240;                                                                             // Set virtual screen height to 240 lines...
1105         return (vjs.hardwareTypeNTSC ? 240 : 256);
1106 }
1107
1108 //
1109 // TOM reset code
1110 // Now PAL friendly!
1111 //
1112 void tom_reset(void)
1113 {
1114         op_reset();
1115         blitter_reset();
1116 //This should be done by JERRY!         pcm_reset();
1117
1118         memset(tom_ram_8, 0x00, 0x4000);
1119
1120         if (vjs.hardwareTypeNTSC)
1121         {
1122                 SET16(tom_ram_8, MEMCON1, 0x1861);
1123                 SET16(tom_ram_8, MEMCON2, 0x35CC);
1124                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period (1-based; HP=845)
1125                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
1126                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
1127                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
1128                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
1129                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
1130                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
1131                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1132                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1133                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
1134                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
1135                 SET16(tom_ram_8, VMODE, 0x06C1);
1136         }
1137         else    // PAL Jaguar
1138         {
1139                 SET16(tom_ram_8, MEMCON1, 0x1861);
1140                 SET16(tom_ram_8, MEMCON2, 0x35CC);
1141                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
1142                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
1143                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
1144                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
1145                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
1146                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
1147                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
1148                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
1149                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
1150                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
1151                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
1152                 SET16(tom_ram_8, VMODE, 0x06C1);
1153         }
1154
1155         tom_width = tom_real_internal_width = 0;
1156         tom_height = 0;
1157
1158         tom_jerry_int_pending = 0;
1159         tom_timer_int_pending = 0;
1160         tom_object_int_pending = 0;
1161         tom_gpu_int_pending = 0;
1162         tom_video_int_pending = 0;
1163
1164         tom_timer_prescaler = 0;                                                // TOM PIT is disabled
1165         tom_timer_divider = 0;
1166         tom_timer_counter = 0;
1167         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1168 }
1169
1170 //
1171 // TOM byte access (read)
1172 //
1173 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
1174 {
1175 //???Is this needed???
1176 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1177 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1178 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1179 //      offset &= 0xFF3FFF;
1180
1181 #ifdef TOM_DEBUG
1182         WriteLog("TOM: Reading byte at %06X\n", offset);
1183 #endif
1184
1185         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1186                 return GPUReadByte(offset, who);
1187         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1188                 return GPUReadByte(offset, who);
1189         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1190                 return OPReadByte(offset, who);
1191         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1192                 return BlitterReadByte(offset, who);
1193         else if (offset == 0xF00050)
1194                 return tom_timer_prescaler >> 8;
1195         else if (offset == 0xF00051)
1196                 return tom_timer_prescaler & 0xFF;
1197         else if (offset == 0xF00052)
1198                 return tom_timer_divider >> 8;
1199         else if (offset == 0xF00053)
1200                 return tom_timer_divider & 0xFF;
1201
1202         return tom_ram_8[offset & 0x3FFF];
1203 }
1204
1205 //
1206 // TOM word access (read)
1207 //
1208 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1209 {
1210 //???Is this needed???
1211 //      offset &= 0xFF3FFF;
1212 #ifdef TOM_DEBUG
1213         WriteLog("TOM: Reading word at %06X\n", offset);
1214 #endif
1215 if (offset >= 0xF02000 && offset <= 0xF020FF)
1216         WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1217
1218         if (offset == 0xF000E0)
1219         {
1220                 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1221                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1222                         | (tom_video_int_pending << 0);
1223                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1224                 return data;
1225         }
1226 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1227 /*      else if (offset == 0xF00006)    // VC
1228         // What if we're in interlaced mode?
1229         // According to docs, in non-interlace mode VC is ALWAYS even...
1230 //              return (tom_scanline << 1);// + 1;
1231 //But it's causing Rayman to be fucked up... Why???
1232 //Because VC is even in NI mode when calling the OP! That's why!
1233                 return (tom_scanline << 1) + 1;//*/
1234         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1235                 return GPUReadWord(offset, who);
1236         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1237                 return GPUReadWord(offset, who);
1238         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1239                 return OPReadWord(offset, who);
1240         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1241                 return BlitterReadWord(offset, who);
1242         else if (offset == 0xF00050)
1243                 return tom_timer_prescaler;
1244         else if (offset == 0xF00052)
1245                 return tom_timer_divider;
1246
1247         offset &= 0x3FFF;
1248         return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1249 }
1250
1251 //
1252 // TOM byte access (write)
1253 //
1254 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1255 {
1256 //???Is this needed???
1257 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1258         offset &= 0xFF3FFF;
1259
1260 #ifdef TOM_DEBUG
1261         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1262 #endif
1263
1264         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1265         {
1266                 GPUWriteByte(offset, data, who);
1267                 return;
1268         }
1269         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1270         {
1271                 GPUWriteByte(offset, data, who);
1272                 return;
1273         }
1274         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1275         {
1276                 OPWriteByte(offset, data, who);
1277                 return;
1278         }
1279         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1280         {
1281                 BlitterWriteByte(offset, data, who);
1282                 return;
1283         }
1284         else if (offset == 0xF00050)
1285         {
1286                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
1287                 TOMResetPIT();
1288                 return;
1289         }
1290         else if (offset == 0xF00051)
1291         {
1292                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
1293                 TOMResetPIT();
1294                 return;
1295         }
1296         else if (offset == 0xF00052)
1297         {
1298                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
1299                 TOMResetPIT();
1300                 return;
1301         }
1302         else if (offset == 0xF00053)
1303         {
1304                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
1305                 TOMResetPIT();
1306                 return;
1307         }
1308         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
1309         {
1310                 // Writing to one CLUT writes to the other
1311                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1312                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
1313         }
1314
1315         tom_ram_8[offset & 0x3FFF] = data;
1316 }
1317
1318 //
1319 // TOM word access (write)
1320 //
1321 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1322 {
1323 //???Is this needed???
1324         offset &= 0xFF3FFF;
1325
1326 #ifdef TOM_DEBUG
1327         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1328 #endif
1329 if (offset == 0xF00000 + MEMCON1)
1330         WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1331 if (offset == 0xF00000 + MEMCON2)
1332         WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1333 if (offset >= 0xF02000 && offset <= 0xF020FF)
1334         WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1335
1336         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1337         {
1338                 GPUWriteWord(offset, data, who);
1339                 return;
1340         }
1341         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1342         {
1343                 GPUWriteWord(offset, data, who);
1344                 return;
1345         }
1346 //What's so special about this?
1347 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1348         {
1349                 TOMWriteByte(offset, data >> 8);
1350                 TOMWriteByte(offset+1, data & 0xFF);
1351         }*/
1352         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1353         {
1354                 OPWriteWord(offset, data, who);
1355                 return;
1356         }
1357         else if (offset == 0xF00050)
1358         {
1359                 tom_timer_prescaler = data;
1360                 TOMResetPIT();
1361                 return;
1362         }
1363         else if (offset == 0xF00052)
1364         {
1365                 tom_timer_divider = data;
1366                 TOMResetPIT();
1367                 return;
1368         }
1369         else if (offset == 0xF000E0)
1370         {
1371 //Check this out...
1372                 if (data & 0x0100)
1373                         tom_video_int_pending = 0;
1374                 if (data & 0x0200)
1375                         tom_gpu_int_pending = 0;
1376                 if (data & 0x0400)
1377                         tom_object_int_pending = 0;
1378                 if (data & 0x0800)
1379                         tom_timer_int_pending = 0;
1380                 if (data & 0x1000)
1381                         tom_jerry_int_pending = 0;
1382         }
1383         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1384         {
1385                 BlitterWriteWord(offset, data, who);
1386                 return;
1387         }
1388         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1389         {
1390                 // Writing to one CLUT writes to the other
1391                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1392 // Watch out for unaligned writes here! (Not fixed yet)
1393                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1394         }
1395
1396         offset &= 0x3FFF;
1397         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1398                 objectp_running = 1;
1399
1400         if (offset >= 0x30 && offset <= 0x4E)
1401                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1402         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1403                 data &= 0x03FF;                 // These are all 10-bit registers
1404
1405         TOMWriteByte(offset, data >> 8, who);
1406         TOMWriteByte(offset+1, data & 0xFF, who);
1407
1408 if (offset == VDB)
1409         WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1410 if (offset == VDE)
1411         WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1412 if (offset == VP)
1413         WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1414 if (offset == HDB1)
1415         WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1416 if (offset == HDE)
1417         WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1418 if (offset == HP)
1419         WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1420 if (offset == VBB)
1421         WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1422 if (offset == VBE)
1423         WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1424 if (offset == VS)
1425         WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1426 if (offset == VI)
1427         WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1428 if (offset == HBB)
1429         WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1430 if (offset == HBE)
1431         WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1432 if (offset == VMODE)
1433         WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tom_ram_8, VC));
1434
1435         // detect screen resolution changes
1436 //This may go away in the future, if we do the virtualized screen thing...
1437 //This may go away soon!
1438         if ((offset >= 0x28) && (offset <= 0x4F))
1439         {
1440                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1441                 tom_real_internal_width = width;
1442
1443                 if ((width != tom_width) || (height != tom_height))
1444                 {
1445                         tom_width = width, tom_height = height;
1446                         ResizeScreen(tom_width, tom_height);
1447                 }
1448         }
1449 }
1450
1451 int tom_irq_enabled(int irq)
1452 {
1453         // This is the correct byte in big endian... D'oh!
1454 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1455         return tom_ram_8[INT1 + 1/*0xE1*/] & (1 << irq);
1456 }
1457
1458 //unused
1459 /*void tom_set_irq_latch(int irq, int enabled)
1460 {
1461         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1462 }*/
1463
1464 //unused
1465 /*uint16 tom_irq_control_reg(void)
1466 {
1467         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1468 }*/
1469
1470 void TOMResetPIT(void)
1471 {
1472 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!! [DONE]
1473 //Also, why +1??? 'Cause that's what it says in the JTRM...!
1474 //There is a small problem with this approach: If both the prescaler and the divider are equal
1475 //to $FFFF then the counter won't be large enough to handle it. !!! FIX !!!
1476         if (tom_timer_prescaler)
1477                 tom_timer_counter += (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1478 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1479 }
1480
1481 //
1482 // TOM Programmable Interrupt Timer handler
1483 // NOTE: TOM's PIT is only enabled if the prescaler is != 0
1484 //
1485 void TOMExecPIT(uint32 cycles)
1486 {
1487         if (tom_timer_prescaler)
1488         {
1489                 tom_timer_counter -= cycles;
1490
1491                 if (tom_timer_counter <= 0)
1492                 {
1493                         tom_set_pending_timer_int();
1494                         GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE);       // GPUSetIRQLine does the 'IRQ enabled' checking
1495                         if (tom_irq_enabled(IRQ_TIMER))//get rid of this crap -> && jaguar_interrupt_handler_is_valid(64))
1496                                 m68k_set_irq(7);                                        // Cause a 68000 NMI...
1497
1498                         TOMResetPIT();
1499                 }
1500         }
1501 }
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