Shamusworld >> Repos - virtualjaguar/blob - src/tom.cpp

   1 //
   2 // TOM Processing
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups and endian wrongness amelioration by James L. Hammons
   7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
   8 //       the braindead way in which MAME handles memory. :-)
   9 //
  10 // Note: TOM has only a 16K memory space
  11 //
  12 //      ------------------------------------------------------------
  13 //      TOM REGISTERS (Mapped by Aaron Giles)
  14 //      ------------------------------------------------------------
  15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
  16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
  17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
  18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
  19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
  20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
  21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
  22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
  23 //                            -------- -------x      (ROMHI - controls ROM mapping)
  24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
  25 //                            --x----- --------      (HILO - image display bit order)
  26 //                            ---x---- --------      (BIGEND - big endian addressing?)
  27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
  28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
  29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
  30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
  31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
  32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
  33 //                            -----x-- --------      (which half of the display)
  34 //                            ------xx xxxxxxxx      (10-bit counter)
  35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
  36 //                            ----x--- --------      (which field is being generated)
  37 //                            -----xxx xxxxxxxx      (11-bit counter)
  38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
  39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
  40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
  41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
  42 //      F00026            W   -------- -------x   OBF - object processor flag
  43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
  44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
  45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
  46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
  47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
  48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
  49 //                        W   -------- ---x----      (INCEN - encrustation enable)
  50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
  51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
  52 //                        W   -------- -------x      (VIDEN - enables video)
  53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
  54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
  55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
  56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
  57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
  58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
  59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
  60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
  61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
  62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
  63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
  64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
  65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
  66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
  67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
  68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
  69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
  70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
  71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
  72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
  73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
  74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
  75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
  76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
  77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
  78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
  79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
  80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
  81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
  82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
  83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
  84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
  85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
  86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
  87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
  88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
  89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
  90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
  91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
  92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
  93 //      ------------------------------------------------------------
  94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
  95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
  96 //                      R/W   x------- --------      (DMAEN - DMA enable)
  97 //                      R/W   -x------ --------      (REGPAGE - register page)
  98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
  99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
 100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
 101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
 102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
 103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
 104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
 105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
 106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
 107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
 108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
 109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
 110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
 111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
 112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
 113 //                        W   -------- ----x---      (MATCOL - column/row major)
 114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
 115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
 116 //      F0210C            W   -------- -----xxx   G_END - data organization register
 117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
 119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
 120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
 121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
 122 //                      R     xxxx---- --------      (VERSION - GPU version code)
 123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
 125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
 126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
 127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
 128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
 129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
 134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
 135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
 136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
 137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 138 //      ------------------------------------------------------------
 139 //      BLITTER REGISTERS
 140 //      ------------------------------------------------------------
 141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
 142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
 143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
 144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 146 //                        W   -------- -----x-- -------- --------      (Y add control)
 147 //                        W   -------- ------xx -------- --------      (X add control)
 148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
 153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
 154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
 155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
 156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
 159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
 162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
 163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
 164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
 165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
 166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
 167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
 168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
 169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
 170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
 171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
 172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
 173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
 174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
 175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 177 //                        W   -------- -----x-- -------- --------      (Y add control)
 178 //                        W   -------- ------xx -------- --------      (X add control)
 179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
 184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
 185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
 188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
 191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
 192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
 193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
 194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
 195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
 196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
 197 //                        W   -------x xxx----- -------- --------      (logical operation)
 198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
 199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
 200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
 201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
 202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
 203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
 204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
 205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
 206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
 207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
 208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
 209 //                        W   -------- -------- -------- x-------      (diagnostic use)
 210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
 211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
 212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
 213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
 214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
 215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
 216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
 217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
 218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
 219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
 220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
 221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
 222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
 223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
 224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
 225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
 226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
 227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
 228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
 229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
 230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
 231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
 232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
 233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
 234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
 235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
 236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
 237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
 238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
 239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
 240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
 241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
 242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
 243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
 244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
 245 //      ------------------------------------------------------------
 246
 247 //#include <SDL.h>
 248 #include "tom.h"
 249 #include "video.h"
 250 #include "gpu.h"
 251 #include "objectp.h"
 252 #include "cry2rgb.h"
 253
 254 // TOM registers (offset from $F00000)
 255
 256 #define MEMCON1         0x00
 257 #define MEMCON2         0x02
 258 #define HC                      0x04
 259 #define VC                      0x06
 260 #define VMODE           0x28
 261 #define   MODE          0x0006          // Line buffer to video generator mode
 262 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
 263 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode (only works in MODE 0!)
 264 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)
 265 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
 266 #define HBB                     0x30
 267 #define HBE                     0x32
 268 #define HDB1            0x38
 269 #define HDB2            0x3A
 270 #define HDE                     0x3C
 271 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
 272 #define VBB                     0x40
 273 #define VBE                     0x42
 274 #define VS                      0x44
 275 #define VDB                     0x46
 276 #define VDE                     0x48
 277 #define VI                      0x4E
 278 #define BG                      0x58
 279 #define INT1            0xE0
 280
 281 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
 282 /*#define LEFT_VISIBLE_HC               208
 283 #define RIGHT_VISIBLE_HC        1528//*/
 284 #define LEFT_VISIBLE_HC         208
 285 #define RIGHT_VISIBLE_HC        1488
 286
 287 //This can be defined in the makefile as well...
 288 //(It's easier to do it here, though...)
 289 //#define TOM_DEBUG
 290
 291 extern uint32 jaguar_mainRom_crc32;
 292 extern uint8 objectp_running;
 293
 294 static uint8 * tom_ram_8;
 295 uint32 tom_width, tom_height, tom_real_internal_width;
 296 static uint32 tom_timer_prescaler;
 297 static uint32 tom_timer_divider;
 298 static int32 tom_timer_counter;
 299 //uint32 tom_scanline;
 300 //uint32 hblankWidthInPixels = 0;
 301 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
 302         tom_gpu_int_pending, tom_video_int_pending;
 303 uint16 * tom_cry_rgb_mix_lut;
 304
 305 static char * videoMode_to_str[8] =
 306         { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
 307           "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
 308
 309 typedef void (render_xxx_scanline_fn)(int16 *);
 310
 311 // Private function prototypes
 312
 313 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
 314 void tom_render_24bpp_scanline(int16 * backbuffer);
 315 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
 316 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
 317 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
 318
 319 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
 320 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
 321 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
 322 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
 323 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
 324
 325 render_xxx_scanline_fn * scanline_render_normal[]=
 326 {
 327         tom_render_16bpp_cry_scanline,
 328         tom_render_24bpp_scanline,
 329         tom_render_16bpp_direct_scanline,
 330         tom_render_16bpp_rgb_scanline,
 331         tom_render_16bpp_cry_rgb_mix_scanline,
 332         tom_render_24bpp_scanline,
 333         tom_render_16bpp_direct_scanline,
 334         tom_render_16bpp_rgb_scanline
 335 };
 336
 337 render_xxx_scanline_fn * scanline_render_stretch[]=
 338 {
 339         tom_render_16bpp_cry_stretch_scanline,
 340         tom_render_24bpp_stretch_scanline,
 341         tom_render_16bpp_direct_stretch_scanline,
 342         tom_render_16bpp_rgb_stretch_scanline,
 343         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
 344         tom_render_24bpp_stretch_scanline,
 345         tom_render_16bpp_direct_stretch_scanline,
 346         tom_render_16bpp_rgb_stretch_scanline,
 347 };
 348
 349 render_xxx_scanline_fn * scanline_render[8];
 350
 351
 352 // Screen info for various games...
 353 /*
 354 Doom
 355 TOM: Horizontal Display End written by M68K: 1727
 356 TOM: Horizontal Display Begin 1 written by M68K: 123
 357 TOM: Vertical Display Begin written by M68K: 25
 358 TOM: Vertical Display End written by M68K: 2047
 359 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
 360 Also does PWIDTH = 4...
 361 Vertical resolution: 238 lines
 362
 363 Rayman
 364 TOM: Horizontal Display End written by M68K: 1727
 365 TOM: Horizontal Display Begin 1 written by M68K: 123
 366 TOM: Vertical Display Begin written by M68K: 25
 367 TOM: Vertical Display End written by M68K: 2047
 368 TOM: Vertical Interrupt written by M68K: 507
 369 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
 370 TOM: Horizontal Display Begin 1 written by M68K: 208
 371 TOM: Horizontal Display End written by M68K: 1670
 372 Display starts at 31, then 52!
 373 Vertical resolution: 238 lines
 374
 375 Atari Karts
 376 TOM: Horizontal Display End written by M68K: 1727
 377 TOM: Horizontal Display Begin 1 written by M68K: 123
 378 TOM: Vertical Display Begin written by M68K: 25
 379 TOM: Vertical Display End written by M68K: 2047
 380 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
 381 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
 382 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
 383
 384 Iron Soldier
 385 TOM: Vertical Interrupt written by M68K: 2047
 386 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
 387 TOM: Horizontal Display End written by M68K: 1727
 388 TOM: Horizontal Display Begin 1 written by M68K: 123
 389 TOM: Vertical Display Begin written by M68K: 25
 390 TOM: Vertical Display End written by M68K: 2047
 391 TOM: Vertical Interrupt written by M68K: 507
 392 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
 393 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
 394 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
 395 Display starts at 31
 396 Vertical resolution: 238 lines
 397 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
 398
 399 JagMania
 400 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
 401 TOM: Horizontal Blank Begin written by M68K: 1713
 402 TOM: Horizontal Blank End written by M68K: 125
 403 TOM: Horizontal Display End written by M68K: 1696
 404 TOM: Horizontal Display Begin 1 written by M68K: 166
 405 TOM: Vertical Period written by M68K: 523 (non-interlaced)
 406 TOM: Vertical Blank End written by M68K: 24
 407 TOM: Vertical Display Begin written by M68K: 46
 408 TOM: Vertical Display End written by M68K: 496
 409 TOM: Vertical Blank Begin written by M68K: 500
 410 TOM: Vertical Sync written by M68K: 517
 411 TOM: Vertical Interrupt written by M68K: 497
 412 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
 413 Display starts at 55
 414
 415 Double Dragon V
 416 TOM: Horizontal Display End written by M68K: 1727
 417 TOM: Horizontal Display Begin 1 written by M68K: 123
 418 TOM: Vertical Display Begin written by M68K: 25
 419 TOM: Vertical Display End written by M68K: 2047
 420 TOM: Vertical Interrupt written by M68K: 507
 421 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
 422
 423 Dino Dudes
 424 TOM: Horizontal Display End written by M68K: 1823
 425 TOM: Horizontal Display Begin 1 written by M68K: 45
 426 TOM: Vertical Display Begin written by M68K: 40
 427 TOM: Vertical Display End written by M68K: 2047
 428 TOM: Vertical Interrupt written by M68K: 491
 429 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
 430 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
 431 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
 432 Vertical resolution: 238 lines
 433
 434 Flashback
 435 TOM: Horizontal Display End written by M68K: 1727
 436 TOM: Horizontal Display Begin 1 written by M68K: 188
 437 TOM: Vertical Display Begin written by M68K: 1
 438 TOM: Vertical Display End written by M68K: 2047
 439 TOM: Vertical Interrupt written by M68K: 483
 440 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
 441 Width would be 303 with above scheme, but border width would be 13 pixels
 442
 443 Trevor McFur
 444 Vertical resolution: 238 lines
 445 */
 446
 447
 448 void tom_calc_cry_rgb_mix_lut(void)
 449 {
 450         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
 451
 452         for (uint32 i=0; i<0x10000; i++)
 453         {
 454                 uint16 color = i;
 455
 456                 if (color & 0x01)
 457                 {
 458                         color >>= 1;
 459                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
 460                 }
 461                 else
 462                 {
 463                         uint32 chrm = (color & 0xF000) >> 12,
 464                                 chrl = (color & 0x0F00) >> 8,
 465                                 y = color & 0x00FF;
 466                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 467                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 468                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 469                         color = (red << 10) | (green << 5) | blue;
 470                 }
 471                 tom_cry_rgb_mix_lut[i] = color;
 472         }
 473 }
 474
 475 void tom_set_pending_jerry_int(void)
 476 {
 477         tom_jerry_int_pending = 1;
 478 }
 479
 480 void tom_set_pending_timer_int(void)
 481 {
 482         tom_timer_int_pending = 1;
 483 }
 484
 485 void tom_set_pending_object_int(void)
 486 {
 487         tom_object_int_pending = 1;
 488 }
 489
 490 void tom_set_pending_gpu_int(void)
 491 {
 492         tom_gpu_int_pending = 1;
 493 }
 494
 495 void tom_set_pending_video_int(void)
 496 {
 497         tom_video_int_pending = 1;
 498 }
 499
 500 uint8 * tom_get_ram_pointer(void)
 501 {
 502         return tom_ram_8;
 503 }
 504
 505 uint8 tom_getVideoMode(void)
 506 {
 507         uint16 vmode = GET16(tom_ram_8, VMODE);
 508         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
 509 }
 510
 511 //Used in only one place (and for debug purposes): OBJECTP.CPP
 512 uint16 tom_get_vdb(void)
 513 {
 514 // This in NOT VDB!!!
 515 //      return GET16(tom_ram_8, VBE);
 516         return GET16(tom_ram_8, VDB);
 517 }
 518
 519 //
 520 // 16 BPP CRY/RGB mixed mode rendering
 521 //
 522 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
 523 {
 524         uint16 width = tom_width;
 525         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 526
 527         //New stuff--restrict our drawing...
 528         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 529         //NOTE: May have to check HDB2 as well!
 530         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 531         startPos /= pwidth;
 532         if (startPos < 0)
 533                 current_line_buffer += 2 * -startPos;
 534         else
 535                 backbuffer += 2 * startPos, width -= startPos;
 536
 537         while (width)
 538         {
 539                 uint16 color = (*current_line_buffer++) << 8;
 540                 color |= *current_line_buffer++;
 541                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
 542                 width--;
 543         }
 544 }
 545
 546 //
 547 // 16 BPP CRY mode rendering
 548 //
 549 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
 550 {
 551         uint16 width = tom_width;
 552         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 553
 554         //New stuff--restrict our drawing...
 555         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 556         //NOTE: May have to check HDB2 as well!
 557         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 558         startPos /= pwidth;
 559         if (startPos < 0)
 560                 current_line_buffer += 2 * -startPos;
 561         else
 562                 backbuffer += 2 * startPos, width -= startPos;
 563
 564         while (width)
 565         {
 566                 uint16 color = (*current_line_buffer++) << 8;
 567                 color |= *current_line_buffer++;
 568
 569                 uint32 chrm = (color & 0xF000) >> 12,
 570                         chrl = (color & 0x0F00) >> 8,
 571                         y = (color & 0x00FF);
 572
 573                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 574                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 575                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 576
 577                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 578                 width--;
 579         }
 580 }
 581
 582 //
 583 // 24 BPP mode rendering
 584 //
 585 void tom_render_24bpp_scanline(int16 * backbuffer)
 586 {
 587         uint16 width = tom_width;
 588         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 589
 590         //New stuff--restrict our drawing...
 591         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 592         //NOTE: May have to check HDB2 as well!
 593         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 594         startPos /= pwidth;
 595         if (startPos < 0)
 596                 current_line_buffer += 4 * -startPos;
 597         else
 598                 backbuffer += 2 * startPos, width -= startPos;
 599
 600         while (width)
 601         {
 602                 // This is NOT a good 8 -> 5 bit RGB conversion! (It saturates values below 8
 603                 // to zero and throws away almost *half* the color resolution!)
 604                 uint16 green = (*current_line_buffer++) >> 3;
 605                 uint16 red = (*current_line_buffer++) >> 3;
 606                 current_line_buffer++;
 607                 uint16 blue = (*current_line_buffer++) >> 3;
 608                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 609                 width--;
 610         }
 611 }
 612
 613 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
 614 //extra hardware outside of the Jaguar console to support this!
 615 //
 616 // 16 BPP direct mode rendering
 617 //
 618 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
 619 {
 620         uint16 width = tom_width;
 621         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 622
 623         while (width)
 624         {
 625                 uint16 color = (*current_line_buffer++) << 8;
 626                 color |= *current_line_buffer++;
 627                 *backbuffer++ = color >> 1;
 628                 width--;
 629         }
 630 }
 631
 632 //
 633 // 16 BPP RGB mode rendering
 634 //
 635 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
 636 {
 637         uint16 width = tom_width;
 638         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 639
 640         //New stuff--restrict our drawing...
 641         uint8 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 642         //NOTE: May have to check HDB2 as well!
 643         int16 startPos = GET16(tom_ram_8, HDB1) - LEFT_VISIBLE_HC;      // Get start position in HC ticks
 644         startPos /= pwidth;
 645         if (startPos < 0)
 646                 current_line_buffer += 2 * -startPos;
 647         else
 648                 backbuffer += 2 * startPos, width -= startPos;
 649
 650         while (width)
 651         {
 652                 uint16 color = (*current_line_buffer++) << 8;
 653                 color = (color | *current_line_buffer++) >> 1;
 654                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
 655                 *backbuffer++ = color;
 656                 width--;
 657         }
 658 }
 659
 660 // This stuff may just go away by itself, especially if we do some
 661 // good old OpenGL goodness...
 662
 663 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
 664 {
 665         uint16 width=tom_width;
 666         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 667
 668         while (width)
 669         {
 670                 uint16 color;
 671                 color=*current_line_buffer++;
 672                 color<<=8;
 673                 color|=*current_line_buffer++;
 674                 *backbuffer++=tom_cry_rgb_mix_lut[color];
 675                 current_line_buffer+=2;
 676                 width--;
 677         }
 678 }
 679
 680 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
 681 {
 682         uint32 chrm, chrl, y;
 683
 684         uint16 width=tom_width;
 685         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 686
 687         while (width)
 688         {
 689                 uint16 color;
 690                 color=*current_line_buffer++;
 691                 color<<=8;
 692                 color|=*current_line_buffer++;
 693
 694                 chrm = (color & 0xF000) >> 12;
 695                 chrl = (color & 0x0F00) >> 8;
 696                 y    = (color & 0x00FF);
 697
 698                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
 699                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
 700                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
 701
 702                 uint16 color2;
 703                 color2=*current_line_buffer++;
 704                 color2<<=8;
 705                 color2|=*current_line_buffer++;
 706
 707                 chrm = (color2 & 0xF000) >> 12;
 708                 chrl = (color2 & 0x0F00) >> 8;
 709                 y    = (color2 & 0x00FF);
 710
 711                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
 712                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
 713                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
 714
 715                 red=(red+red2)>>1;
 716                 green=(green+green2)>>1;
 717                 blue=(blue+blue2)>>1;
 718
 719                 *backbuffer++=(red<<10)|(green<<5)|blue;
 720                 width--;
 721         }
 722 }
 723
 724 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
 725 {
 726         uint16 width=tom_width;
 727         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 728
 729         while (width)
 730         {
 731                 uint16 green=*current_line_buffer++;
 732                 uint16 red=*current_line_buffer++;
 733                 /*uint16 nc=*/current_line_buffer++;
 734                 uint16 blue=*current_line_buffer++;
 735                 red>>=3;
 736                 green>>=3;
 737                 blue>>=3;
 738                 *backbuffer++=(red<<10)|(green<<5)|blue;
 739                 current_line_buffer+=4;
 740                 width--;
 741         }
 742 }
 743
 744 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
 745 {
 746         uint16 width=tom_width;
 747         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 748
 749         while (width)
 750         {
 751                 uint16 color=*current_line_buffer++;
 752                 color<<=8;
 753                 color|=*current_line_buffer++;
 754                 color>>=1;
 755                 *backbuffer++=color;
 756                 current_line_buffer+=2;
 757                 width--;
 758         }
 759 }
 760
 761 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
 762 {
 763         uint16 width=tom_width;
 764         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 765
 766         while (width)
 767         {
 768                 uint16 color1=*current_line_buffer++;
 769                 color1<<=8;
 770                 color1|=*current_line_buffer++;
 771                 color1>>=1;
 772                 uint16 color2=*current_line_buffer++;
 773                 color2<<=8;
 774                 color2|=*current_line_buffer++;
 775                 color2>>=1;
 776                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
 777                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
 778                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
 779
 780                 color1=(red<<10)|(blue<<5)|green;
 781                 *backbuffer++=color1;
 782                 width--;
 783         }
 784 }
 785
 786 //
 787 // Process a single scanline
 788 //
 789 void tom_exec_scanline(int16 * backbuffer, int32 scanline, bool render)
 790 {
 791         if (render)
 792         {
 793                 uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 794                 uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG + 1];
 795
 796                 // Clear line buffer with BG
 797                 if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
 798                         for(uint32 i=0; i<720; i++)
 799                                 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
 800
 801                 OPProcessList(scanline, render);
 802                 scanline_render[tom_getVideoMode()](backbuffer);
 803         }
 804 }
 805
 806 //
 807 // TOM initialization
 808 //
 809 void tom_init(void)
 810 {
 811         op_init();
 812         blitter_init();
 813 //This should be done by JERRY! pcm_init();
 814         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
 815         tom_reset();
 816         // Setup the non-stretchy scanline rendering...
 817         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 818         tom_calc_cry_rgb_mix_lut();
 819 }
 820
 821 void tom_done(void)
 822 {
 823         op_done();
 824 //This should be done by JERRY! pcm_done();
 825         blitter_done();
 826         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
 827                 videoMode_to_str[tom_getVideoMode()]);
 828 //      WriteLog("\ntom: object processor:\n");
 829 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
 830 //      WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
 831 //      gpu_done();
 832 //      dsp_done();
 833         memory_free(tom_ram_8);
 834 }
 835
 836 /*uint32 tom_getHBlankWidthInPixels(void)
 837 {
 838         return hblankWidthInPixels;
 839 }*/
 840
 841 uint32 tom_getVideoModeWidth(void)
 842 {
 843         //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
 844 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
 845 //Temporary, for testing Doom...
 846 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
 847
 848         // Note that the following PWIDTH values have the following pixel aspect ratios:
 849         // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
 850         // PWIDTH = 2 -> 0.50:1 (1:2) pixels
 851         // PWIDTH = 3 -> 0.75:1 (3:4) pixels
 852         // PWIDTH = 4 -> 1.00:1 (1:1) pixels
 853         // PWIDTH = 5 -> 1.25:1 (5:4) pixels
 854         // PWIDTH = 6 -> 1.50:1 (3:2) pixels
 855         // PWIDTH = 7 -> 1.75:1 (7:4) pixels
 856         // PWIDTH = 8 -> 2.00:1 (2:1) pixels
 857
 858         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
 859         // this implies that the other modes have pixels that are *not* square!
 860         // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
 861
 862         // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
 863         //       so we don't bother to add one...
 864 //      return width[(GET16(tom_ram_8, VMODE) & PWIDTH) >> 9];
 865
 866         // Now, we just calculate it...
 867 /*      uint16 hdb1 = GET16(tom_ram_8, HDB1), hde = GET16(tom_ram_8, HDE),
 868                 hbb = GET16(tom_ram_8, HBB), pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 869 //      return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
 870 //Temporary, for testing Doom...
 871         return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
 872
 873         // To make it easier to make a quasi-fixed display size, we restrict the viewing
 874         // area to an arbitrary range of the Horizontal Count.
 875         uint16 pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
 876 //      return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / pwidth;
 877 //Temporary, for testing Doom...
 878         return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
 879
 880 // More speculating...
 881 // According to the JTRM, the number of potential pixels across is given by the
 882 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
 883 // zero to this value twice per scanline (the high bit is set on the second count).
 884 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
 885 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
 886 // HDB1, it starts fetching the line from position 0 in LBUF.
 887
 888 // The trick, it would seem, is to figure out how long the typical visible scanline
 889 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
 890 // course). Using that length, we can establish an "absolute left display limit" with
 891 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
 892 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
 893 // backbuffer + 5 pixels).
 894
 895 // That's basically what we're doing now...!
 896 }
 897
 898 // *** SPECULATION ***
 899 // It might work better to virtualize the height settings, i.e., set the vertical
 900 // height at 240 lines and clip using the VDB and VDE/VP registers...
 901 // Same with the width... [Width is pretty much virtualized now.]
 902
 903 uint32 tom_getVideoModeHeight(void)
 904 {
 905 //      uint16 vmode = GET16(tom_ram_8, VMODE);
 906         uint16 vbe = GET16(tom_ram_8, VBE);
 907         uint16 vbb = GET16(tom_ram_8, VBB);
 908 //      uint16 vdb = GET16(tom_ram_8, VDB);
 909 //      uint16 vde = GET16(tom_ram_8, VDE);
 910 //      uint16 vp = GET16(tom_ram_8, VP);
 911
 912 /*      if (vde == 0xFFFF)
 913                 vde = vbb;//*/
 914
 915 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
 916         // The video mode height probably works this way:
 917         // VC counts from 0 to VP. VDB starts the OP. Either when
 918         // VDE is reached or VP, the OP is stopped. Let's try it...
 919         // Also note that we're conveniently ignoring interlaced display modes...!
 920 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
 921 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
 922 //Let's try from the Vertical Blank interval...
 923 //Seems to work OK!
 924         return (vbb - vbe) >> 1;        // Again, doesn't take interlacing into account...
 925 }
 926
 927 //
 928 // TOM reset code
 929 // Now PAL friendly!
 930 //
 931 void tom_reset(void)
 932 {
 933         extern bool hardwareTypeNTSC;
 934
 935         op_reset();
 936         blitter_reset();
 937 //This should be done by JERRY!         pcm_reset();
 938
 939         memset(tom_ram_8, 0x00, 0x4000);
 940
 941         if (hardwareTypeNTSC)
 942         {
 943                 SET16(tom_ram_8, MEMCON1, 0x1861);
 944                 SET16(tom_ram_8, MEMCON2, 0x35CC);
 945                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period (1-based; HP=845)
 946                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
 947                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
 948                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
 949                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
 950                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
 951                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
 952                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
 953                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
 954                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
 955                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
 956                 SET16(tom_ram_8, VMODE, 0x06C1);
 957         }
 958         else    // PAL Jaguar
 959         {
 960                 SET16(tom_ram_8, MEMCON1, 0x1861);
 961                 SET16(tom_ram_8, MEMCON2, 0x35CC);
 962                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
 963                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
 964                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
 965                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
 966                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
 967                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
 968                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
 969                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
 970                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
 971                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
 972                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
 973                 SET16(tom_ram_8, VMODE, 0x06C1);
 974         }
 975
 976         tom_width = tom_real_internal_width = 0;
 977         tom_height = 0;
 978 //      tom_scanline = 0;
 979
 980 //This is WRONG
 981 //      hblankWidthInPixels = GET16(tom_ram_8, HDB1) >> 1;
 982
 983         tom_jerry_int_pending = 0;
 984         tom_timer_int_pending = 0;
 985         tom_object_int_pending = 0;
 986         tom_gpu_int_pending = 0;
 987         tom_video_int_pending = 0;
 988
 989         tom_timer_prescaler = 0;
 990         tom_timer_divider = 0;
 991         tom_timer_counter = 0;
 992         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 993 }
 994
 995 //
 996 // TOM byte access (read)
 997 //
 998 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
 999 {
1000 //???Is this needed???
1001 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1002 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1003 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1004 //      offset &= 0xFF3FFF;
1005
1006 #ifdef TOM_DEBUG
1007         WriteLog("TOM: Reading byte at %06X\n", offset);
1008 #endif
1009
1010         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1011                 return GPUReadByte(offset, who);
1012         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1013                 return GPUReadByte(offset, who);
1014         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1015                 return OPReadByte(offset, who);
1016         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1017                 return BlitterReadByte(offset, who);
1018         else if (offset == 0xF00050)
1019                 return tom_timer_prescaler >> 8;
1020         else if (offset == 0xF00051)
1021                 return tom_timer_prescaler & 0xFF;
1022         else if (offset == 0xF00052)
1023                 return tom_timer_divider >> 8;
1024         else if (offset == 0xF00053)
1025                 return tom_timer_divider & 0xFF;
1026
1027         return tom_ram_8[offset & 0x3FFF];
1028 }
1029
1030 //
1031 // TOM word access (read)
1032 //
1033 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1034 {
1035 //???Is this needed???
1036 //      offset &= 0xFF3FFF;
1037 #ifdef TOM_DEBUG
1038         WriteLog("TOM: Reading word at %06X\n", offset);
1039 #endif
1040 if (offset >= 0xF02000 && offset <= 0xF020FF)
1041         WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1042
1043         if (offset == 0xF000E0)
1044         {
1045                 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1046                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1047                         | (tom_video_int_pending << 0);
1048                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1049                 return data;
1050         }
1051 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1052 /*      else if (offset == 0xF00006)    // VC
1053         // What if we're in interlaced mode?
1054         // According to docs, in non-interlace mode VC is ALWAYS even...
1055 //              return (tom_scanline << 1);// + 1;
1056 //But it's causing Rayman to be fucked up... Why???
1057 //Because VC is even in NI mode when calling the OP! That's why!
1058                 return (tom_scanline << 1) + 1;//*/
1059         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1060                 return GPUReadWord(offset, who);
1061         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1062                 return GPUReadWord(offset, who);
1063         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1064                 return OPReadWord(offset, who);
1065         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1066                 return BlitterReadWord(offset, who);
1067         else if (offset == 0xF00050)
1068                 return tom_timer_prescaler;
1069         else if (offset == 0xF00052)
1070                 return tom_timer_divider;
1071
1072         offset &= 0x3FFF;
1073         return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1074 }
1075
1076 //
1077 // TOM byte access (write)
1078 //
1079 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1080 {
1081 //???Is this needed???
1082 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1083         offset &= 0xFF3FFF;
1084
1085 #ifdef TOM_DEBUG
1086         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1087 #endif
1088
1089         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1090         {
1091                 GPUWriteByte(offset, data, who);
1092                 return;
1093         }
1094         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1095         {
1096                 GPUWriteByte(offset, data, who);
1097                 return;
1098         }
1099         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1100         {
1101                 OPWriteByte(offset, data, who);
1102                 return;
1103         }
1104         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1105         {
1106                 BlitterWriteByte(offset, data, who);
1107                 return;
1108         }
1109         else if (offset == 0xF00050)
1110         {
1111                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
1112                 tom_reset_timer();
1113                 return;
1114         }
1115         else if (offset == 0xF00051)
1116         {
1117                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
1118                 tom_reset_timer();
1119                 return;
1120         }
1121         else if (offset == 0xF00052)
1122         {
1123                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
1124                 tom_reset_timer();
1125                 return;
1126         }
1127         else if (offset == 0xF00053)
1128         {
1129                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
1130                 tom_reset_timer();
1131                 return;
1132         }
1133         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
1134         {
1135                 // Writing to one CLUT writes to the other
1136                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1137                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
1138         }
1139
1140         tom_ram_8[offset & 0x3FFF] = data;
1141 }
1142
1143 //
1144 // TOM word access (write)
1145 //
1146 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1147 {
1148 //???Is this needed???
1149         offset &= 0xFF3FFF;
1150
1151 #ifdef TOM_DEBUG
1152         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1153 #endif
1154 if (offset == 0xF00000 + MEMCON1)
1155         WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1156 if (offset == 0xF00000 + MEMCON2)
1157         WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1158 if (offset >= 0xF02000 && offset <= 0xF020FF)
1159         WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1160
1161         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1162         {
1163                 GPUWriteWord(offset, data, who);
1164                 return;
1165         }
1166         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1167         {
1168                 GPUWriteWord(offset, data, who);
1169                 return;
1170         }
1171 //What's so special about this?
1172 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1173         {
1174                 TOMWriteByte(offset, data >> 8);
1175                 TOMWriteByte(offset+1, data & 0xFF);
1176         }*/
1177         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1178         {
1179                 OPWriteWord(offset, data, who);
1180                 return;
1181         }
1182         else if (offset == 0xF00050)
1183         {
1184                 tom_timer_prescaler = data;
1185                 tom_reset_timer();
1186                 return;
1187         }
1188         else if (offset == 0xF00052)
1189         {
1190                 tom_timer_divider = data;
1191                 tom_reset_timer();
1192                 return;
1193         }
1194         else if (offset == 0xF000E0)
1195         {
1196 //Check this out...
1197                 if (data & 0x0100)
1198                         tom_video_int_pending = 0;
1199                 if (data & 0x0200)
1200                         tom_gpu_int_pending = 0;
1201                 if (data & 0x0400)
1202                         tom_object_int_pending = 0;
1203                 if (data & 0x0800)
1204                         tom_timer_int_pending = 0;
1205                 if (data & 0x1000)
1206                         tom_jerry_int_pending = 0;
1207         }
1208         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1209         {
1210                 BlitterWriteWord(offset, data, who);
1211                 return;
1212         }
1213         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1214         {
1215                 // Writing to one CLUT writes to the other
1216                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1217 // Watch out for unaligned writes here! (Not fixed yet)
1218                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1219         }
1220
1221         offset &= 0x3FFF;
1222         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1223                 objectp_running = 1;
1224
1225         if (offset >= 0x30 && offset <= 0x4E)
1226                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1227         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1228                 data &= 0x03FF;                 // These are all 10-bit registers
1229
1230         TOMWriteByte(offset, data >> 8, who);
1231         TOMWriteByte(offset+1, data & 0xFF, who);
1232
1233 if (offset == VDB)
1234         WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1235 if (offset == VDE)
1236         WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1237 if (offset == VP)
1238         WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1239 if (offset == HDB1)
1240         WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1241 if (offset == HDE)
1242         WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1243 if (offset == HP)
1244         WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1245 if (offset == VBB)
1246         WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1247 if (offset == VBE)
1248         WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1249 if (offset == VS)
1250         WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1251 if (offset == VI)
1252         WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1253 if (offset == HBB)
1254         WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1255 if (offset == HBE)
1256         WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1257 if (offset == VMODE)
1258         WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tom_ram_8, VC));
1259
1260         // detect screen resolution changes
1261 //This may go away in the future, if we do the virtualized screen thing...
1262 //This may go away soon!
1263         if ((offset >= 0x28) && (offset <= 0x4F))
1264         {
1265                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1266                 tom_real_internal_width = width;
1267
1268                 if ((width != tom_width) || (height != tom_height))
1269                 {
1270 //                      extern SDL_Surface * surface, * mainSurface;
1271 //                      extern Uint32 mainSurfaceFlags;
1272 //                      static char window_title[256];
1273
1274                         tom_width = width, tom_height = height;
1275                         ResizeScreen(tom_width, tom_height);
1276 /*                      SDL_FreeSurface(surface);
1277                         surface = SDL_CreateRGBSurface(SDL_SWSURFACE, tom_width, tom_height,
1278                                 16, 0x7C00, 0x03E0, 0x001F, 0);
1279                         if (surface == NULL)
1280                         {
1281                                 WriteLog("TOM: Could not create primary SDL surface: %s", SDL_GetError());
1282                                 exit(1);
1283                         }
1284
1285                         sprintf(window_title, "Virtual Jaguar (%i x %i)", (int)tom_width, (int)tom_height);
1286                         mainSurface = SDL_SetVideoMode(tom_width, tom_height, 16, mainSurfaceFlags);
1287
1288                         if (mainSurface == NULL)
1289                         {
1290                                 WriteLog("Joystick: SDL is unable to set the video mode: %s\n", SDL_GetError());
1291                                 exit(1);
1292                         }
1293
1294                         SDL_WM_SetCaption(window_title, window_title);//*/
1295                 }
1296         }
1297 }
1298
1299 int tom_irq_enabled(int irq)
1300 {
1301         // This is the correct byte in big endian... D'oh!
1302 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1303         return tom_ram_8[INT1 + 1/*0xE1*/] & (1 << irq);
1304 }
1305
1306 //unused
1307 /*void tom_set_irq_latch(int irq, int enabled)
1308 {
1309         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1310 }*/
1311
1312 //unused
1313 /*uint16 tom_irq_control_reg(void)
1314 {
1315         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1316 }*/
1317
1318 void tom_reset_timer(void)
1319 {
1320         if (!tom_timer_prescaler || !tom_timer_divider)
1321                 tom_timer_counter = 0;
1322         else
1323 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!!
1324 //Also, why +1???
1325                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1326 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1327 }
1328
1329 //
1330 // TOM Programmable Interrupt Timer handler
1331 //
1332 void tom_pit_exec(uint32 cycles)
1333 {
1334         if (tom_timer_counter > 0)
1335         {
1336                 tom_timer_counter -= cycles;
1337
1338                 if (tom_timer_counter <= 0)
1339                 {
1340                         tom_set_pending_timer_int();
1341                         GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE);
1342                         if (tom_irq_enabled(IRQ_TIMER) && jaguar_interrupt_handler_is_valid(64))
1343                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1344
1345                         tom_reset_timer();
1346                 }
1347         }
1348 }