Shamusworld >> Repos - virtualjaguar/blob - src/tom.cpp

   1 //
   2 // TOM Processing
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups and endian wrongness amelioration by James L. Hammons
   7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
   8 //       the braindead way in which MAME handles memory. :-)
   9 //
  10 // Note: TOM has only a 16K memory space
  11 //
  12 //      ------------------------------------------------------------
  13 //      TOM REGISTERS (Mapped by Aaron Giles)
  14 //      ------------------------------------------------------------
  15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
  16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
  17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
  18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
  19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
  20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
  21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
  22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
  23 //                            -------- -------x      (ROMHI - controls ROM mapping)
  24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
  25 //                            --x----- --------      (HILO - image display bit order)
  26 //                            ---x---- --------      (BIGEND - big endian addressing?)
  27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
  28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
  29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
  30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
  31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
  32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
  33 //                            -----x-- --------      (which half of the display)
  34 //                            ------xx xxxxxxxx      (10-bit counter)
  35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
  36 //                            ----x--- --------      (which field is being generated)
  37 //                            -----xxx xxxxxxxx      (11-bit counter)
  38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
  39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
  40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
  41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
  42 //      F00026            W   -------- -------x   OBF - object processor flag
  43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
  44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
  45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
  46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
  47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
  48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
  49 //                        W   -------- ---x----      (INCEN - encrustation enable)
  50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
  51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
  52 //                        W   -------- -------x      (VIDEN - enables video)
  53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
  54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
  55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
  56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
  57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
  58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
  59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
  60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
  61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
  62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
  63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
  64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
  65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
  66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
  67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
  68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
  69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
  70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
  71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
  72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
  73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
  74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
  75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
  76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
  77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
  78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
  79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
  80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
  81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
  82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
  83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
  84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
  85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
  86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
  87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
  88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
  89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
  90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
  91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
  92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
  93 //      ------------------------------------------------------------
  94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
  95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
  96 //                      R/W   x------- --------      (DMAEN - DMA enable)
  97 //                      R/W   -x------ --------      (REGPAGE - register page)
  98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
  99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
 100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
 101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
 102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
 103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
 104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
 105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
 106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
 107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
 108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
 109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
 110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
 111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
 112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
 113 //                        W   -------- ----x---      (MATCOL - column/row major)
 114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
 115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
 116 //      F0210C            W   -------- -----xxx   G_END - data organization register
 117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
 119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
 120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
 121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
 122 //                      R     xxxx---- --------      (VERSION - GPU version code)
 123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
 125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
 126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
 127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
 128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
 129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
 134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
 135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
 136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
 137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 138 //      ------------------------------------------------------------
 139 //      BLITTER REGISTERS
 140 //      ------------------------------------------------------------
 141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
 142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
 143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
 144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 146 //                        W   -------- -----x-- -------- --------      (Y add control)
 147 //                        W   -------- ------xx -------- --------      (X add control)
 148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
 153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
 154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
 155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
 156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
 159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
 162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
 163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
 164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
 165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
 166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
 167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
 168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
 169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
 170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
 171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
 172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
 173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
 174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
 175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
 176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
 177 //                        W   -------- -----x-- -------- --------      (Y add control)
 178 //                        W   -------- ------xx -------- --------      (X add control)
 179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
 180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
 181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
 182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
 183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
 184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
 185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
 186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
 187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
 188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
 189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
 190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
 191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
 192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
 193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
 194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
 195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
 196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
 197 //                        W   -------x xxx----- -------- --------      (logical operation)
 198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
 199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
 200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
 201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
 202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
 203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
 204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
 205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
 206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
 207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
 208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
 209 //                        W   -------- -------- -------- x-------      (diagnostic use)
 210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
 211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
 212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
 213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
 214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
 215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
 216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
 217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
 218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
 219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
 220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
 221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
 222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
 223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
 224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
 225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
 226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
 227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
 228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
 229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
 230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
 231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
 232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
 233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
 234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
 235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
 236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
 237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
 238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
 239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
 240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
 241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
 242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
 243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
 244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
 245 //      ------------------------------------------------------------
 246
 247 #include <SDL.h>
 248 //#include "SDLptc.h"
 249 #include "tom.h"
 250 #include "gpu.h"
 251 #include "objectp.h"
 252 #include "cry2rgb.h"
 253
 254 // TOM registers (offset from $F00000)
 255
 256 #define MEMCON1         0x00
 257 #define MEMCON2         0x02
 258 #define HC                      0x04
 259 #define VC                      0x06
 260 #define VMODE           0x28
 261 #define   MODE          0x0006          // Line buffer to video generator mode
 262 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
 263 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode
 264 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles
 265 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
 266 #define HBB                     0x30
 267 #define HBE                     0x32
 268 #define HDB1            0x38
 269 #define HDB2            0x3A
 270 #define HDE                     0x3C
 271 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
 272 #define VBB                     0x40
 273 #define VBE                     0x42
 274 #define VS                      0x44
 275 #define VDB                     0x46
 276 #define VDE                     0x48
 277 #define VI                      0x4E
 278 #define BG                      0x58
 279
 280 //This can be defined in the makefile as well...
 281 //(It's easier to do it here, though...)
 282 //#define TOM_DEBUG
 283
 284 extern uint32 jaguar_mainRom_crc32;
 285 //extern Console console;
 286 //extern Surface * surface;
 287 extern uint8 objectp_running;
 288
 289 static uint8 * tom_ram_8;
 290 uint32 tom_width, tom_height, tom_real_internal_width;
 291 static uint32 tom_timer_prescaler;
 292 static uint32 tom_timer_divider;
 293 static int32 tom_timer_counter;
 294 uint32 tom_scanline;
 295 uint32 hblankWidthInPixels = 0;
 296 uint16 tom_puck_int_pending;
 297 uint16 tom_timer_int_pending;
 298 uint16 tom_object_int_pending;
 299 uint16 tom_gpu_int_pending;
 300 uint16 tom_video_int_pending;
 301 uint16 * tom_cry_rgb_mix_lut;
 302
 303 static char * videoMode_to_str[8] =
 304         { "16 bpp CRY", "24 bpp RGB", "16 bpp DIRECT", "16 bpp RGB",
 305           "Mixed mode", "24 bpp RGB", "16 bpp DIRECT", "16 bpp RGB" };
 306
 307 typedef void (render_xxx_scanline_fn)(int16 *);
 308
 309 // Private function prototypes
 310
 311 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
 312 void tom_render_24bpp_scanline(int16 * backbuffer);
 313 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
 314 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
 315 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
 316
 317 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
 318 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
 319 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
 320 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
 321 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
 322
 323 render_xxx_scanline_fn * scanline_render_normal[]=
 324 {
 325         tom_render_16bpp_cry_scanline,
 326         tom_render_24bpp_scanline,
 327         tom_render_16bpp_direct_scanline,
 328         tom_render_16bpp_rgb_scanline,
 329         tom_render_16bpp_cry_rgb_mix_scanline,
 330         tom_render_24bpp_scanline,
 331         tom_render_16bpp_direct_scanline,
 332         tom_render_16bpp_rgb_scanline,
 333 };
 334
 335 render_xxx_scanline_fn * scanline_render_stretch[]=
 336 {
 337         tom_render_16bpp_cry_stretch_scanline,
 338         tom_render_24bpp_stretch_scanline,
 339         tom_render_16bpp_direct_stretch_scanline,
 340         tom_render_16bpp_rgb_stretch_scanline,
 341         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
 342         tom_render_24bpp_stretch_scanline,
 343         tom_render_16bpp_direct_stretch_scanline,
 344         tom_render_16bpp_rgb_stretch_scanline,
 345 };
 346
 347 render_xxx_scanline_fn * scanline_render[8];
 348
 349
 350 void tom_calc_cry_rgb_mix_lut(void)
 351 {
 352         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
 353
 354         for (uint32 i=0; i<0x10000; i++)
 355         {
 356                 uint16 color = i;
 357
 358                 if (color & 0x01)
 359                 {
 360                         color >>= 1;
 361                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
 362                 }
 363                 else
 364                 {
 365                         uint32 chrm = (color & 0xF000) >> 12,
 366                                 chrl = (color & 0x0F00) >> 8,
 367                                 y = color & 0x00FF;
 368                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 369                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 370                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 371                         color = (red << 10) | (green << 5) | blue;
 372                 }
 373                 tom_cry_rgb_mix_lut[i] = color;
 374         }
 375 }
 376
 377 void tom_set_pending_puck_int(void)
 378 {
 379         tom_puck_int_pending = 1;
 380 }
 381
 382 void tom_set_pending_timer_int(void)
 383 {
 384         tom_timer_int_pending = 1;
 385 }
 386
 387 void tom_set_pending_object_int(void)
 388 {
 389         tom_object_int_pending = 1;
 390 }
 391
 392 void tom_set_pending_gpu_int(void)
 393 {
 394         tom_gpu_int_pending = 1;
 395 }
 396
 397 void tom_set_pending_video_int(void)
 398 {
 399         tom_video_int_pending = 1;
 400 }
 401
 402 uint8 * tom_get_ram_pointer(void)
 403 {
 404         return tom_ram_8;
 405 }
 406
 407 uint8 tom_getVideoMode(void)
 408 {
 409         uint16 vmode = GET16(tom_ram_8, VMODE);
 410         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
 411 }
 412
 413 uint16 tom_get_scanline(void)
 414 {
 415         return tom_scanline;
 416 }
 417
 418 /*uint16 tom_get_hdb(void)
 419 {
 420         return GET16(tom_ram_8, HDB);
 421 }*/
 422
 423 uint16 tom_get_vdb(void)
 424 {
 425         // This in NOT VDB!!!
 426 //      return GET16(tom_ram_8, VBE);
 427         return GET16(tom_ram_8, VDB);
 428 }
 429
 430 //
 431 // 16 BPP CRY/RGB mixed mode rendering
 432 //
 433 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
 434 {
 435         uint16 width = tom_width;
 436         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 437
 438         while (width)
 439         {
 440                 uint16 color = (*current_line_buffer++) << 8;
 441                 color |= *current_line_buffer++;
 442                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
 443                 width--;
 444         }
 445 }
 446
 447 //
 448 // 16 BPP CRY mode rendering
 449 //
 450 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
 451 {
 452         uint16 width = tom_width;
 453         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 454
 455         while (width)
 456         {
 457                 uint16 color = (*current_line_buffer++) << 8;
 458                 color |= *current_line_buffer++;
 459
 460                 uint32 chrm = (color & 0xF000) >> 12,
 461                         chrl = (color & 0x0F00) >> 8,
 462                         y = (color & 0x00FF);
 463
 464                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
 465                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
 466                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
 467
 468                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 469                 width--;
 470         }
 471 }
 472
 473 //
 474 // 24 BPP mode rendering
 475 //
 476 void tom_render_24bpp_scanline(int16 * backbuffer)
 477 {
 478         uint16 width = tom_width;
 479         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 480
 481         while (width)
 482         {
 483                 uint16 green = (*current_line_buffer++) >> 3;
 484                 uint16 red = (*current_line_buffer++) >> 3;
 485                 current_line_buffer++;
 486                 uint16 blue = (*current_line_buffer++) >> 3;
 487                 *backbuffer++ = (red << 10) | (green << 5) | blue;
 488                 width--;
 489         }
 490 }
 491
 492 //
 493 // 16 BPP direct mode rendering
 494 //
 495 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
 496 {
 497         uint16 width = tom_width;
 498         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 499
 500         while (width)
 501         {
 502                 uint16 color = (*current_line_buffer++) << 8;
 503                 color |= *current_line_buffer++;
 504                 *backbuffer++ = color >> 1;
 505                 width--;
 506         }
 507 }
 508
 509 //
 510 // 16 BPP RGB mode rendering
 511 //
 512 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
 513 {
 514         uint16 width = tom_width;
 515         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 516
 517         while (width)
 518         {
 519                 uint16 color = (*current_line_buffer++) << 8;
 520                 color = (color | *current_line_buffer++) >> 1;
 521                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
 522                 *backbuffer++ = color;
 523                 width--;
 524         }
 525 }
 526
 527 // This stuff may just go away by itself, especially if we do some
 528 // good old OpenGL goodness...
 529
 530 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
 531 {
 532         uint16 width=tom_width;
 533         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 534
 535         while (width)
 536         {
 537                 uint16 color;
 538                 color=*current_line_buffer++;
 539                 color<<=8;
 540                 color|=*current_line_buffer++;
 541                 *backbuffer++=tom_cry_rgb_mix_lut[color];
 542                 current_line_buffer+=2;
 543                 width--;
 544         }
 545 }
 546
 547 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
 548 {
 549         uint32 chrm, chrl, y;
 550
 551         uint16 width=tom_width;
 552         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 553
 554         while (width)
 555         {
 556                 uint16 color;
 557                 color=*current_line_buffer++;
 558                 color<<=8;
 559                 color|=*current_line_buffer++;
 560
 561                 chrm = (color & 0xF000) >> 12;
 562                 chrl = (color & 0x0F00) >> 8;
 563                 y    = (color & 0x00FF);
 564
 565                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
 566                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
 567                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
 568
 569                 uint16 color2;
 570                 color2=*current_line_buffer++;
 571                 color2<<=8;
 572                 color2|=*current_line_buffer++;
 573
 574                 chrm = (color2 & 0xF000) >> 12;
 575                 chrl = (color2 & 0x0F00) >> 8;
 576                 y    = (color2 & 0x00FF);
 577
 578                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
 579                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
 580                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
 581
 582                 red=(red+red2)>>1;
 583                 green=(green+green2)>>1;
 584                 blue=(blue+blue2)>>1;
 585
 586                 *backbuffer++=(red<<10)|(green<<5)|blue;
 587                 width--;
 588         }
 589 }
 590
 591 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
 592 {
 593         uint16 width=tom_width;
 594         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 595
 596         while (width)
 597         {
 598                 uint16 green=*current_line_buffer++;
 599                 uint16 red=*current_line_buffer++;
 600                 /*uint16 nc=*/current_line_buffer++;
 601                 uint16 blue=*current_line_buffer++;
 602                 red>>=3;
 603                 green>>=3;
 604                 blue>>=3;
 605                 *backbuffer++=(red<<10)|(green<<5)|blue;
 606                 current_line_buffer+=4;
 607                 width--;
 608         }
 609 }
 610
 611 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
 612 {
 613         uint16 width=tom_width;
 614         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 615
 616         while (width)
 617         {
 618                 uint16 color=*current_line_buffer++;
 619                 color<<=8;
 620                 color|=*current_line_buffer++;
 621                 color>>=1;
 622                 *backbuffer++=color;
 623                 current_line_buffer+=2;
 624                 width--;
 625         }
 626 }
 627
 628 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
 629 {
 630         uint16 width=tom_width;
 631         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
 632
 633         while (width)
 634         {
 635                 uint16 color1=*current_line_buffer++;
 636                 color1<<=8;
 637                 color1|=*current_line_buffer++;
 638                 color1>>=1;
 639                 uint16 color2=*current_line_buffer++;
 640                 color2<<=8;
 641                 color2|=*current_line_buffer++;
 642                 color2>>=1;
 643                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
 644                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
 645                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
 646
 647                 color1=(red<<10)|(blue<<5)|green;
 648                 *backbuffer++=color1;
 649                 width--;
 650         }
 651 }
 652
 653 //
 654 // Process a single scanline
 655 //
 656 void tom_exec_scanline(int16 * backbuffer, int32 scanline, bool render)
 657 {
 658         tom_scanline = scanline;
 659
 660         // Increment the horizontal count (why? RNG?)
 661 //      tom_word_write(0xF00004, tom_word_read(0xF00004) + 1);
 662
 663         if (render)
 664         {
 665                 uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
 666                 uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG+1];
 667
 668                 // Clear line buffer with BG
 669                 if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
 670                         for(uint32 i=0; i<720; i++)
 671                                 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
 672
 673 //              op_process_list(backbuffer, scanline, render);
 674                 OPProcessList(scanline, render);
 675
 676                 scanline_render[tom_getVideoMode()](backbuffer);
 677         }
 678 }
 679
 680 uint32 TOMGetSDLScreenPitch(void)
 681 {
 682         extern SDL_Surface * surface;
 683
 684         return surface->pitch;
 685 }
 686
 687 //
 688 // TOM initialization
 689 //
 690 void tom_init(void)
 691 {
 692         op_init();
 693         blitter_init();
 694 //This should be done by JERRY! pcm_init();
 695         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
 696         tom_reset();
 697         // Setup the non-stretchy scanline rendering...
 698         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 699         tom_calc_cry_rgb_mix_lut();
 700 }
 701
 702 void tom_done(void)
 703 {
 704         op_done();
 705 //This should be done by JERRY! pcm_done();
 706         blitter_done();
 707         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
 708                 videoMode_to_str[tom_getVideoMode()]);
 709 //      WriteLog("\ntom: object processor:\n");
 710 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
 711 //      WriteLog("tom: INT1=0x%.2x%.2x\n",tom_byte_read(0xf000e0),tom_byte_read(0xf000e1));
 712         gpu_done();
 713         dsp_done();
 714         memory_free(tom_ram_8);
 715 }
 716
 717 uint32 tom_getHBlankWidthInPixels(void)
 718 {
 719         return hblankWidthInPixels;
 720 }
 721
 722 uint32 tom_getVideoModeWidth(void)
 723 {
 724         uint16 vmode = GET16(tom_ram_8, VMODE);
 725         uint16 hdb1 = GET16(tom_ram_8, HDB1);
 726 //      uint16 hde = GET16(tom_ram_8, HDE);
 727 //      uint16 hbb = GET16(tom_ram_8, HBB);
 728 //      uint16 hbe = GET16(tom_ram_8, HBE);
 729
 730         // NOTE: PWIDTH is value + 1...!
 731         int pwidth = ((vmode & PWIDTH) >> 9) + 1;
 732         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
 733         // this implies that the other modes have pixels that are *not* square!
 734
 735         uint32 width = 640;
 736         switch (pwidth)
 737         {
 738 /*      case 1: width = 640; break;
 739         case 2: width = 640; break;
 740         case 3: width = 448; break;
 741         case 4: width = 320; break;
 742         case 5: width = 256; break;
 743         case 6: width = 256; break;
 744         case 7: width = 256; break;
 745         case 8: width = 320; break;//*/
 746         case 1: width = 1330; break;            // 0.25:1 pixels (X:Y ratio)
 747         case 2: width = 665; break;                     // 0.50:1 pixels
 748         case 3: width = 443; break;                     // 0.75:1 pixels
 749         case 4: width = 332; break;                     // 1.00:1 pixels
 750         case 5: width = 266; break;                     // 1.25:1 pixels
 751         case 6: width = 222; break;                     // 1.50:1 pixels
 752         case 7: width = 190; break;                     // 1.75:1 pixels
 753         case 8: width = 166; break;                     // 2.00:1 pixels
 754 //Temporary, for testing Doom...
 755 //      case 8: width = 332; break;                     // 2.00:1 pixels
 756 //*/
 757         }
 758
 759         if (hdb1 == 123)
 760                 hblankWidthInPixels = 16;
 761         else
 762                 hblankWidthInPixels = 0;
 763
 764 //      WriteLog("TOM: HDB1=%i HBE=%i\n", hdb1, hbe);
 765         return width;
 766 }
 767
 768 // *** SPECULATION ***
 769 // It might work better to virtualize the height settings, i.e., set the vertical
 770 // height at 240 lines and clip using the VDB and VDE/VP registers...
 771 // Same with the width...
 772
 773 uint32 tom_getVideoModeHeight(void)
 774 {
 775 //      uint16 vmode = GET16(tom_ram_8, VMODE);
 776         uint16 vbe = GET16(tom_ram_8, VBE);
 777         uint16 vbb = GET16(tom_ram_8, VBB);
 778 //      uint16 vdb = GET16(tom_ram_8, VDB);
 779 //      uint16 vde = GET16(tom_ram_8, VDE);
 780 //      uint16 vp = GET16(tom_ram_8, VP);
 781
 782 /*      if (vde == 0xFFFF)
 783                 vde = vbb;//*/
 784
 785 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
 786         // The video mode height probably works this way:
 787         // VC counts from 0 to VP. VDB starts the OP. Either when
 788         // VDE is reached or VP, the OP is stopped. Let's try it...
 789         // Also note that we're conveniently ignoring interlaced display modes...!
 790 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
 791 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
 792 //Let's try from the Vertical Blank interval...
 793         return (vbb - vbe) >> 1;
 794 }
 795
 796 //
 797 // TOM reset code
 798 // NOTE: Should set up PAL values here when in PAL mode (use BIOS to find default values)
 799 //       for when user starts with -nobios -pal flags... [DONE]
 800 //
 801 void tom_reset(void)
 802 {
 803         extern bool hardwareTypeNTSC;
 804
 805         op_reset();
 806         blitter_reset();
 807 //This should be done by JERRY!         pcm_reset();
 808
 809         memset(tom_ram_8, 0x00, 0x4000);
 810
 811         if (hardwareTypeNTSC)
 812         {
 813                 SET16(tom_ram_8, MEMCON1, 0x1861);
 814                 SET16(tom_ram_8, MEMCON2, 0x35CC);
 815                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period
 816                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
 817                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
 818                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
 819                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
 820                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
 821                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
 822                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
 823                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
 824                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
 825                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
 826                 SET16(tom_ram_8, VMODE, 0x06C1);
 827         }
 828         else    // PAL Jaguar
 829         {
 830                 SET16(tom_ram_8, MEMCON1, 0x1861);
 831                 SET16(tom_ram_8, MEMCON2, 0x35CC);
 832                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
 833                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
 834                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
 835                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
 836                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
 837                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
 838                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
 839                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
 840                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
 841                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
 842                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
 843                 SET16(tom_ram_8, VMODE, 0x06C1);
 844         }
 845
 846         tom_width = tom_real_internal_width = 0;
 847         tom_height = 0;
 848         tom_scanline = 0;
 849
 850         hblankWidthInPixels = GET16(tom_ram_8, HDB1) >> 1;
 851
 852         tom_puck_int_pending = 0;
 853         tom_timer_int_pending = 0;
 854         tom_object_int_pending = 0;
 855         tom_gpu_int_pending = 0;
 856         tom_video_int_pending = 0;
 857
 858         tom_timer_prescaler = 0;
 859         tom_timer_divider = 0;
 860         tom_timer_counter = 0;
 861         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
 862 }
 863
 864 //
 865 // TOM byte access (read)
 866 //
 867
 868 unsigned tom_byte_read(unsigned int offset)
 869 {
 870 //???Is this needed???
 871 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
 872 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
 873 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
 874 //      offset &= 0xFF3FFF;
 875
 876 #ifdef TOM_DEBUG
 877         WriteLog("TOM: Reading byte at %06X\n", offset);
 878 #endif
 879
 880         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 881                 return gpu_byte_read(offset);
 882         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 883                 return gpu_byte_read(offset);
 884         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 885                 return op_byte_read(offset);
 886         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 887                 return blitter_byte_read(offset);
 888         else if (offset == 0xF00050)
 889                 return tom_timer_prescaler >> 8;
 890         else if (offset == 0xF00051)
 891                 return tom_timer_prescaler & 0xFF;
 892         else if (offset == 0xF00052)
 893                 return tom_timer_divider >> 8;
 894         else if (offset == 0xF00053)
 895                 return tom_timer_divider & 0xFF;
 896
 897         return tom_ram_8[offset & 0x3FFF];
 898 }
 899
 900 //
 901 // TOM word access (read)
 902 //
 903
 904 unsigned tom_word_read(unsigned int offset)
 905 {
 906 //???Is this needed???
 907 //      offset &= 0xFF3FFF;
 908 #ifdef TOM_DEBUG
 909         WriteLog("TOM: Reading word at %06X\n", offset);
 910 #endif
 911 if (offset >= 0xF02000 && offset <= 0xF020FF)
 912         WriteLog("TOM: Read attempted from GPU register file (unimplemented)!\n");
 913
 914         if (offset == 0xF000E0)
 915         {
 916                 uint16 data = (tom_puck_int_pending << 4) | (tom_timer_int_pending << 3)
 917                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
 918                         | (tom_video_int_pending << 0);
 919                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
 920                 return data;
 921         }
 922 //Shoud be handled by the jaguar main loop now...
 923 /*      else if (offset == 0xF00006)    // VC
 924         // What if we're in interlaced mode?
 925         // According to docs, in non-interlace mode VC is ALWAYS even...
 926 //              return (tom_scanline << 1);// + 1;
 927 //But it's causing Rayman to be fucked up... Why???
 928 //Because VC is even in NI mode when calling the OP! That's why!
 929                 return (tom_scanline << 1) + 1;//*/
 930         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 931                 return gpu_word_read(offset);
 932         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 933                 return gpu_word_read(offset);
 934         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 935                 return op_word_read(offset);
 936         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 937                 return blitter_word_read(offset);
 938         else if (offset == 0xF00050)
 939                 return tom_timer_prescaler;
 940         else if (offset == 0xF00052)
 941                 return tom_timer_divider;
 942
 943         offset &= 0x3FFF;
 944         return (tom_byte_read(offset) << 8) | tom_byte_read(offset+1);
 945 }
 946
 947 //
 948 // TOM byte access (write)
 949 //
 950
 951 void tom_byte_write(unsigned offset, unsigned data)
 952 {
 953 //???Is this needed???
 954 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
 955         offset &= 0xFF3FFF;
 956
 957 #ifdef TOM_DEBUG
 958         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
 959 #endif
 960
 961         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
 962         {
 963                 gpu_byte_write(offset, data);
 964                 return;
 965         }
 966         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
 967         {
 968                 gpu_byte_write(offset, data);
 969                 return;
 970         }
 971         else if ((offset >= 0xF00010) && (offset < 0xF00028))
 972         {
 973                 op_byte_write(offset, data);
 974                 return;
 975         }
 976         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
 977         {
 978                 blitter_byte_write(offset, data);
 979                 return;
 980         }
 981         else if (offset == 0xF00050)
 982         {
 983                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
 984                 tom_reset_timer();
 985                 return;
 986         }
 987         else if (offset == 0xF00051)
 988         {
 989                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
 990                 tom_reset_timer();
 991                 return;
 992         }
 993         else if (offset == 0xF00052)
 994         {
 995                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
 996                 tom_reset_timer();
 997                 return;
 998         }
 999         else if (offset == 0xF00053)
1000         {
1001                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
1002                 tom_reset_timer();
1003                 return;
1004         }
1005         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
1006         {
1007                 // Writing to one CLUT writes to the other
1008                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1009                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
1010         }
1011
1012         tom_ram_8[offset & 0x3FFF] = data;
1013 }
1014
1015 //
1016 // TOM word access (write)
1017 //
1018
1019 void tom_word_write(unsigned offset, unsigned data)
1020 {
1021 //???Is this needed???
1022         offset &= 0xFF3FFF;
1023
1024 #ifdef TOM_DEBUG
1025         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1026 #endif
1027 if (offset == 0xF00000 + MEMCON1)
1028         WriteLog("TOM: Memory Configuration 1 written: %04X\n", data);
1029 if (offset == 0xF00000 + MEMCON2)
1030         WriteLog("TOM: Memory Configuration 2 written: %04X\n", data);
1031 if (offset >= 0xF02000 && offset <= 0xF020FF)
1032         WriteLog("TOM: Write attempted to GPU register file (unimplemented)!\n");
1033
1034         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1035         {
1036                 gpu_word_write(offset, data);
1037                 return;
1038         }
1039         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1040         {
1041                 gpu_word_write(offset, data);
1042                 return;
1043         }
1044 //What's so special about this?
1045 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1046         {
1047                 tom_byte_write(offset, data >> 8);
1048                 tom_byte_write(offset+1, data & 0xFF);
1049         }*/
1050         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1051         {
1052                 op_word_write(offset, data);
1053                 return;
1054         }
1055         else if (offset == 0xF00050)
1056         {
1057                 tom_timer_prescaler = data;
1058                 tom_reset_timer();
1059                 return;
1060         }
1061         else if (offset == 0xF00052)
1062         {
1063                 tom_timer_divider = data;
1064                 tom_reset_timer();
1065                 return;
1066         }
1067         else if (offset == 0xF000E0)
1068         {
1069 //Check this out...
1070                 if (data & 0x0100)
1071                         tom_video_int_pending = 0;
1072                 if (data & 0x0200)
1073                         tom_gpu_int_pending = 0;
1074                 if (data & 0x0400)
1075                         tom_object_int_pending = 0;
1076                 if (data & 0x0800)
1077                         tom_timer_int_pending = 0;
1078                 if (data & 0x1000)
1079                         tom_puck_int_pending = 0;
1080         }
1081         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1082         {
1083                 blitter_word_write(offset, data);
1084                 return;
1085         }
1086         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1087         {
1088                 // Writing to one CLUT writes to the other
1089                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1090 // Watch out for unaligned writes here! (Not fixed yet)
1091                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1092         }
1093
1094         offset &= 0x3FFF;
1095         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1096                 objectp_running = 1;
1097
1098         if (offset >= 0x30 && offset <= 0x4E)
1099                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1100         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1101                 data &= 0x03FF;                 // These are all 10-bit registers
1102
1103         tom_byte_write(offset, data >> 8);
1104         tom_byte_write(offset+1, data & 0xFF);
1105
1106 if (offset == VDB)
1107         WriteLog("TOM: Vertical Display Begin written: %u\n", data);
1108 if (offset == VDE)
1109         WriteLog("TOM: Vertical Display End written: %u\n", data);
1110 if (offset == VP)
1111         WriteLog("TOM: Vertical Period written: %u (%sinterlaced)\n", data, (data & 0x01 ? "non-" : ""));
1112 if (offset == HDB1)
1113         WriteLog("TOM: Horizontal Display Begin 1 written: %u\n", data);
1114 if (offset == HDE)
1115         WriteLog("TOM: Horizontal Display End written: %u\n", data);
1116 if (offset == HP)
1117         WriteLog("TOM: Horizontal Period written: %u\n", data);
1118 if (offset == VBB)
1119         WriteLog("TOM: Vertical Blank Begin written: %u\n", data);
1120 if (offset == VBE)
1121         WriteLog("TOM: Vertical Blank End written: %u\n", data);
1122 if (offset == VS)
1123         WriteLog("TOM: Vertical Sync written: %u\n", data);
1124 if (offset == VI)
1125         WriteLog("TOM: Vertical Interrupt written: %u\n", data);
1126 if (offset == HBB)
1127         WriteLog("TOM: Horizontal Blank Begin written: %u\n", data);
1128 if (offset == HBE)
1129         WriteLog("TOM: Horizontal Blank End written: %u\n", data);
1130 if (offset == VMODE)
1131         WriteLog("TOM: Video Mode written: %04X (PWIDTH = %u, VC = %u)\n", data, ((data >> 9) & 0x07) + 1, GET16(tom_ram_8, VC));
1132
1133         // detect screen resolution changes
1134 //This may go away in the future, if we do the virtualized screen thing...
1135         if ((offset >= 0x28) && (offset <= 0x4F))
1136         {
1137                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1138                 tom_real_internal_width = width;
1139
1140 //This looks like an attempt to render non-square pixels (though wrong...)
1141 /*              if (width == 640)
1142                 {
1143                         memcpy(scanline_render, scanline_render_stretch, sizeof(scanline_render));
1144                         width = 320;
1145                 }
1146                 else
1147                         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));//*/
1148
1149                 if ((width != tom_width) || (height != tom_height))
1150                 {
1151                         extern SDL_Surface * surface, * mainSurface;
1152                         extern Uint32 mainSurfaceFlags;
1153 //                      ws_audio_done();
1154
1155                         static char window_title[256];
1156 //                      delete surface;
1157
1158                         tom_width = width, tom_height = height;
1159 //                      Format format(16, 0x007C00, 0x00003E0, 0x0000001F);
1160 //                      surface = new Surface(tom_width, tom_height, format);
1161                         SDL_FreeSurface(surface);
1162                         surface = SDL_CreateRGBSurface(SDL_SWSURFACE, tom_width, tom_height,
1163                                 16, 0x7C00, 0x03E0, 0x001F, 0);
1164                         if (surface == NULL)
1165                         {
1166                                 WriteLog("TOM: Could not create primary SDL surface: %s", SDL_GetError());
1167                                 exit(1);
1168                         }
1169
1170                         sprintf(window_title, "Virtual Jaguar (%i x %i)", (int)tom_width, (int)tom_height);
1171 //                      console.close();
1172 //                      console.open(window_title, width, tom_height, format);
1173 //???Should we do this???
1174 //      SDL_FreeSurface(mainSurface);
1175                         mainSurface = SDL_SetVideoMode(tom_width, tom_height, 16, mainSurfaceFlags);
1176
1177                         if (mainSurface == NULL)
1178                         {
1179                                 WriteLog("Joystick: SDL is unable to set the video mode: %s\n", SDL_GetError());
1180                                 exit(1);
1181                         }
1182
1183                         SDL_WM_SetCaption(window_title, window_title);
1184
1185 //                      ws_audio_init();
1186 //                      ws_audio_reset();
1187                 }
1188         }
1189 }
1190
1191 int tom_irq_enabled(int irq)
1192 {
1193         // This is the correct byte in big endian... D'oh!
1194 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1195         return tom_ram_8[0xE1] & (1 << irq);
1196 }
1197
1198 //unused
1199 /*void tom_set_irq_latch(int irq, int enabled)
1200 {
1201         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1202 }*/
1203
1204 //unused
1205 /*uint16 tom_irq_control_reg(void)
1206 {
1207         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1208 }*/
1209
1210 void tom_reset_timer(void)
1211 {
1212         if (!tom_timer_prescaler || !tom_timer_divider)
1213                 tom_timer_counter = 0;
1214         else
1215                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1216 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1217 }
1218
1219 void tom_pit_exec(uint32 cycles)
1220 {
1221         if (tom_timer_counter > 0)
1222         {
1223                 tom_timer_counter -= cycles;
1224
1225                 if (tom_timer_counter <= 0)
1226                 {
1227                         tom_set_pending_timer_int();
1228                         GPUSetIRQLine(2, ASSERT_LINE);
1229                         if ((tom_irq_enabled(IRQ_TIMER)) && (jaguar_interrupt_handler_is_valid(64)))
1230                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1231
1232                         tom_reset_timer();
1233                 }
1234         }
1235 }