4 // Originally by David Raingeard (cal2)
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Cleanups and endian wrongness amelioration by James L. Hammons
7 // (C) 2010 Underground Software
9 // JLH = James L. Hammons <jlhamm@acm.org>
12 // --- ---------- -------------------------------------------------------------
13 // JLH 01/16/2010 Created this log ;-)
15 // Note: Endian wrongness probably stems from the MAME origins of this emu and
16 // the braindead way in which MAME handles memory. :-)
18 // Note: TOM has only a 16K memory space
20 // ------------------------------------------------------------
21 // TOM REGISTERS (Mapped by Aaron Giles)
22 // ------------------------------------------------------------
23 // F00000-F0FFFF R/W xxxxxxxx xxxxxxxx Internal Registers
24 // F00000 R/W -x-xx--- xxxxxxxx MEMCON1 - memory config reg 1
25 // -x------ -------- (CPU32 - is the CPU 32bits?)
26 // ---xx--- -------- (IOSPEED - external I/O clock cycles)
27 // -------- x------- (FASTROM - reduces ROM clock cycles)
28 // -------- -xx----- (DRAMSPEED - sets RAM clock cycles)
29 // -------- ---xx--- (ROMSPEED - sets ROM clock cycles)
30 // -------- -----xx- (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
31 // -------- -------x (ROMHI - controls ROM mapping)
32 // F00002 R/W --xxxxxx xxxxxxxx MEMCON2 - memory config reg 2
33 // --x----- -------- (HILO - image display bit order)
34 // ---x---- -------- (BIGEND - big endian addressing?)
35 // ----xxxx -------- (REFRATE - DRAM refresh rate)
36 // -------- xx------ (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
37 // -------- --xx---- (COLS1 - DRAM1 columns: 256,512,1024,2048)
38 // -------- ----xx-- (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
39 // -------- ------xx (COLS0 - DRAM0 columns: 256,512,1024,2048)
40 // F00004 R/W -----xxx xxxxxxxx HC - horizontal count
41 // -----x-- -------- (which half of the display)
42 // ------xx xxxxxxxx (10-bit counter)
43 // F00006 R/W ----xxxx xxxxxxxx VC - vertical count
44 // ----x--- -------- (which field is being generated)
45 // -----xxx xxxxxxxx (11-bit counter)
46 // F00008 R -----xxx xxxxxxxx LPH - light pen horizontal position
47 // F0000A R -----xxx xxxxxxxx LPV - light pen vertical position
48 // F00010-F00017 R xxxxxxxx xxxxxxxx OB - current object code from the graphics processor
49 // F00020-F00023 W xxxxxxxx xxxxxxxx OLP - start of the object list
50 // F00026 W -------- -------x OBF - object processor flag
51 // F00028 W ----xxxx xxxxxxxx VMODE - video mode
52 // W ----xxx- -------- (PWIDTH1-8 - width of pixel in video clock cycles)
53 // W -------x -------- (VARMOD - enable variable color resolution)
54 // W -------- x------- (BGEN - clear line buffer to BG color)
55 // W -------- -x------ (CSYNC - enable composite sync on VSYNC)
56 // W -------- --x----- (BINC - local border color if INCEN)
57 // W -------- ---x---- (INCEN - encrustation enable)
58 // W -------- ----x--- (GENLOCK - enable genlock)
59 // W -------- -----xx- (MODE - CRY16,RGB24,DIRECT16,RGB16)
60 // W -------- -------x (VIDEN - enables video)
61 // F0002A W xxxxxxxx xxxxxxxx BORD1 - border color (red/green)
62 // F0002C W -------- xxxxxxxx BORD2 - border color (blue)
63 // F0002E W ------xx xxxxxxxx HP - horizontal period
64 // F00030 W -----xxx xxxxxxxx HBB - horizontal blanking begin
65 // F00032 W -----xxx xxxxxxxx HBE - horizontal blanking end
66 // F00034 W -----xxx xxxxxxxx HSYNC - horizontal sync
67 // F00036 W ------xx xxxxxxxx HVS - horizontal vertical sync
68 // F00038 W -----xxx xxxxxxxx HDB1 - horizontal display begin 1
69 // F0003A W -----xxx xxxxxxxx HDB2 - horizontal display begin 2
70 // F0003C W -----xxx xxxxxxxx HDE - horizontal display end
71 // F0003E W -----xxx xxxxxxxx VP - vertical period
72 // F00040 W -----xxx xxxxxxxx VBB - vertical blanking begin
73 // F00042 W -----xxx xxxxxxxx VBE - vertical blanking end
74 // F00044 W -----xxx xxxxxxxx VS - vertical sync
75 // F00046 W -----xxx xxxxxxxx VDB - vertical display begin
76 // F00048 W -----xxx xxxxxxxx VDE - vertical display end
77 // F0004A W -----xxx xxxxxxxx VEB - vertical equalization begin
78 // F0004C W -----xxx xxxxxxxx VEE - vertical equalization end
79 // F0004E W -----xxx xxxxxxxx VI - vertical interrupt
80 // F00050 W xxxxxxxx xxxxxxxx PIT0 - programmable interrupt timer 0
81 // F00052 W xxxxxxxx xxxxxxxx PIT1 - programmable interrupt timer 1
82 // F00054 W ------xx xxxxxxxx HEQ - horizontal equalization end
83 // F00058 W xxxxxxxx xxxxxxxx BG - background color
84 // F000E0 R/W ---xxxxx ---xxxxx INT1 - CPU interrupt control register
85 // ---x---- -------- (C_JERCLR - clear pending Jerry ints)
86 // ----x--- -------- (C_PITCLR - clear pending PIT ints)
87 // -----x-- -------- (C_OPCLR - clear pending object processor ints)
88 // ------x- -------- (C_GPUCLR - clear pending graphics processor ints)
89 // -------x -------- (C_VIDCLR - clear pending video timebase ints)
90 // -------- ---x---- (C_JERENA - enable Jerry ints)
91 // -------- ----x--- (C_PITENA - enable PIT ints)
92 // -------- -----x-- (C_OPENA - enable object processor ints)
93 // -------- ------x- (C_GPUENA - enable graphics processor ints)
94 // -------- -------x (C_VIDENA - enable video timebase ints)
95 // F000E2 W -------- -------- INT2 - CPU interrupt resume register
96 // F00400-F005FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table A
97 // F00600-F007FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table B
98 // F00800-F00D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer A
99 // F01000-F0159F R/W xxxxxxxx xxxxxxxx LBUF - line buffer B
100 // F01800-F01D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer currently selected
101 // ------------------------------------------------------------
102 // F02000-F021FF R/W xxxxxxxx xxxxxxxx GPU control registers
103 // F02100 R/W xxxxxxxx xxxxxxxx G_FLAGS - GPU flags register
104 // R/W x------- -------- (DMAEN - DMA enable)
105 // R/W -x------ -------- (REGPAGE - register page)
106 // W --x----- -------- (G_BLITCLR - clear blitter interrupt)
107 // W ---x---- -------- (G_OPCLR - clear object processor int)
108 // W ----x--- -------- (G_PITCLR - clear PIT interrupt)
109 // W -----x-- -------- (G_JERCLR - clear Jerry interrupt)
110 // W ------x- -------- (G_CPUCLR - clear CPU interrupt)
111 // R/W -------x -------- (G_BLITENA - enable blitter interrupt)
112 // R/W -------- x------- (G_OPENA - enable object processor int)
113 // R/W -------- -x------ (G_PITENA - enable PIT interrupt)
114 // R/W -------- --x----- (G_JERENA - enable Jerry interrupt)
115 // R/W -------- ---x---- (G_CPUENA - enable CPU interrupt)
116 // R/W -------- ----x--- (IMASK - interrupt mask)
117 // R/W -------- -----x-- (NEGA_FLAG - ALU negative)
118 // R/W -------- ------x- (CARRY_FLAG - ALU carry)
119 // R/W -------- -------x (ZERO_FLAG - ALU zero)
120 // F02104 W -------- ----xxxx G_MTXC - matrix control register
121 // W -------- ----x--- (MATCOL - column/row major)
122 // W -------- -----xxx (MATRIX3-15 - matrix width)
123 // F02108 W ----xxxx xxxxxx-- G_MTXA - matrix address register
124 // F0210C W -------- -----xxx G_END - data organization register
125 // W -------- -----x-- (BIG_INST - big endian instruction fetch)
126 // W -------- ------x- (BIG_PIX - big endian pixels)
127 // W -------- -------x (BIG_IO - big endian I/O)
128 // F02110 R/W xxxxxxxx xxxxxxxx G_PC - GPU program counter
129 // F02114 R/W xxxxxxxx xx-xxxxx G_CTRL - GPU control/status register
130 // R xxxx---- -------- (VERSION - GPU version code)
131 // R/W ----x--- -------- (BUS_HOG - hog the bus!)
132 // R/W -----x-- -------- (G_BLITLAT - blitter interrupt latch)
133 // R/W ------x- -------- (G_OPLAT - object processor int latch)
134 // R/W -------x -------- (G_PITLAT - PIT interrupt latch)
135 // R/W -------- x------- (G_JERLAT - Jerry interrupt latch)
136 // R/W -------- -x------ (G_CPULAT - CPU interrupt latch)
137 // R/W -------- ---x---- (SINGLE_GO - single step one instruction)
138 // R/W -------- ----x--- (SINGLE_STEP - single step mode)
139 // R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
140 // R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
141 // R/W -------- -------x (GPUGO - enable GPU execution)
142 // F02118-F0211B R/W xxxxxxxx xxxxxxxx G_HIDATA - high data register
143 // F0211C-F0211F R xxxxxxxx xxxxxxxx G_REMAIN - divide unit remainder
144 // F0211C W -------- -------x G_DIVCTRL - divide unit control
145 // W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
146 // ------------------------------------------------------------
148 // ------------------------------------------------------------
149 // F02200-F022FF R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx Blitter registers
150 // F02200 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_BASE - A1 base register
151 // F02204 W -------- ---xxxxx -xxxxxxx xxxxx-xx A1_FLAGS - A1 flags register
152 // W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
153 // W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
154 // W -------- -----x-- -------- -------- (Y add control)
155 // W -------- ------xx -------- -------- (X add control)
156 // W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
157 // W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
158 // W -------- -------- -------- --xxx--- (PIXEL - pixel size)
159 // W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
160 // F02208 W -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx A1_CLIP - A1 clipping size
161 // W -xxxxxxx xxxxxxxx -------- -------- (height)
162 // W -------- -------- -xxxxxxx xxxxxxxx (width)
163 // F0220C R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_PIXEL - A1 pixel pointer
164 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
165 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
166 // F02210 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_STEP - A1 step value
167 // W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
168 // W -------- -------- xxxxxxxx xxxxxxxx (X step value)
169 // F02214 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FSTEP - A1 step fraction value
170 // W xxxxxxxx xxxxxxxx -------- -------- (Y step fraction value)
171 // W -------- -------- xxxxxxxx xxxxxxxx (X step fraction value)
172 // F02218 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FPIXEL - A1 pixel pointer fraction
173 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel fraction value)
174 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel fraction value)
175 // F0221C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_INC - A1 increment
176 // W xxxxxxxx xxxxxxxx -------- -------- (Y increment)
177 // W -------- -------- xxxxxxxx xxxxxxxx (X increment)
178 // F02220 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FINC - A1 increment fraction
179 // W xxxxxxxx xxxxxxxx -------- -------- (Y increment fraction)
180 // W -------- -------- xxxxxxxx xxxxxxxx (X increment fraction)
181 // F02224 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_BASE - A2 base register
182 // F02228 W -------- ---xxxxx -xxxxxxx xxxxx-xx A2_FLAGS - A2 flags register
183 // W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
184 // W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
185 // W -------- -----x-- -------- -------- (Y add control)
186 // W -------- ------xx -------- -------- (X add control)
187 // W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
188 // W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
189 // W -------- -------- -------- --xxx--- (PIXEL - pixel size)
190 // W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
191 // F0222C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_MASK - A2 window mask
192 // F02230 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_PIXEL - A2 pixel pointer
193 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
194 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
195 // F02234 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_STEP - A2 step value
196 // W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
197 // W -------- -------- xxxxxxxx xxxxxxxx (X step value)
198 // F02238 W -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - command register
199 // W -x------ -------- -------- -------- (SRCSHADE - modify source intensity)
200 // W --x----- -------- -------- -------- (BUSHI - hi priority bus)
201 // W ---x---- -------- -------- -------- (BKGWREN - writeback destination)
202 // W ----x--- -------- -------- -------- (DCOMPEN - write inhibit from data comparator)
203 // W -----x-- -------- -------- -------- (BCOMPEN - write inhibit from bit coparator)
204 // W ------x- -------- -------- -------- (CMPDST - compare dest instead of src)
205 // W -------x xxx----- -------- -------- (logical operation)
206 // W -------- ---xxx-- -------- -------- (ZMODE - Z comparator mode)
207 // W -------- ------x- -------- -------- (ADDDSEL - select sum of src & dst)
208 // W -------- -------x -------- -------- (PATDSEL - select pattern data)
209 // W -------- -------- x------- -------- (TOPNEN - enable carry into top intensity nibble)
210 // W -------- -------- -x------ -------- (TOPBEN - enable carry into top intensity byte)
211 // W -------- -------- --x----- -------- (ZBUFF - enable Z updates in inner loop)
212 // W -------- -------- ---x---- -------- (GOURD - enable gouraud shading in inner loop)
213 // W -------- -------- ----x--- -------- (DSTA2 - reverses A2/A1 roles)
214 // W -------- -------- -----x-- -------- (UPDA2 - add A2 step to A2 in outer loop)
215 // W -------- -------- ------x- -------- (UPDA1 - add A1 step to A1 in outer loop)
216 // W -------- -------- -------x -------- (UPDA1F - add A1 fraction step to A1 in outer loop)
217 // W -------- -------- -------- x------- (diagnostic use)
218 // W -------- -------- -------- -x------ (CLIP_A1 - clip A1 to window)
219 // W -------- -------- -------- --x----- (DSTWRZ - enable dest Z write in inner loop)
220 // W -------- -------- -------- ---x---- (DSTENZ - enable dest Z read in inner loop)
221 // W -------- -------- -------- ----x--- (DSTEN - enables dest data read in inner loop)
222 // W -------- -------- -------- -----x-- (SRCENX - enable extra src read at start of inner)
223 // W -------- -------- -------- ------x- (SRCENZ - enables source Z read in inner loop)
224 // W -------- -------- -------- -------x (SRCEN - enables source data read in inner loop)
225 // F02238 R xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - status register
226 // R xxxxxxxx xxxxxxxx -------- -------- (inner count)
227 // R -------- -------- xxxxxxxx xxxxxx-- (diagnostics)
228 // R -------- -------- -------- ------x- (STOPPED - when stopped in collision detect)
229 // R -------- -------- -------- -------x (IDLE - when idle)
230 // F0223C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_COUNT - counters register
231 // W xxxxxxxx xxxxxxxx -------- -------- (outer loop count)
232 // W -------- -------- xxxxxxxx xxxxxxxx (inner loop count)
233 // F02240-F02247 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCD - source data register
234 // F02248-F0224F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTD - destination data register
235 // F02250-F02257 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTZ - destination Z register
236 // F02258-F0225F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ1 - source Z register 1
237 // F02260-F02267 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ2 - source Z register 2
238 // F02268-F0226F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_PATD - pattern data register
239 // F02270 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_IINC - intensity increment
240 // F02274 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_ZINC - Z increment
241 // F02278 W -------- -------- -------- -----xxx B_STOP - collision control
242 // W -------- -------- -------- -----x-- (STOPEN - enable blitter collision stops)
243 // W -------- -------- -------- ------x- (ABORT - abort after stop)
244 // W -------- -------- -------- -------x (RESUME - resume after stop)
245 // F0227C W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I3 - intensity 3
246 // F02280 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I2 - intensity 2
247 // F02284 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I1 - intensity 1
248 // F02288 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I0 - intensity 0
249 // F0228C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z3 - Z3
250 // F02290 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z2 - Z2
251 // F02294 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z1 - Z1
252 // F02298 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z0 - Z0
253 // ------------------------------------------------------------
257 #include <string.h> // For memset()
258 #include <stdlib.h> // For rand()
266 //#include "memory.h"
268 #include "settings.h"
271 #define NEW_TIMER_SYSTEM
273 // TOM registers (offset from $F00000)
280 #define MODE 0x0006 // Line buffer to video generator mode
281 #define BGEN 0x0080 // Background enable (CRY & RGB16 only)
282 #define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
283 #define PWIDTH 0x0E00 // Pixel width in video clock cycles (value written + 1)
284 #define BORD1 0x2A // Border green/red values (8 BPP)
285 #define BORD2 0x2C // Border blue value (8 BPP)
286 #define HP 0x2E // Values range from 1 - 1024 (value written + 1)
289 #define HDB1 0x38 // Horizontal display begin 1
292 #define VP 0x3E // Value ranges from 1 - 2048 (value written + 1)
302 //NOTE: These arbitrary cutoffs are NOT taken into account for PAL jaguar screens. !!! FIX !!!
304 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
305 /*#define LEFT_VISIBLE_HC 208
306 #define RIGHT_VISIBLE_HC 1528//*/
307 #define LEFT_VISIBLE_HC 208
308 #define RIGHT_VISIBLE_HC 1488
309 //#define TOP_VISIBLE_VC 25
310 //#define BOTTOM_VISIBLE_VC 503
311 #define TOP_VISIBLE_VC 31
312 #define BOTTOM_VISIBLE_VC 511
314 //Are these PAL horizontals correct?
315 //They seem to be for the most part, but there are some games that seem to be
316 //shifted over to the right from this "window".
317 #define LEFT_VISIBLE_HC_PAL 208
318 #define RIGHT_VISIBLE_HC_PAL 1488
319 #define TOP_VISIBLE_VC_PAL 67
320 #define BOTTOM_VISIBLE_VC_PAL 579
322 //This can be defined in the makefile as well...
323 //(It's easier to do it here, though...)
326 uint8 tomRam8[0x4000];
327 uint32 tomWidth, tomHeight;
328 uint32 tomTimerPrescaler;
329 uint32 tomTimerDivider;
330 int32 tomTimerCounter;
331 //uint32 tom_scanline;
332 //uint32 hblankWidthInPixels = 0;
333 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
334 tom_gpu_int_pending, tom_video_int_pending;
335 //uint16 * tom_cry_rgb_mix_lut;
336 //int16 * TOMBackbuffer;
337 uint32 * TOMBackbuffer;
339 static const char * videoMode_to_str[8] =
340 { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
341 "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
343 typedef void (render_xxx_scanline_fn)(uint32 *);
345 // Private function prototypes
347 void tom_render_16bpp_cry_scanline(uint32 * backbuffer);
348 void tom_render_24bpp_scanline(uint32 * backbuffer);
349 void tom_render_16bpp_direct_scanline(uint32 * backbuffer);
350 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer);
351 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer);
353 void tom_render_16bpp_cry_stretch_scanline(uint32 * backbuffer);
354 void tom_render_24bpp_stretch_scanline(uint32 * backbuffer);
355 void tom_render_16bpp_direct_stretch_scanline(uint32 * backbuffer);
356 void tom_render_16bpp_rgb_stretch_scanline(uint32 * backbuffer);
357 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(uint32 * backbuffer);
359 render_xxx_scanline_fn * scanline_render_normal[] =
361 tom_render_16bpp_cry_scanline,
362 tom_render_24bpp_scanline,
363 tom_render_16bpp_direct_scanline,
364 tom_render_16bpp_rgb_scanline,
365 tom_render_16bpp_cry_rgb_mix_scanline,
366 tom_render_24bpp_scanline,
367 tom_render_16bpp_direct_scanline,
368 tom_render_16bpp_rgb_scanline
371 render_xxx_scanline_fn * scanline_render_stretch[] =
373 tom_render_16bpp_cry_stretch_scanline,
374 tom_render_24bpp_stretch_scanline,
375 tom_render_16bpp_direct_stretch_scanline,
376 tom_render_16bpp_rgb_stretch_scanline,
377 tom_render_16bpp_cry_rgb_mix_stretch_scanline,
378 tom_render_24bpp_stretch_scanline,
379 tom_render_16bpp_direct_stretch_scanline,
380 tom_render_16bpp_rgb_stretch_scanline,
383 render_xxx_scanline_fn * scanline_render[8];
386 // Screen info for various games [PAL]...
389 TOM: Horizontal Period written by M68K: 850 (+1*2 = 1702)
390 TOM: Horizontal Blank Begin written by M68K: 1711
391 TOM: Horizontal Blank End written by M68K: 158
392 TOM: Horizontal Display End written by M68K: 1696
393 TOM: Horizontal Display Begin 1 written by M68K: 166
394 TOM: Vertical Period written by M68K: 623 (non-interlaced)
395 TOM: Vertical Blank End written by M68K: 34
396 TOM: Vertical Display Begin written by M68K: 46
397 TOM: Vertical Display End written by M68K: 526
398 TOM: Vertical Blank Begin written by M68K: 600
399 TOM: Vertical Sync written by M68K: 618
400 TOM: Horizontal Display End written by M68K: 1665
401 TOM: Horizontal Display Begin 1 written by M68K: 203
402 TOM: Vertical Display Begin written by M68K: 38
403 TOM: Vertical Display End written by M68K: 518
404 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 151)
405 TOM: Horizontal Display End written by M68K: 1713
406 TOM: Horizontal Display Begin 1 written by M68K: 157
407 TOM: Vertical Display Begin written by M68K: 35
408 TOM: Vertical Display End written by M68K: 2047
409 Horizontal range: 157 - 1713 (width: 1557 / 4 = 389.25, / 5 = 315.4)
412 TOM: Horizontal Period written by M68K: 845 (+1*2 = 1692)
413 TOM: Horizontal Blank Begin written by M68K: 1700
414 TOM: Horizontal Blank End written by M68K: 122
415 TOM: Horizontal Display End written by M68K: 1600
416 TOM: Horizontal Display Begin 1 written by M68K: 268
417 TOM: Vertical Period written by M68K: 523 (non-interlaced)
418 TOM: Vertical Blank End written by M68K: 40
419 TOM: Vertical Display Begin written by M68K: 44
420 TOM: Vertical Display End written by M68K: 492
421 TOM: Vertical Blank Begin written by M68K: 532
422 TOM: Vertical Sync written by M68K: 513
423 TOM: Video Mode written by M68K: 04C7. PWIDTH = 3, MODE = 16 BPP RGB, flags: BGEN (VC = 461)
426 TOM: Horizontal Display End written by M68K: 1713
427 TOM: Horizontal Display Begin 1 written by M68K: 157
428 TOM: Vertical Display Begin written by M68K: 35
429 TOM: Vertical Display End written by M68K: 2047
430 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 89)
431 TOM: Horizontal Display Begin 1 written by M68K: 208
432 TOM: Horizontal Display End written by M68K: 1662
433 TOM: Vertical Display Begin written by M68K: 100
434 TOM: Vertical Display End written by M68K: 2047
435 TOM: Video Mode written by M68K: 07C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN VARMOD (VC = 205)
436 Horizontal range: 208 - 1662 (width: 1455 / 4 = 363.5)
439 TOM: Vertical Display Begin written by M68K: 96
440 TOM: Vertical Display End written by M68K: 2047
441 TOM: Horizontal Display Begin 1 written by M68K: 239
442 TOM: Horizontal Display End written by M68K: 1692
443 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 378)
444 TOM: Vertical Display Begin written by M68K: 44
445 TOM: Vertical Display End written by M68K: 2047
446 TOM: Horizontal Display Begin 1 written by M68K: 239
447 TOM: Horizontal Display End written by M68K: 1692
448 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 559)
449 TOM: Vertical Display Begin written by M68K: 84
450 TOM: Vertical Display End written by M68K: 2047
451 TOM: Horizontal Display Begin 1 written by M68K: 239
452 TOM: Horizontal Display End written by M68K: 1692
453 TOM: Vertical Display Begin written by M68K: 44
454 TOM: Vertical Display End written by M68K: 2047
455 TOM: Horizontal Display Begin 1 written by M68K: 239
456 TOM: Horizontal Display End written by M68K: 1692
457 Horizontal range: 239 - 1692 (width: 1454 / 4 = 363.5)
461 // Screen info for various games [NTSC]...
464 TOM: Horizontal Display End written by M68K: 1727
465 TOM: Horizontal Display Begin 1 written by M68K: 123
466 TOM: Vertical Display Begin written by M68K: 25
467 TOM: Vertical Display End written by M68K: 2047
468 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
469 Also does PWIDTH = 4...
470 Vertical resolution: 238 lines
473 TOM: Horizontal Display End written by M68K: 1727
474 TOM: Horizontal Display Begin 1 written by M68K: 123
475 TOM: Vertical Display Begin written by M68K: 25
476 TOM: Vertical Display End written by M68K: 2047
477 TOM: Vertical Interrupt written by M68K: 507
478 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
479 TOM: Horizontal Display Begin 1 written by M68K: 208
480 TOM: Horizontal Display End written by M68K: 1670
481 Display starts at 31, then 52!
482 Vertical resolution: 238 lines
485 TOM: Horizontal Display End written by M68K: 1727
486 TOM: Horizontal Display Begin 1 written by M68K: 123
487 TOM: Vertical Display Begin written by M68K: 25
488 TOM: Vertical Display End written by M68K: 2047
489 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
490 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
491 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
494 TOM: Vertical Interrupt written by M68K: 2047
495 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
496 TOM: Horizontal Display End written by M68K: 1727
497 TOM: Horizontal Display Begin 1 written by M68K: 123
498 TOM: Vertical Display Begin written by M68K: 25
499 TOM: Vertical Display End written by M68K: 2047
500 TOM: Vertical Interrupt written by M68K: 507
501 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
502 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
503 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
505 Vertical resolution: 238 lines
506 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
509 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
510 TOM: Horizontal Blank Begin written by M68K: 1713
511 TOM: Horizontal Blank End written by M68K: 125
512 TOM: Horizontal Display End written by M68K: 1696
513 TOM: Horizontal Display Begin 1 written by M68K: 166
514 TOM: Vertical Period written by M68K: 523 (non-interlaced)
515 TOM: Vertical Blank End written by M68K: 24
516 TOM: Vertical Display Begin written by M68K: 46
517 TOM: Vertical Display End written by M68K: 496
518 TOM: Vertical Blank Begin written by M68K: 500
519 TOM: Vertical Sync written by M68K: 517
520 TOM: Vertical Interrupt written by M68K: 497
521 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
525 TOM: Horizontal Display End written by M68K: 1727
526 TOM: Horizontal Display Begin 1 written by M68K: 123
527 TOM: Vertical Display Begin written by M68K: 25
528 TOM: Vertical Display End written by M68K: 2047
529 TOM: Vertical Interrupt written by M68K: 507
530 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
533 TOM: Horizontal Display End written by M68K: 1823
534 TOM: Horizontal Display Begin 1 written by M68K: 45
535 TOM: Vertical Display Begin written by M68K: 40
536 TOM: Vertical Display End written by M68K: 2047
537 TOM: Vertical Interrupt written by M68K: 491
538 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
539 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
540 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
541 Vertical resolution: 238 lines
544 TOM: Horizontal Display End written by M68K: 1727
545 TOM: Horizontal Display Begin 1 written by M68K: 188
546 TOM: Vertical Display Begin written by M68K: 1
547 TOM: Vertical Display End written by M68K: 2047
548 TOM: Vertical Interrupt written by M68K: 483
549 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
550 Width would be 303 with above scheme, but border width would be 13 pixels
553 Vertical resolution: 238 lines
556 uint32 RGB16ToRGB32[0x10000];
557 uint32 CRY16ToRGB32[0x10000];
558 uint32 MIX16ToRGB32[0x10000];
560 #warning "This is not endian-safe. !!! FIX !!!"
561 void TOMFillLookupTables(void)
563 for(uint32 i=0; i<0x10000; i++)
564 RGB16ToRGB32[i] = 0xFF000000
565 | ((i & 0xF100) >> 8) | ((i & 0xE000) >> 13)
566 | ((i & 0x07C0) << 13) | ((i & 0x0700) << 8)
567 | ((i & 0x003F) << 10) | ((i & 0x0030) << 4);
570 for(uint32 i=0; i<0x10000; i++)
572 uint32 chrm = (i & 0xF000) >> 12,
573 chrl = (i & 0x0F00) >> 8,
576 uint32 r = (((uint32)redcv[chrm][chrl]) * y) >> 8,
577 g = (((uint32)greencv[chrm][chrl]) * y) >> 8,
578 b = (((uint32)bluecv[chrm][chrl]) * y) >> 8;
580 CRY16ToRGB32[i] = 0xFF000000 | (b << 16) | (g << 8) | r;
581 MIX16ToRGB32[i] = (i & 0x01 ? RGB16ToRGB32[i] : CRY16ToRGB32[i]);
584 // for(uint32 i=0; i<0x10000; i++)
586 // MIX16ToRGB32[i] = RGB16ToRGB32[i];
589 void TOMSetPendingJERRYInt(void)
591 tom_jerry_int_pending = 1;
594 void TOMSetPendingTimerInt(void)
596 tom_timer_int_pending = 1;
599 void TOMSetPendingObjectInt(void)
601 tom_object_int_pending = 1;
604 void TOMSetPendingGPUInt(void)
606 tom_gpu_int_pending = 1;
609 void TOMSetPendingVideoInt(void)
611 tom_video_int_pending = 1;
614 uint8 * TOMGetRamPointer(void)
619 uint8 TOMGetVideoMode(void)
621 uint16 vmode = GET16(tomRam8, VMODE);
622 return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
625 //Used in only one place (and for debug purposes): OBJECTP.CPP
626 #warning "Used in only one place (and for debug purposes): OBJECTP.CPP !!! FIX !!!"
627 uint16 TOMGetVDB(void)
629 return GET16(tomRam8, VDB);
633 // 16 BPP CRY/RGB mixed mode rendering
635 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer)
637 //CHANGED TO 32BPP RENDERING
638 uint16 width = tomWidth;
639 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
641 //New stuff--restrict our drawing...
642 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
643 //NOTE: May have to check HDB2 as well!
644 // Get start position in HC ticks
645 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);
648 current_line_buffer += 2 * -startPos;
650 //This case doesn't properly handle the "start on the right side of virtual screen" case
651 //Dunno why--looks Ok...
652 //What *is* for sure wrong is that it doesn't copy the linebuffer's BG pixels...
653 //This should likely be 4 instead of 2 (?--not sure)
654 backbuffer += 2 * startPos, width -= startPos;
658 uint16 color = (*current_line_buffer++) << 8;
659 color |= *current_line_buffer++;
660 *backbuffer++ = MIX16ToRGB32[color];
666 // 16 BPP CRY mode rendering
668 void tom_render_16bpp_cry_scanline(uint32 * backbuffer)
670 //CHANGED TO 32BPP RENDERING
671 uint16 width = tomWidth;
672 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
674 //New stuff--restrict our drawing...
675 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
676 //NOTE: May have to check HDB2 as well!
677 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);// Get start position in HC ticks
680 current_line_buffer += 2 * -startPos;
682 //This should likely be 4 instead of 2 (?--not sure)
683 backbuffer += 2 * startPos, width -= startPos;
687 uint16 color = (*current_line_buffer++) << 8;
688 color |= *current_line_buffer++;
689 *backbuffer++ = CRY16ToRGB32[color];
695 // 24 BPP mode rendering
697 void tom_render_24bpp_scanline(uint32 * backbuffer)
699 //CHANGED TO 32BPP RENDERING
700 uint16 width = tomWidth;
701 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
703 //New stuff--restrict our drawing...
704 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
705 //NOTE: May have to check HDB2 as well!
706 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
709 current_line_buffer += 4 * -startPos;
711 //This should likely be 4 instead of 2 (?--not sure)
712 backbuffer += 2 * startPos, width -= startPos;
716 uint32 g = *current_line_buffer++;
717 uint32 r = *current_line_buffer++;
718 current_line_buffer++;
719 uint32 b = *current_line_buffer++;
720 *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
725 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
726 //extra hardware outside of the Jaguar console to support this!
728 // 16 BPP direct mode rendering
730 void tom_render_16bpp_direct_scanline(uint32 * backbuffer)
732 uint16 width = tomWidth;
733 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
737 uint16 color = (*current_line_buffer++) << 8;
738 color |= *current_line_buffer++;
739 *backbuffer++ = color >> 1;
745 // 16 BPP RGB mode rendering
747 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer)
749 //CHANGED TO 32BPP RENDERING
750 // 16 BPP RGB: 0-5 green, 6-10 blue, 11-15 red
752 uint16 width = tomWidth;
753 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
755 //New stuff--restrict our drawing...
756 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
757 //NOTE: May have to check HDB2 as well!
758 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
762 current_line_buffer += 2 * -startPos;
764 //This should likely be 4 instead of 2 (?--not sure)
765 backbuffer += 2 * startPos, width -= startPos;
769 uint32 color = (*current_line_buffer++) << 8;
770 color |= *current_line_buffer++;
771 *backbuffer++ = RGB16ToRGB32[color];
776 /////////////////////////////////////////////////////////////////////
777 // This stuff may just go away by itself, especially if we do some //
778 // good old OpenGL goodness... //
779 /////////////////////////////////////////////////////////////////////
781 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(uint32 *backbuffer)
783 uint16 width=tomWidth;
784 uint8 *current_line_buffer=(uint8*)&tomRam8[0x1800];
788 uint16 color = *current_line_buffer++;
790 color |= *current_line_buffer++;
791 *backbuffer++ = MIX16ToRGB32[color];
792 current_line_buffer += 2;
797 void tom_render_16bpp_cry_stretch_scanline(uint32 *backbuffer)
799 uint32 chrm, chrl, y;
801 uint16 width=tomWidth;
802 uint8 *current_line_buffer=(uint8*)&tomRam8[0x1800];
807 color=*current_line_buffer++;
809 color|=*current_line_buffer++;
811 chrm = (color & 0xF000) >> 12;
812 chrl = (color & 0x0F00) >> 8;
813 y = (color & 0x00FF);
815 uint16 red = ((((uint32)redcv[chrm][chrl])*y)>>11);
816 uint16 green = ((((uint32)greencv[chrm][chrl])*y)>>11);
817 uint16 blue = ((((uint32)bluecv[chrm][chrl])*y)>>11);
820 color2=*current_line_buffer++;
822 color2|=*current_line_buffer++;
824 chrm = (color2 & 0xF000) >> 12;
825 chrl = (color2 & 0x0F00) >> 8;
826 y = (color2 & 0x00FF);
828 uint16 red2 = ((((uint32)redcv[chrm][chrl])*y)>>11);
829 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
830 uint16 blue2 = ((((uint32)bluecv[chrm][chrl])*y)>>11);
833 green=(green+green2)>>1;
834 blue=(blue+blue2)>>1;
836 *backbuffer++=(red<<10)|(green<<5)|blue;
841 void tom_render_24bpp_stretch_scanline(uint32 *backbuffer)
843 uint16 width=tomWidth;
844 uint8 *current_line_buffer=(uint8*)&tomRam8[0x1800];
848 uint16 green=*current_line_buffer++;
849 uint16 red=*current_line_buffer++;
850 /*uint16 nc=*/current_line_buffer++;
851 uint16 blue=*current_line_buffer++;
855 *backbuffer++=(red<<10)|(green<<5)|blue;
856 current_line_buffer+=4;
861 void tom_render_16bpp_direct_stretch_scanline(uint32 *backbuffer)
863 uint16 width=tomWidth;
864 uint8 *current_line_buffer=(uint8*)&tomRam8[0x1800];
868 uint16 color=*current_line_buffer++;
870 color|=*current_line_buffer++;
873 current_line_buffer+=2;
878 void tom_render_16bpp_rgb_stretch_scanline(uint32 *backbuffer)
880 uint16 width=tomWidth;
881 uint8 *current_line_buffer=(uint8*)&tomRam8[0x1800];
885 uint16 color1=*current_line_buffer++;
887 color1|=*current_line_buffer++;
889 uint16 color2=*current_line_buffer++;
891 color2|=*current_line_buffer++;
893 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
894 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
895 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
897 color1=(red<<10)|(blue<<5)|green;
898 *backbuffer++=color1;
903 void TOMResetBackbuffer(uint32 * backbuffer)
905 TOMBackbuffer = backbuffer;
909 // Process a single scanline
911 void TOMExecScanline(uint16 scanline, bool render)
913 bool inActiveDisplayArea = true;
915 //Interlacing is still not handled correctly here... !!! FIX !!!
916 if (scanline & 0x01) // Execute OP only on even lines (non-interlaced only!)
919 if (scanline >= (uint16)GET16(tomRam8, VDB) && scanline < (uint16)GET16(tomRam8, VDE))
923 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
924 uint8 bgHI = tomRam8[BG], bgLO = tomRam8[BG + 1];
926 // Clear line buffer with BG
927 if (GET16(tomRam8, VMODE) & BGEN) // && (CRY or RGB16)...
928 for(uint32 i=0; i<720; i++)
929 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
931 OPProcessList(scanline, render);
935 inActiveDisplayArea = false;
937 // Try to take PAL into account...
939 uint16 topVisible = (vjs.hardwareTypeNTSC ? TOP_VISIBLE_VC : TOP_VISIBLE_VC_PAL),
940 bottomVisible = (vjs.hardwareTypeNTSC ? BOTTOM_VISIBLE_VC : BOTTOM_VISIBLE_VC_PAL);
942 // Here's our virtualized scanline code...
944 if (scanline >= topVisible && scanline < bottomVisible)
946 if (inActiveDisplayArea)
948 //NOTE: The following doesn't put BORDER color on the sides... !!! FIX !!!
949 #warning "The following doesn't put BORDER color on the sides... !!! FIX !!!"
950 if (vjs.renderType == RT_NORMAL)
951 scanline_render[TOMGetVideoMode()](TOMBackbuffer);
955 tom_render_16bpp_cry_scanline,
956 tom_render_24bpp_scanline,
957 tom_render_16bpp_direct_scanline,
958 tom_render_16bpp_rgb_scanline,
959 tom_render_16bpp_cry_rgb_mix_scanline,
960 tom_render_24bpp_scanline,
961 tom_render_16bpp_direct_scanline,
962 tom_render_16bpp_rgb_scanline
964 #define MODE 0x0006 // Line buffer to video generator mode
965 #define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
967 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
968 uint8 mode = ((GET16(tomRam8, VMODE) & MODE) >> 1);
969 bool varmod = GET16(tomRam8, VMODE) & VARMOD;
970 //The video texture line buffer ranges from 0 to 1279, with its left edge starting at
971 //LEFT_VISIBLE_HC. So, we need to start writing into the backbuffer at HDB1, using pwidth
972 //as our scaling factor. The way it generates its image on a real TV!
974 //So, for example, if HDB1 is less than LEFT_VISIBLE_HC, then we have to figure out where
975 //in the VTLB that we start writing pixels from the Jaguar line buffer (VTLB start=0,
979 // 24 BPP mode rendering
981 void tom_render_24bpp_scanline(uint32 * backbuffer)
983 //CHANGED TO 32BPP RENDERING
984 uint16 width = tomWidth;
985 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
987 //New stuff--restrict our drawing...
988 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
989 //NOTE: May have to check HDB2 as well!
990 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
993 current_line_buffer += 4 * -startPos;
995 //This should likely be 4 instead of 2 (?--not sure)
996 backbuffer += 2 * startPos, width -= startPos;
1000 uint32 g = *current_line_buffer++;
1001 uint32 r = *current_line_buffer++;
1002 current_line_buffer++;
1003 uint32 b = *current_line_buffer++;
1004 *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
1014 // If outside of VDB & VDE, then display the border color
1015 uint32 * currentLineBuffer = TOMBackbuffer;
1016 uint8 g = tomRam8[BORD1], r = tomRam8[BORD1 + 1], b = tomRam8[BORD2 + 1];
1017 uint32 pixel = 0xFF000000 | (b << 16) | (g << 8) | r;
1019 for(uint32 i=0; i<tomWidth; i++)
1020 *currentLineBuffer++ = pixel;
1023 TOMBackbuffer += GetSDLScreenWidthInPixels();
1028 // TOM initialization
1035 // Setup the non-stretchy scanline rendering...
1036 memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1037 TOMFillLookupTables();
1044 WriteLog("TOM: Resolution %i x %i %s\n", TOMGetVideoModeWidth(), TOMGetVideoModeHeight(),
1045 videoMode_to_str[TOMGetVideoMode()]);
1046 // WriteLog("\ntom: object processor:\n");
1047 // WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
1048 // WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
1051 // memory_free(tomRam8);
1052 // memory_free(tom_cry_rgb_mix_lut);
1055 /*uint32 tom_getHBlankWidthInPixels(void)
1057 return hblankWidthInPixels;
1060 uint32 TOMGetVideoModeWidth(void)
1062 //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
1063 // uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
1064 //Temporary, for testing Doom...
1065 // uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
1067 // Note that the following PWIDTH values have the following pixel aspect ratios:
1068 // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
1069 // PWIDTH = 2 -> 0.50:1 (1:2) pixels
1070 // PWIDTH = 3 -> 0.75:1 (3:4) pixels
1071 // PWIDTH = 4 -> 1.00:1 (1:1) pixels
1072 // PWIDTH = 5 -> 1.25:1 (5:4) pixels
1073 // PWIDTH = 6 -> 1.50:1 (3:2) pixels
1074 // PWIDTH = 7 -> 1.75:1 (7:4) pixels
1075 // PWIDTH = 8 -> 2.00:1 (2:1) pixels
1077 // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
1078 // this implies that the other modes have pixels that are *not* square!
1079 // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
1081 // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
1082 // so we don't bother to add one...
1083 // return width[(GET16(tomRam8, VMODE) & PWIDTH) >> 9];
1085 // Now, we just calculate it...
1086 /* uint16 hdb1 = GET16(tomRam8, HDB1), hde = GET16(tomRam8, HDE),
1087 hbb = GET16(tomRam8, HBB), pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
1088 // return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
1089 //Temporary, for testing Doom...
1090 return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
1092 // To make it easier to make a quasi-fixed display size, we restrict the viewing
1093 // area to an arbitrary range of the Horizontal Count.
1094 uint16 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
1095 return (vjs.hardwareTypeNTSC ? RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC : RIGHT_VISIBLE_HC_PAL - LEFT_VISIBLE_HC_PAL) / pwidth;
1096 //Temporary, for testing Doom...
1097 // return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
1098 //// return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
1100 // More speculating...
1101 // According to the JTRM, the number of potential pixels across is given by the
1102 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
1103 // zero to this value twice per scanline (the high bit is set on the second count).
1104 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
1105 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
1106 // HDB1, it starts fetching the line from position 0 in LBUF.
1108 // The trick, it would seem, is to figure out how long the typical visible scanline
1109 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
1110 // course). Using that length, we can establish an "absolute left display limit" with
1111 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
1112 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
1113 // backbuffer + 5 pixels).
1115 // That's basically what we're doing now...!
1118 // *** SPECULATION ***
1119 // It might work better to virtualize the height settings, i.e., set the vertical
1120 // height at 240 lines and clip using the VDB and VDE/VP registers...
1121 // Same with the width... [Width is pretty much virtualized now.]
1123 // Now that that the width is virtualized, let's virtualize the height. :-)
1124 uint32 TOMGetVideoModeHeight(void)
1126 // uint16 vmode = GET16(tomRam8, VMODE);
1127 // uint16 vbe = GET16(tomRam8, VBE);
1128 // uint16 vbb = GET16(tomRam8, VBB);
1129 // uint16 vdb = GET16(tomRam8, VDB);
1130 // uint16 vde = GET16(tomRam8, VDE);
1131 // uint16 vp = GET16(tomRam8, VP);
1133 /* if (vde == 0xFFFF)
1136 // return 227;//WAS:(vde/*-vdb*/) >> 1;
1137 // The video mode height probably works this way:
1138 // VC counts from 0 to VP. VDB starts the OP. Either when
1139 // VDE is reached or VP, the OP is stopped. Let's try it...
1140 // Also note that we're conveniently ignoring interlaced display modes...!
1141 // return ((vde > vp ? vp : vde) - vdb) >> 1;
1142 // return ((vde > vbb ? vbb : vde) - vdb) >> 1;
1143 //Let's try from the Vertical Blank interval...
1145 // return (vbb - vbe) >> 1; // Again, doesn't take interlacing into account...
1146 // This of course doesn't take interlacing into account. But I haven't seen any
1147 // Jaguar software that takes advantage of it either...
1148 //Also, doesn't reflect PAL Jaguar either... !!! FIX !!! [DONE]
1149 // return 240; // Set virtual screen height to 240 lines...
1150 return (vjs.hardwareTypeNTSC ? 240 : 256);
1155 // Now PAL friendly!
1161 memset(tomRam8, 0x00, 0x4000);
1163 if (vjs.hardwareTypeNTSC)
1165 SET16(tomRam8, MEMCON1, 0x1861);
1166 SET16(tomRam8, MEMCON2, 0x35CC);
1167 SET16(tomRam8, HP, 844); // Horizontal Period (1-based; HP=845)
1168 SET16(tomRam8, HBB, 1713); // Horizontal Blank Begin
1169 SET16(tomRam8, HBE, 125); // Horizontal Blank End
1170 SET16(tomRam8, HDE, 1665); // Horizontal Display End
1171 SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
1172 SET16(tomRam8, VP, 523); // Vertical Period (1-based; in this case VP = 524)
1173 SET16(tomRam8, VBE, 24); // Vertical Blank End
1174 SET16(tomRam8, VDB, 38); // Vertical Display Begin
1175 SET16(tomRam8, VDE, 518); // Vertical Display End
1176 SET16(tomRam8, VBB, 500); // Vertical Blank Begin
1177 SET16(tomRam8, VS, 517); // Vertical Sync
1178 SET16(tomRam8, VMODE, 0x06C1);
1182 SET16(tomRam8, MEMCON1, 0x1861);
1183 SET16(tomRam8, MEMCON2, 0x35CC);
1184 SET16(tomRam8, HP, 850); // Horizontal Period
1185 SET16(tomRam8, HBB, 1711); // Horizontal Blank Begin
1186 SET16(tomRam8, HBE, 158); // Horizontal Blank End
1187 SET16(tomRam8, HDE, 1665); // Horizontal Display End
1188 SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
1189 SET16(tomRam8, VP, 623); // Vertical Period (1-based; in this case VP = 624)
1190 SET16(tomRam8, VBE, 34); // Vertical Blank End
1191 SET16(tomRam8, VDB, 38); // Vertical Display Begin
1192 SET16(tomRam8, VDE, 518); // Vertical Display End
1193 SET16(tomRam8, VBB, 600); // Vertical Blank Begin
1194 SET16(tomRam8, VS, 618); // Vertical Sync
1195 SET16(tomRam8, VMODE, 0x06C1);
1201 tom_jerry_int_pending = 0;
1202 tom_timer_int_pending = 0;
1203 tom_object_int_pending = 0;
1204 tom_gpu_int_pending = 0;
1205 tom_video_int_pending = 0;
1207 tomTimerPrescaler = 0; // TOM PIT is disabled
1208 tomTimerDivider = 0;
1209 tomTimerCounter = 0;
1210 memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
1214 // TOM byte access (read)
1216 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
1218 //???Is this needed???
1219 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1220 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1221 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1222 // offset &= 0xFF3FFF;
1225 WriteLog("TOM: Reading byte at %06X\n", offset);
1228 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1229 return GPUReadByte(offset, who);
1230 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1231 return GPUReadByte(offset, who);
1232 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1233 return OPReadByte(offset, who);*/
1234 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1235 return BlitterReadByte(offset, who);
1236 else if (offset == 0xF00050)
1237 return tomTimerPrescaler >> 8;
1238 else if (offset == 0xF00051)
1239 return tomTimerPrescaler & 0xFF;
1240 else if (offset == 0xF00052)
1241 return tomTimerDivider >> 8;
1242 else if (offset == 0xF00053)
1243 return tomTimerDivider & 0xFF;
1245 return tomRam8[offset & 0x3FFF];
1249 // TOM word access (read)
1251 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1253 //???Is this needed???
1254 // offset &= 0xFF3FFF;
1256 WriteLog("TOM: Reading word at %06X\n", offset);
1258 if (offset >= 0xF02000 && offset <= 0xF020FF)
1259 WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1261 if (offset == 0xF000E0)
1263 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1264 | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1265 | (tom_video_int_pending << 0);
1266 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1269 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1270 /* else if (offset == 0xF00006) // VC
1271 // What if we're in interlaced mode?
1272 // According to docs, in non-interlace mode VC is ALWAYS even...
1273 // return (tom_scanline << 1);// + 1;
1274 //But it's causing Rayman to be fucked up... Why???
1275 //Because VC is even in NI mode when calling the OP! That's why!
1276 return (tom_scanline << 1) + 1;//*/
1278 // F00004 R/W -----xxx xxxxxxxx HC - horizontal count
1279 // -----x-- -------- (which half of the display)
1280 // ------xx xxxxxxxx (10-bit counter)
1282 // This is a kludge to get the HC working somewhat... What we really should do here
1283 // is check what the global time is at the time of the read and calculate the correct HC...
1285 else if (offset == 0xF00004)
1286 return rand() & 0x03FF;
1287 else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE + 0x20))
1288 return GPUReadWord(offset, who);
1289 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
1290 return GPUReadWord(offset, who);
1291 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1292 return OPReadWord(offset, who);*/
1293 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1294 return BlitterReadWord(offset, who);
1295 else if (offset == 0xF00050)
1296 return tomTimerPrescaler;
1297 else if (offset == 0xF00052)
1298 return tomTimerDivider;
1301 return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1305 // TOM byte access (write)
1307 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1309 //???Is this needed???
1310 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1314 WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1317 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1319 GPUWriteByte(offset, data, who);
1322 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1324 GPUWriteByte(offset, data, who);
1327 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1329 OPWriteByte(offset, data, who);
1332 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1334 BlitterWriteByte(offset, data, who);
1337 else if (offset == 0xF00050)
1339 tomTimerPrescaler = (tomTimerPrescaler & 0x00FF) | (data << 8);
1343 else if (offset == 0xF00051)
1345 tomTimerPrescaler = (tomTimerPrescaler & 0xFF00) | data;
1349 else if (offset == 0xF00052)
1351 tomTimerDivider = (tomTimerDivider & 0x00FF) | (data << 8);
1355 else if (offset == 0xF00053)
1357 tomTimerDivider = (tomTimerDivider & 0xFF00) | data;
1361 else if (offset >= 0xF00400 && offset <= 0xF007FF) // CLUT (A & B)
1363 // Writing to one CLUT writes to the other
1364 offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
1365 tomRam8[offset] = data, tomRam8[offset + 0x200] = data;
1368 tomRam8[offset & 0x3FFF] = data;
1372 // TOM word access (write)
1374 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1376 //???Is this needed???
1380 WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1382 if (offset == 0xF00000 + MEMCON1)
1383 WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1384 if (offset == 0xF00000 + MEMCON2)
1385 WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1386 if (offset >= 0xF02000 && offset <= 0xF020FF)
1387 WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1389 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1391 GPUWriteWord(offset, data, who);
1394 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1396 GPUWriteWord(offset, data, who);
1399 //What's so special about this?
1400 /* else if ((offset >= 0xF00000) && (offset < 0xF00002))
1402 TOMWriteByte(offset, data >> 8);
1403 TOMWriteByte(offset+1, data & 0xFF);
1405 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1407 OPWriteWord(offset, data, who);
1410 else if (offset == 0xF00050)
1412 tomTimerPrescaler = data;
1416 else if (offset == 0xF00052)
1418 tomTimerDivider = data;
1422 else if (offset == 0xF000E0)
1426 tom_video_int_pending = 0;
1428 tom_gpu_int_pending = 0;
1430 tom_object_int_pending = 0;
1432 tom_timer_int_pending = 0;
1434 tom_jerry_int_pending = 0;
1436 else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1438 BlitterWriteWord(offset, data, who);
1441 else if (offset >= 0xF00400 && offset <= 0xF007FE) // CLUT (A & B)
1443 // Writing to one CLUT writes to the other
1444 offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
1445 // Watch out for unaligned writes here! (Not fixed yet)
1446 SET16(tomRam8, offset, data);
1447 SET16(tomRam8, offset + 0x200, data);
1451 if (offset == 0x28) // VMODE (Why? Why not OBF?)
1452 //Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!
1453 #warning "Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!"
1454 objectp_running = 1;
1456 if (offset >= 0x30 && offset <= 0x4E)
1457 data &= 0x07FF; // These are (mostly) 11-bit registers
1458 if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1459 data &= 0x03FF; // These are all 10-bit registers
1461 TOMWriteByte(offset, data >> 8, who);
1462 TOMWriteByte(offset+1, data & 0xFF, who);
1465 WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1467 WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1469 WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1471 WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1473 WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1475 WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1477 WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1479 WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1481 WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1483 WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1485 WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1487 WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1488 if (offset == VMODE)
1489 WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tomRam8, VC));
1491 // detect screen resolution changes
1492 //This may go away in the future, if we do the virtualized screen thing...
1493 //This may go away soon!
1494 if ((offset >= 0x28) && (offset <= 0x4F))
1496 uint32 width = TOMGetVideoModeWidth(), height = TOMGetVideoModeHeight();
1498 if ((width != tomWidth) || (height != tomHeight))
1500 tomWidth = width, tomHeight = height;
1502 if (vjs.renderType == RT_NORMAL)
1503 ResizeScreen(tomWidth, tomHeight);
1508 int TOMIRQEnabled(int irq)
1510 // This is the correct byte in big endian... D'oh!
1511 // return jaguar_byte_read(0xF000E1) & (1 << irq);
1512 return tomRam8[INT1 + 1/*0xE1*/] & (1 << irq);
1516 /*void tom_set_irq_latch(int irq, int enabled)
1518 tomRam8[0xE0] = (tomRam8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1522 /*uint16 tom_irq_control_reg(void)
1524 return (tomRam8[0xE0] << 8) | tomRam8[0xE1];
1528 // TOM Programmable Interrupt Timer handler
1529 // NOTE: TOM's PIT is only enabled if the prescaler is != 0
1530 // The PIT only generates an interrupt when it counts down to zero, not when loaded!
1532 void TOMPITCallback(void);
1534 void TOMResetPIT(void)
1536 #ifndef NEW_TIMER_SYSTEM
1537 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!! [DONE]
1538 //Also, why +1??? 'Cause that's what it says in the JTRM...!
1539 //There is a small problem with this approach: If both the prescaler and the divider are equal
1540 //to $FFFF then the counter won't be large enough to handle it. !!! FIX !!!
1541 if (tom_timer_prescaler)
1542 tom_timer_counter += (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1543 // WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1545 // Need to remove previous timer from the queue, if it exists...
1546 RemoveCallback(TOMPITCallback);
1548 if (tomTimerPrescaler)
1550 double usecs = (float)(tomTimerPrescaler + 1) * (float)(tomTimerDivider + 1) * RISC_CYCLE_IN_USEC;
1551 SetCallbackTime(TOMPITCallback, usecs);
1557 // TOM Programmable Interrupt Timer handler
1558 // NOTE: TOM's PIT is only enabled if the prescaler is != 0
1560 //NOTE: This is only used by the old execution code... Safe to remove
1561 // once the timer system is stable.
1562 void TOMExecPIT(uint32 cycles)
1564 if (tomTimerPrescaler)
1566 tomTimerCounter -= cycles;
1568 if (tomTimerCounter <= 0)
1570 TOMSetPendingTimerInt();
1571 GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // GPUSetIRQLine does the 'IRQ enabled' checking
1573 if (TOMIRQEnabled(IRQ_TIMER))
1574 m68k_set_irq(7); // Cause a 68000 NMI...
1582 void TOMPITCallback(void)
1584 // INT1_RREG |= 0x08; // Set TOM PIT interrupt pending
1585 TOMSetPendingTimerInt();
1586 GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // It does the 'IRQ enabled' checking
1588 // if (INT1_WREG & 0x08)
1589 if (TOMIRQEnabled(IRQ_TIMER))
1590 m68k_set_irq(7); // Generate 68K NMI