4 // Originally by David Raingeard (cal2)
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Cleanups and endian wrongness amelioration by James L. Hammons
7 // (C) 2010 Underground Software
9 // JLH = James L. Hammons <jlhamm@acm.org>
12 // --- ---------- -------------------------------------------------------------
13 // JLH 01/16/2010 Created this log ;-)
14 // JLH 01/20/2011 Change rendering to RGBA, removed unnecessary code
16 // Note: Endian wrongness probably stems from the MAME origins of this emu and
17 // the braindead way in which MAME used to handle memory. :-}
19 // Note: TOM has only a 16K memory space
21 // ------------------------------------------------------------
22 // TOM REGISTERS (Mapped by Aaron Giles)
23 // ------------------------------------------------------------
24 // F00000-F0FFFF R/W xxxxxxxx xxxxxxxx Internal Registers
25 // F00000 R/W -x-xx--- xxxxxxxx MEMCON1 - memory config reg 1
26 // -x------ -------- (CPU32 - is the CPU 32bits?)
27 // ---xx--- -------- (IOSPEED - external I/O clock cycles)
28 // -------- x------- (FASTROM - reduces ROM clock cycles)
29 // -------- -xx----- (DRAMSPEED - sets RAM clock cycles)
30 // -------- ---xx--- (ROMSPEED - sets ROM clock cycles)
31 // -------- -----xx- (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
32 // -------- -------x (ROMHI - controls ROM mapping)
33 // F00002 R/W --xxxxxx xxxxxxxx MEMCON2 - memory config reg 2
34 // --x----- -------- (HILO - image display bit order)
35 // ---x---- -------- (BIGEND - big endian addressing?)
36 // ----xxxx -------- (REFRATE - DRAM refresh rate)
37 // -------- xx------ (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
38 // -------- --xx---- (COLS1 - DRAM1 columns: 256,512,1024,2048)
39 // -------- ----xx-- (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
40 // -------- ------xx (COLS0 - DRAM0 columns: 256,512,1024,2048)
41 // F00004 R/W -----xxx xxxxxxxx HC - horizontal count
42 // -----x-- -------- (which half of the display)
43 // ------xx xxxxxxxx (10-bit counter)
44 // F00006 R/W ----xxxx xxxxxxxx VC - vertical count
45 // ----x--- -------- (which field is being generated)
46 // -----xxx xxxxxxxx (11-bit counter)
47 // F00008 R -----xxx xxxxxxxx LPH - light pen horizontal position
48 // F0000A R -----xxx xxxxxxxx LPV - light pen vertical position
49 // F00010-F00017 R xxxxxxxx xxxxxxxx OB - current object code from the graphics processor
50 // F00020-F00023 W xxxxxxxx xxxxxxxx OLP - start of the object list
51 // F00026 W -------- -------x OBF - object processor flag
52 // F00028 W ----xxxx xxxxxxxx VMODE - video mode
53 // W ----xxx- -------- (PWIDTH1-8 - width of pixel in video clock cycles)
54 // W -------x -------- (VARMOD - enable variable color resolution)
55 // W -------- x------- (BGEN - clear line buffer to BG color)
56 // W -------- -x------ (CSYNC - enable composite sync on VSYNC)
57 // W -------- --x----- (BINC - local border color if INCEN)
58 // W -------- ---x---- (INCEN - encrustation enable)
59 // W -------- ----x--- (GENLOCK - enable genlock)
60 // W -------- -----xx- (MODE - CRY16,RGB24,DIRECT16,RGB16)
61 // W -------- -------x (VIDEN - enables video)
62 // F0002A W xxxxxxxx xxxxxxxx BORD1 - border color (red/green)
63 // F0002C W -------- xxxxxxxx BORD2 - border color (blue)
64 // F0002E W ------xx xxxxxxxx HP - horizontal period
65 // F00030 W -----xxx xxxxxxxx HBB - horizontal blanking begin
66 // F00032 W -----xxx xxxxxxxx HBE - horizontal blanking end
67 // F00034 W -----xxx xxxxxxxx HSYNC - horizontal sync
68 // F00036 W ------xx xxxxxxxx HVS - horizontal vertical sync
69 // F00038 W -----xxx xxxxxxxx HDB1 - horizontal display begin 1
70 // F0003A W -----xxx xxxxxxxx HDB2 - horizontal display begin 2
71 // F0003C W -----xxx xxxxxxxx HDE - horizontal display end
72 // F0003E W -----xxx xxxxxxxx VP - vertical period
73 // F00040 W -----xxx xxxxxxxx VBB - vertical blanking begin
74 // F00042 W -----xxx xxxxxxxx VBE - vertical blanking end
75 // F00044 W -----xxx xxxxxxxx VS - vertical sync
76 // F00046 W -----xxx xxxxxxxx VDB - vertical display begin
77 // F00048 W -----xxx xxxxxxxx VDE - vertical display end
78 // F0004A W -----xxx xxxxxxxx VEB - vertical equalization begin
79 // F0004C W -----xxx xxxxxxxx VEE - vertical equalization end
80 // F0004E W -----xxx xxxxxxxx VI - vertical interrupt
81 // F00050 W xxxxxxxx xxxxxxxx PIT0 - programmable interrupt timer 0
82 // F00052 W xxxxxxxx xxxxxxxx PIT1 - programmable interrupt timer 1
83 // F00054 W ------xx xxxxxxxx HEQ - horizontal equalization end
84 // F00058 W xxxxxxxx xxxxxxxx BG - background color
85 // F000E0 R/W ---xxxxx ---xxxxx INT1 - CPU interrupt control register
86 // ---x---- -------- (C_JERCLR - clear pending Jerry ints)
87 // ----x--- -------- (C_PITCLR - clear pending PIT ints)
88 // -----x-- -------- (C_OPCLR - clear pending object processor ints)
89 // ------x- -------- (C_GPUCLR - clear pending graphics processor ints)
90 // -------x -------- (C_VIDCLR - clear pending video timebase ints)
91 // -------- ---x---- (C_JERENA - enable Jerry ints)
92 // -------- ----x--- (C_PITENA - enable PIT ints)
93 // -------- -----x-- (C_OPENA - enable object processor ints)
94 // -------- ------x- (C_GPUENA - enable graphics processor ints)
95 // -------- -------x (C_VIDENA - enable video timebase ints)
96 // F000E2 W -------- -------- INT2 - CPU interrupt resume register
97 // F00400-F005FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table A
98 // F00600-F007FF R/W xxxxxxxx xxxxxxxx CLUT - color lookup table B
99 // F00800-F00D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer A
100 // F01000-F0159F R/W xxxxxxxx xxxxxxxx LBUF - line buffer B
101 // F01800-F01D9F R/W xxxxxxxx xxxxxxxx LBUF - line buffer currently selected
102 // ------------------------------------------------------------
103 // F02000-F021FF R/W xxxxxxxx xxxxxxxx GPU control registers
104 // F02100 R/W xxxxxxxx xxxxxxxx G_FLAGS - GPU flags register
105 // R/W x------- -------- (DMAEN - DMA enable)
106 // R/W -x------ -------- (REGPAGE - register page)
107 // W --x----- -------- (G_BLITCLR - clear blitter interrupt)
108 // W ---x---- -------- (G_OPCLR - clear object processor int)
109 // W ----x--- -------- (G_PITCLR - clear PIT interrupt)
110 // W -----x-- -------- (G_JERCLR - clear Jerry interrupt)
111 // W ------x- -------- (G_CPUCLR - clear CPU interrupt)
112 // R/W -------x -------- (G_BLITENA - enable blitter interrupt)
113 // R/W -------- x------- (G_OPENA - enable object processor int)
114 // R/W -------- -x------ (G_PITENA - enable PIT interrupt)
115 // R/W -------- --x----- (G_JERENA - enable Jerry interrupt)
116 // R/W -------- ---x---- (G_CPUENA - enable CPU interrupt)
117 // R/W -------- ----x--- (IMASK - interrupt mask)
118 // R/W -------- -----x-- (NEGA_FLAG - ALU negative)
119 // R/W -------- ------x- (CARRY_FLAG - ALU carry)
120 // R/W -------- -------x (ZERO_FLAG - ALU zero)
121 // F02104 W -------- ----xxxx G_MTXC - matrix control register
122 // W -------- ----x--- (MATCOL - column/row major)
123 // W -------- -----xxx (MATRIX3-15 - matrix width)
124 // F02108 W ----xxxx xxxxxx-- G_MTXA - matrix address register
125 // F0210C W -------- -----xxx G_END - data organization register
126 // W -------- -----x-- (BIG_INST - big endian instruction fetch)
127 // W -------- ------x- (BIG_PIX - big endian pixels)
128 // W -------- -------x (BIG_IO - big endian I/O)
129 // F02110 R/W xxxxxxxx xxxxxxxx G_PC - GPU program counter
130 // F02114 R/W xxxxxxxx xx-xxxxx G_CTRL - GPU control/status register
131 // R xxxx---- -------- (VERSION - GPU version code)
132 // R/W ----x--- -------- (BUS_HOG - hog the bus!)
133 // R/W -----x-- -------- (G_BLITLAT - blitter interrupt latch)
134 // R/W ------x- -------- (G_OPLAT - object processor int latch)
135 // R/W -------x -------- (G_PITLAT - PIT interrupt latch)
136 // R/W -------- x------- (G_JERLAT - Jerry interrupt latch)
137 // R/W -------- -x------ (G_CPULAT - CPU interrupt latch)
138 // R/W -------- ---x---- (SINGLE_GO - single step one instruction)
139 // R/W -------- ----x--- (SINGLE_STEP - single step mode)
140 // R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
141 // R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
142 // R/W -------- -------x (GPUGO - enable GPU execution)
143 // F02118-F0211B R/W xxxxxxxx xxxxxxxx G_HIDATA - high data register
144 // F0211C-F0211F R xxxxxxxx xxxxxxxx G_REMAIN - divide unit remainder
145 // F0211C W -------- -------x G_DIVCTRL - divide unit control
146 // W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
147 // ------------------------------------------------------------
149 // ------------------------------------------------------------
150 // F02200-F022FF R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx Blitter registers
151 // F02200 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_BASE - A1 base register
152 // F02204 W -------- ---xxxxx -xxxxxxx xxxxx-xx A1_FLAGS - A1 flags register
153 // W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
154 // W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
155 // W -------- -----x-- -------- -------- (Y add control)
156 // W -------- ------xx -------- -------- (X add control)
157 // W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
158 // W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
159 // W -------- -------- -------- --xxx--- (PIXEL - pixel size)
160 // W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
161 // F02208 W -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx A1_CLIP - A1 clipping size
162 // W -xxxxxxx xxxxxxxx -------- -------- (height)
163 // W -------- -------- -xxxxxxx xxxxxxxx (width)
164 // F0220C R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_PIXEL - A1 pixel pointer
165 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
166 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
167 // F02210 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_STEP - A1 step value
168 // W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
169 // W -------- -------- xxxxxxxx xxxxxxxx (X step value)
170 // F02214 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FSTEP - A1 step fraction value
171 // W xxxxxxxx xxxxxxxx -------- -------- (Y step fraction value)
172 // W -------- -------- xxxxxxxx xxxxxxxx (X step fraction value)
173 // F02218 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FPIXEL - A1 pixel pointer fraction
174 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel fraction value)
175 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel fraction value)
176 // F0221C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_INC - A1 increment
177 // W xxxxxxxx xxxxxxxx -------- -------- (Y increment)
178 // W -------- -------- xxxxxxxx xxxxxxxx (X increment)
179 // F02220 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A1_FINC - A1 increment fraction
180 // W xxxxxxxx xxxxxxxx -------- -------- (Y increment fraction)
181 // W -------- -------- xxxxxxxx xxxxxxxx (X increment fraction)
182 // F02224 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_BASE - A2 base register
183 // F02228 W -------- ---xxxxx -xxxxxxx xxxxx-xx A2_FLAGS - A2 flags register
184 // W -------- ---x---- -------- -------- (YSIGNSUB - invert sign of Y delta)
185 // W -------- ----x--- -------- -------- (XSIGNSUB - invert sign of X delta)
186 // W -------- -----x-- -------- -------- (Y add control)
187 // W -------- ------xx -------- -------- (X add control)
188 // W -------- -------- -xxxxxx- -------- (width in 6-bit floating point)
189 // W -------- -------- -------x xx------ (ZOFFS1-6 - Z data offset)
190 // W -------- -------- -------- --xxx--- (PIXEL - pixel size)
191 // W -------- -------- -------- ------xx (PITCH1-4 - data phrase pitch)
192 // F0222C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_MASK - A2 window mask
193 // F02230 R/W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_PIXEL - A2 pixel pointer
194 // R/W xxxxxxxx xxxxxxxx -------- -------- (Y pixel value)
195 // R/W -------- -------- xxxxxxxx xxxxxxxx (X pixel value)
196 // F02234 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx A2_STEP - A2 step value
197 // W xxxxxxxx xxxxxxxx -------- -------- (Y step value)
198 // W -------- -------- xxxxxxxx xxxxxxxx (X step value)
199 // F02238 W -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - command register
200 // W -x------ -------- -------- -------- (SRCSHADE - modify source intensity)
201 // W --x----- -------- -------- -------- (BUSHI - hi priority bus)
202 // W ---x---- -------- -------- -------- (BKGWREN - writeback destination)
203 // W ----x--- -------- -------- -------- (DCOMPEN - write inhibit from data comparator)
204 // W -----x-- -------- -------- -------- (BCOMPEN - write inhibit from bit coparator)
205 // W ------x- -------- -------- -------- (CMPDST - compare dest instead of src)
206 // W -------x xxx----- -------- -------- (logical operation)
207 // W -------- ---xxx-- -------- -------- (ZMODE - Z comparator mode)
208 // W -------- ------x- -------- -------- (ADDDSEL - select sum of src & dst)
209 // W -------- -------x -------- -------- (PATDSEL - select pattern data)
210 // W -------- -------- x------- -------- (TOPNEN - enable carry into top intensity nibble)
211 // W -------- -------- -x------ -------- (TOPBEN - enable carry into top intensity byte)
212 // W -------- -------- --x----- -------- (ZBUFF - enable Z updates in inner loop)
213 // W -------- -------- ---x---- -------- (GOURD - enable gouraud shading in inner loop)
214 // W -------- -------- ----x--- -------- (DSTA2 - reverses A2/A1 roles)
215 // W -------- -------- -----x-- -------- (UPDA2 - add A2 step to A2 in outer loop)
216 // W -------- -------- ------x- -------- (UPDA1 - add A1 step to A1 in outer loop)
217 // W -------- -------- -------x -------- (UPDA1F - add A1 fraction step to A1 in outer loop)
218 // W -------- -------- -------- x------- (diagnostic use)
219 // W -------- -------- -------- -x------ (CLIP_A1 - clip A1 to window)
220 // W -------- -------- -------- --x----- (DSTWRZ - enable dest Z write in inner loop)
221 // W -------- -------- -------- ---x---- (DSTENZ - enable dest Z read in inner loop)
222 // W -------- -------- -------- ----x--- (DSTEN - enables dest data read in inner loop)
223 // W -------- -------- -------- -----x-- (SRCENX - enable extra src read at start of inner)
224 // W -------- -------- -------- ------x- (SRCENZ - enables source Z read in inner loop)
225 // W -------- -------- -------- -------x (SRCEN - enables source data read in inner loop)
226 // F02238 R xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_CMD - status register
227 // R xxxxxxxx xxxxxxxx -------- -------- (inner count)
228 // R -------- -------- xxxxxxxx xxxxxx-- (diagnostics)
229 // R -------- -------- -------- ------x- (STOPPED - when stopped in collision detect)
230 // R -------- -------- -------- -------x (IDLE - when idle)
231 // F0223C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_COUNT - counters register
232 // W xxxxxxxx xxxxxxxx -------- -------- (outer loop count)
233 // W -------- -------- xxxxxxxx xxxxxxxx (inner loop count)
234 // F02240-F02247 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCD - source data register
235 // F02248-F0224F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTD - destination data register
236 // F02250-F02257 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_DSTZ - destination Z register
237 // F02258-F0225F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ1 - source Z register 1
238 // F02260-F02267 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_SRCZ2 - source Z register 2
239 // F02268-F0226F W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_PATD - pattern data register
240 // F02270 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_IINC - intensity increment
241 // F02274 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_ZINC - Z increment
242 // F02278 W -------- -------- -------- -----xxx B_STOP - collision control
243 // W -------- -------- -------- -----x-- (STOPEN - enable blitter collision stops)
244 // W -------- -------- -------- ------x- (ABORT - abort after stop)
245 // W -------- -------- -------- -------x (RESUME - resume after stop)
246 // F0227C W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I3 - intensity 3
247 // F02280 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I2 - intensity 2
248 // F02284 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I1 - intensity 1
249 // F02288 W -------- xxxxxxxx xxxxxxxx xxxxxxxx B_I0 - intensity 0
250 // F0228C W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z3 - Z3
251 // F02290 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z2 - Z2
252 // F02294 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z1 - Z1
253 // F02298 W xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx B_Z0 - Z0
254 // ------------------------------------------------------------
258 #include <string.h> // For memset()
259 #include <stdlib.h> // For rand()
267 //#include "memory.h"
269 #include "settings.h"
272 #define NEW_TIMER_SYSTEM
274 // TOM registers (offset from $F00000)
281 #define MODE 0x0006 // Line buffer to video generator mode
282 #define BGEN 0x0080 // Background enable (CRY & RGB16 only)
283 #define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
284 #define PWIDTH 0x0E00 // Pixel width in video clock cycles (value written + 1)
285 #define BORD1 0x2A // Border green/red values (8 BPP)
286 #define BORD2 0x2C // Border blue value (8 BPP)
287 #define HP 0x2E // Values range from 1 - 1024 (value written + 1)
290 #define HDB1 0x38 // Horizontal display begin 1
293 #define VP 0x3E // Value ranges from 1 - 2048 (value written + 1)
303 //NOTE: These arbitrary cutoffs are NOT taken into account for PAL jaguar screens. !!! FIX !!!
305 // Arbitrary video cutoff values (i.e., first/last visible spots on a TV, in HC ticks)
306 /*#define LEFT_VISIBLE_HC 208
307 #define RIGHT_VISIBLE_HC 1528//*/
308 #define LEFT_VISIBLE_HC 208
309 #define RIGHT_VISIBLE_HC 1488
310 //#define TOP_VISIBLE_VC 25
311 //#define BOTTOM_VISIBLE_VC 503
312 #define TOP_VISIBLE_VC 31
313 #define BOTTOM_VISIBLE_VC 511
315 //Are these PAL horizontals correct?
316 //They seem to be for the most part, but there are some games that seem to be
317 //shifted over to the right from this "window".
318 #define LEFT_VISIBLE_HC_PAL 208
319 #define RIGHT_VISIBLE_HC_PAL 1488
320 #define TOP_VISIBLE_VC_PAL 67
321 #define BOTTOM_VISIBLE_VC_PAL 579
323 //This can be defined in the makefile as well...
324 //(It's easier to do it here, though...)
327 uint8 tomRam8[0x4000];
328 uint32 tomWidth, tomHeight;
329 uint32 tomTimerPrescaler;
330 uint32 tomTimerDivider;
331 int32 tomTimerCounter;
332 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
333 tom_gpu_int_pending, tom_video_int_pending;
334 uint32 * TOMBackbuffer;
336 static const char * videoMode_to_str[8] =
337 { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
338 "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
340 typedef void (render_xxx_scanline_fn)(uint32 *);
342 // Private function prototypes
344 void tom_render_16bpp_cry_scanline(uint32 * backbuffer);
345 void tom_render_24bpp_scanline(uint32 * backbuffer);
346 void tom_render_16bpp_direct_scanline(uint32 * backbuffer);
347 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer);
348 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer);
350 //render_xxx_scanline_fn * scanline_render_normal[] =
351 render_xxx_scanline_fn * scanline_render[] =
353 tom_render_16bpp_cry_scanline,
354 tom_render_24bpp_scanline,
355 tom_render_16bpp_direct_scanline,
356 tom_render_16bpp_rgb_scanline,
357 tom_render_16bpp_cry_rgb_mix_scanline,
358 tom_render_24bpp_scanline,
359 tom_render_16bpp_direct_scanline,
360 tom_render_16bpp_rgb_scanline
363 // Screen info for various games [PAL]...
366 TOM: Horizontal Period written by M68K: 850 (+1*2 = 1702)
367 TOM: Horizontal Blank Begin written by M68K: 1711
368 TOM: Horizontal Blank End written by M68K: 158
369 TOM: Horizontal Display End written by M68K: 1696
370 TOM: Horizontal Display Begin 1 written by M68K: 166
371 TOM: Vertical Period written by M68K: 623 (non-interlaced)
372 TOM: Vertical Blank End written by M68K: 34
373 TOM: Vertical Display Begin written by M68K: 46
374 TOM: Vertical Display End written by M68K: 526
375 TOM: Vertical Blank Begin written by M68K: 600
376 TOM: Vertical Sync written by M68K: 618
377 TOM: Horizontal Display End written by M68K: 1665
378 TOM: Horizontal Display Begin 1 written by M68K: 203
379 TOM: Vertical Display Begin written by M68K: 38
380 TOM: Vertical Display End written by M68K: 518
381 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 151)
382 TOM: Horizontal Display End written by M68K: 1713
383 TOM: Horizontal Display Begin 1 written by M68K: 157
384 TOM: Vertical Display Begin written by M68K: 35
385 TOM: Vertical Display End written by M68K: 2047
386 Horizontal range: 157 - 1713 (width: 1557 / 4 = 389.25, / 5 = 315.4)
389 TOM: Horizontal Period written by M68K: 845 (+1*2 = 1692)
390 TOM: Horizontal Blank Begin written by M68K: 1700
391 TOM: Horizontal Blank End written by M68K: 122
392 TOM: Horizontal Display End written by M68K: 1600
393 TOM: Horizontal Display Begin 1 written by M68K: 268
394 TOM: Vertical Period written by M68K: 523 (non-interlaced)
395 TOM: Vertical Blank End written by M68K: 40
396 TOM: Vertical Display Begin written by M68K: 44
397 TOM: Vertical Display End written by M68K: 492
398 TOM: Vertical Blank Begin written by M68K: 532
399 TOM: Vertical Sync written by M68K: 513
400 TOM: Video Mode written by M68K: 04C7. PWIDTH = 3, MODE = 16 BPP RGB, flags: BGEN (VC = 461)
403 TOM: Horizontal Display End written by M68K: 1713
404 TOM: Horizontal Display Begin 1 written by M68K: 157
405 TOM: Vertical Display Begin written by M68K: 35
406 TOM: Vertical Display End written by M68K: 2047
407 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 89)
408 TOM: Horizontal Display Begin 1 written by M68K: 208
409 TOM: Horizontal Display End written by M68K: 1662
410 TOM: Vertical Display Begin written by M68K: 100
411 TOM: Vertical Display End written by M68K: 2047
412 TOM: Video Mode written by M68K: 07C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN VARMOD (VC = 205)
413 Horizontal range: 208 - 1662 (width: 1455 / 4 = 363.5)
416 TOM: Vertical Display Begin written by M68K: 96
417 TOM: Vertical Display End written by M68K: 2047
418 TOM: Horizontal Display Begin 1 written by M68K: 239
419 TOM: Horizontal Display End written by M68K: 1692
420 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 378)
421 TOM: Vertical Display Begin written by M68K: 44
422 TOM: Vertical Display End written by M68K: 2047
423 TOM: Horizontal Display Begin 1 written by M68K: 239
424 TOM: Horizontal Display End written by M68K: 1692
425 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 559)
426 TOM: Vertical Display Begin written by M68K: 84
427 TOM: Vertical Display End written by M68K: 2047
428 TOM: Horizontal Display Begin 1 written by M68K: 239
429 TOM: Horizontal Display End written by M68K: 1692
430 TOM: Vertical Display Begin written by M68K: 44
431 TOM: Vertical Display End written by M68K: 2047
432 TOM: Horizontal Display Begin 1 written by M68K: 239
433 TOM: Horizontal Display End written by M68K: 1692
434 Horizontal range: 239 - 1692 (width: 1454 / 4 = 363.5)
438 // Screen info for various games [NTSC]...
441 TOM: Horizontal Display End written by M68K: 1727
442 TOM: Horizontal Display Begin 1 written by M68K: 123
443 TOM: Vertical Display Begin written by M68K: 25
444 TOM: Vertical Display End written by M68K: 2047
445 TOM: Video Mode written by M68K: 0EC1. PWIDTH = 8, MODE = 16 BPP CRY, flags: BGEN (VC = 5)
446 Also does PWIDTH = 4...
447 Vertical resolution: 238 lines
450 TOM: Horizontal Display End written by M68K: 1727
451 TOM: Horizontal Display Begin 1 written by M68K: 123
452 TOM: Vertical Display Begin written by M68K: 25
453 TOM: Vertical Display End written by M68K: 2047
454 TOM: Vertical Interrupt written by M68K: 507
455 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 92)
456 TOM: Horizontal Display Begin 1 written by M68K: 208
457 TOM: Horizontal Display End written by M68K: 1670
458 Display starts at 31, then 52!
459 Vertical resolution: 238 lines
462 TOM: Horizontal Display End written by M68K: 1727
463 TOM: Horizontal Display Begin 1 written by M68K: 123
464 TOM: Vertical Display Begin written by M68K: 25
465 TOM: Vertical Display End written by M68K: 2047
466 TOM: Video Mode written by GPU: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 4)
467 TOM: Video Mode written by GPU: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 508)
468 Display starts at 31 (PWIDTH = 4), 24 (PWIDTH = 5)
471 TOM: Vertical Interrupt written by M68K: 2047
472 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 0)
473 TOM: Horizontal Display End written by M68K: 1727
474 TOM: Horizontal Display Begin 1 written by M68K: 123
475 TOM: Vertical Display Begin written by M68K: 25
476 TOM: Vertical Display End written by M68K: 2047
477 TOM: Vertical Interrupt written by M68K: 507
478 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 369)
479 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 510)
480 TOM: Video Mode written by M68K: 06C3. PWIDTH = 4, MODE = 24 BPP RGB, flags: BGEN (VC = 510)
482 Vertical resolution: 238 lines
483 [Seems to be a problem between the horizontal positioning of the 16-bit CRY & 24-bit RGB]
486 TOM: Horizontal Period written by M68K: 844 (+1*2 = 1690)
487 TOM: Horizontal Blank Begin written by M68K: 1713
488 TOM: Horizontal Blank End written by M68K: 125
489 TOM: Horizontal Display End written by M68K: 1696
490 TOM: Horizontal Display Begin 1 written by M68K: 166
491 TOM: Vertical Period written by M68K: 523 (non-interlaced)
492 TOM: Vertical Blank End written by M68K: 24
493 TOM: Vertical Display Begin written by M68K: 46
494 TOM: Vertical Display End written by M68K: 496
495 TOM: Vertical Blank Begin written by M68K: 500
496 TOM: Vertical Sync written by M68K: 517
497 TOM: Vertical Interrupt written by M68K: 497
498 TOM: Video Mode written by M68K: 04C1. PWIDTH = 3, MODE = 16 BPP CRY, flags: BGEN (VC = 270)
502 TOM: Horizontal Display End written by M68K: 1727
503 TOM: Horizontal Display Begin 1 written by M68K: 123
504 TOM: Vertical Display Begin written by M68K: 25
505 TOM: Vertical Display End written by M68K: 2047
506 TOM: Vertical Interrupt written by M68K: 507
507 TOM: Video Mode written by M68K: 06C7. PWIDTH = 4, MODE = 16 BPP RGB, flags: BGEN (VC = 9)
510 TOM: Horizontal Display End written by M68K: 1823
511 TOM: Horizontal Display Begin 1 written by M68K: 45
512 TOM: Vertical Display Begin written by M68K: 40
513 TOM: Vertical Display End written by M68K: 2047
514 TOM: Vertical Interrupt written by M68K: 491
515 TOM: Video Mode written by M68K: 06C1. PWIDTH = 4, MODE = 16 BPP CRY, flags: BGEN (VC = 398)
516 Display starts at 11 (123 - 45 = 78, 78 / 4 = 19 pixels to skip)
517 Width is 417, so maybe width of 379 would be good (starting at 123, ending at 1639)
518 Vertical resolution: 238 lines
521 TOM: Horizontal Display End written by M68K: 1727
522 TOM: Horizontal Display Begin 1 written by M68K: 188
523 TOM: Vertical Display Begin written by M68K: 1
524 TOM: Vertical Display End written by M68K: 2047
525 TOM: Vertical Interrupt written by M68K: 483
526 TOM: Video Mode written by M68K: 08C7. PWIDTH = 5, MODE = 16 BPP RGB, flags: BGEN (VC = 99)
527 Width would be 303 with above scheme, but border width would be 13 pixels
530 Vertical resolution: 238 lines
533 uint32 RGB16ToRGB32[0x10000];
534 uint32 CRY16ToRGB32[0x10000];
535 uint32 MIX16ToRGB32[0x10000];
537 #warning "This is not endian-safe. !!! FIX !!!"
538 void TOMFillLookupTables(void)
540 // NOTE: Jaguar 16-bit (non-CRY) color is RBG 556 like so:
541 // RRRR RBBB BBGG GGGG
542 for(uint32 i=0; i<0x10000; i++)
543 //hm. RGB16ToRGB32[i] = 0xFF000000
544 // | ((i & 0xF100) >> 8) | ((i & 0xE000) >> 13)
545 // | ((i & 0x07C0) << 13) | ((i & 0x0700) << 8)
546 // | ((i & 0x003F) << 10) | ((i & 0x0030) << 4);
547 RGB16ToRGB32[i] = 0x000000FF
548 | ((i & 0xF100) << 16) // Red
549 | ((i & 0x003F) << 18) // Green
550 | ((i & 0x07C0) << 5); // Blue
552 for(uint32 i=0; i<0x10000; i++)
554 uint32 cyan = (i & 0xF000) >> 12,
555 red = (i & 0x0F00) >> 8,
556 intensity = (i & 0x00FF);
558 uint32 r = (((uint32)redcv[cyan][red]) * intensity) >> 8,
559 g = (((uint32)greencv[cyan][red]) * intensity) >> 8,
560 b = (((uint32)bluecv[cyan][red]) * intensity) >> 8;
562 //hm. CRY16ToRGB32[i] = 0xFF000000 | (b << 16) | (g << 8) | r;
563 CRY16ToRGB32[i] = 0x000000FF | (r << 24) | (g << 16) | (b << 8);
564 MIX16ToRGB32[i] = (i & 0x01 ? RGB16ToRGB32[i] : CRY16ToRGB32[i]);
568 void TOMSetPendingJERRYInt(void)
570 tom_jerry_int_pending = 1;
573 void TOMSetPendingTimerInt(void)
575 tom_timer_int_pending = 1;
578 void TOMSetPendingObjectInt(void)
580 tom_object_int_pending = 1;
583 void TOMSetPendingGPUInt(void)
585 tom_gpu_int_pending = 1;
588 void TOMSetPendingVideoInt(void)
590 tom_video_int_pending = 1;
593 uint8 * TOMGetRamPointer(void)
598 uint8 TOMGetVideoMode(void)
600 uint16 vmode = GET16(tomRam8, VMODE);
601 return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
604 //Used in only one place (and for debug purposes): OBJECTP.CPP
605 #warning "Used in only one place (and for debug purposes): OBJECTP.CPP !!! FIX !!!"
606 uint16 TOMGetVDB(void)
608 return GET16(tomRam8, VDB);
612 // 16 BPP CRY/RGB mixed mode rendering
614 void tom_render_16bpp_cry_rgb_mix_scanline(uint32 * backbuffer)
616 //CHANGED TO 32BPP RENDERING
617 uint16 width = tomWidth;
618 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
620 //New stuff--restrict our drawing...
621 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
622 //NOTE: May have to check HDB2 as well!
623 // Get start position in HC ticks
624 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);
627 current_line_buffer += 2 * -startPos;
629 //This case doesn't properly handle the "start on the right side of virtual screen" case
630 //Dunno why--looks Ok...
631 //What *is* for sure wrong is that it doesn't copy the linebuffer's BG pixels...
632 //This should likely be 4 instead of 2 (?--not sure)
633 backbuffer += 2 * startPos, width -= startPos;
637 uint16 color = (*current_line_buffer++) << 8;
638 color |= *current_line_buffer++;
639 *backbuffer++ = MIX16ToRGB32[color];
645 // 16 BPP CRY mode rendering
647 void tom_render_16bpp_cry_scanline(uint32 * backbuffer)
649 //CHANGED TO 32BPP RENDERING
650 uint16 width = tomWidth;
651 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
653 //New stuff--restrict our drawing...
654 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
655 //NOTE: May have to check HDB2 as well!
656 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL);// Get start position in HC ticks
659 current_line_buffer += 2 * -startPos;
661 //This should likely be 4 instead of 2 (?--not sure)
662 backbuffer += 2 * startPos, width -= startPos;
666 uint16 color = (*current_line_buffer++) << 8;
667 color |= *current_line_buffer++;
668 *backbuffer++ = CRY16ToRGB32[color];
674 // 24 BPP mode rendering
676 void tom_render_24bpp_scanline(uint32 * backbuffer)
678 //CHANGED TO 32BPP RENDERING
679 uint16 width = tomWidth;
680 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
682 //New stuff--restrict our drawing...
683 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
684 //NOTE: May have to check HDB2 as well!
685 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
688 current_line_buffer += 4 * -startPos;
690 //This should likely be 4 instead of 2 (?--not sure)
691 backbuffer += 2 * startPos, width -= startPos;
695 uint32 g = *current_line_buffer++;
696 uint32 r = *current_line_buffer++;
697 current_line_buffer++;
698 uint32 b = *current_line_buffer++;
699 //hm. *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
700 *backbuffer++ = 0x000000FF | (r << 24) | (g << 16) | (r << 8);
705 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
706 //extra hardware outside of the Jaguar console to support this!
708 // 16 BPP direct mode rendering
710 void tom_render_16bpp_direct_scanline(uint32 * backbuffer)
712 uint16 width = tomWidth;
713 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
717 uint16 color = (*current_line_buffer++) << 8;
718 color |= *current_line_buffer++;
719 *backbuffer++ = color >> 1;
725 // 16 BPP RGB mode rendering
727 void tom_render_16bpp_rgb_scanline(uint32 * backbuffer)
729 //CHANGED TO 32BPP RENDERING
730 // 16 BPP RGB: 0-5 green, 6-10 blue, 11-15 red
732 uint16 width = tomWidth;
733 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
735 //New stuff--restrict our drawing...
736 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
737 //NOTE: May have to check HDB2 as well!
738 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
742 current_line_buffer += 2 * -startPos;
744 //This should likely be 4 instead of 2 (?--not sure)
745 backbuffer += 2 * startPos, width -= startPos;
749 uint32 color = (*current_line_buffer++) << 8;
750 color |= *current_line_buffer++;
751 *backbuffer++ = RGB16ToRGB32[color];
757 void TOMResetBackbuffer(uint32 * backbuffer)
759 TOMBackbuffer = backbuffer;
763 // Process a single scanline
765 uint32 tomDeviceWidth;//kludge
766 void TOMExecScanline(uint16 scanline, bool render)
768 bool inActiveDisplayArea = true;
770 //Interlacing is still not handled correctly here... !!! FIX !!!
771 if (scanline & 0x01) // Execute OP only on even lines (non-interlaced only!)
774 if (scanline >= (uint16)GET16(tomRam8, VDB) && scanline < (uint16)GET16(tomRam8, VDE))
778 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
779 uint8 bgHI = tomRam8[BG], bgLO = tomRam8[BG + 1];
781 // Clear line buffer with BG
782 if (GET16(tomRam8, VMODE) & BGEN) // && (CRY or RGB16)...
783 for(uint32 i=0; i<720; i++)
784 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
786 OPProcessList(scanline, render);
790 inActiveDisplayArea = false;
792 // Try to take PAL into account...
794 uint16 topVisible = (vjs.hardwareTypeNTSC ? TOP_VISIBLE_VC : TOP_VISIBLE_VC_PAL),
795 bottomVisible = (vjs.hardwareTypeNTSC ? BOTTOM_VISIBLE_VC : BOTTOM_VISIBLE_VC_PAL);
797 // Here's our virtualized scanline code...
799 if (scanline >= topVisible && scanline < bottomVisible)
801 if (inActiveDisplayArea)
803 //NOTE: The following doesn't put BORDER color on the sides... !!! FIX !!!
804 #warning "The following doesn't put BORDER color on the sides... !!! FIX !!!"
805 if (vjs.renderType == RT_NORMAL)
806 scanline_render[TOMGetVideoMode()](TOMBackbuffer);
810 tom_render_16bpp_cry_scanline,
811 tom_render_24bpp_scanline,
812 tom_render_16bpp_direct_scanline,
813 tom_render_16bpp_rgb_scanline,
814 tom_render_16bpp_cry_rgb_mix_scanline,
815 tom_render_24bpp_scanline,
816 tom_render_16bpp_direct_scanline,
817 tom_render_16bpp_rgb_scanline
819 #define MODE 0x0006 // Line buffer to video generator mode
820 #define VARMOD 0x0100 // Mixed CRY/RGB16 mode (only works in MODE 0!)
822 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
823 uint8 mode = ((GET16(tomRam8, VMODE) & MODE) >> 1);
824 bool varmod = GET16(tomRam8, VMODE) & VARMOD;
825 //The video texture line buffer ranges from 0 to 1279, with its left edge starting at
826 //LEFT_VISIBLE_HC. So, we need to start writing into the backbuffer at HDB1, using pwidth
827 //as our scaling factor. The way it generates its image on a real TV!
829 //So, for example, if HDB1 is less than LEFT_VISIBLE_HC, then we have to figure out where
830 //in the VTLB that we start writing pixels from the Jaguar line buffer (VTLB start=0,
834 // 24 BPP mode rendering
836 void tom_render_24bpp_scanline(uint32 * backbuffer)
838 //CHANGED TO 32BPP RENDERING
839 uint16 width = tomWidth;
840 uint8 * current_line_buffer = (uint8 *)&tomRam8[0x1800];
842 //New stuff--restrict our drawing...
843 uint8 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
844 //NOTE: May have to check HDB2 as well!
845 int16 startPos = GET16(tomRam8, HDB1) - (vjs.hardwareTypeNTSC ? LEFT_VISIBLE_HC : LEFT_VISIBLE_HC_PAL); // Get start position in HC ticks
848 current_line_buffer += 4 * -startPos;
850 //This should likely be 4 instead of 2 (?--not sure)
851 backbuffer += 2 * startPos, width -= startPos;
855 uint32 g = *current_line_buffer++;
856 uint32 r = *current_line_buffer++;
857 current_line_buffer++;
858 uint32 b = *current_line_buffer++;
859 *backbuffer++ = 0xFF000000 | (b << 16) | (g << 8) | r;
869 // If outside of VDB & VDE, then display the border color
870 uint32 * currentLineBuffer = TOMBackbuffer;
871 uint8 g = tomRam8[BORD1], r = tomRam8[BORD1 + 1], b = tomRam8[BORD2 + 1];
872 //Hm. uint32 pixel = 0xFF000000 | (b << 16) | (g << 8) | r;
873 uint32 pixel = 0x000000FF | (r << 24) | (g << 16) | (b << 8);
875 for(uint32 i=0; i<tomWidth; i++)
876 *currentLineBuffer++ = pixel;
879 #warning "!!! Need to move this to an interface file !!! FIX !!!"
880 // TOMBackbuffer += GetSDLScreenWidthInPixels();
881 TOMBackbuffer += tomDeviceWidth;
886 // TOM initialization
890 TOMFillLookupTables();
900 WriteLog("TOM: Resolution %i x %i %s\n", TOMGetVideoModeWidth(), TOMGetVideoModeHeight(),
901 videoMode_to_str[TOMGetVideoMode()]);
902 // WriteLog("\ntom: object processor:\n");
903 // WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
904 // WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
907 // memory_free(tomRam8);
908 // memory_free(tom_cry_rgb_mix_lut);
911 uint32 TOMGetVideoModeWidth(void)
913 //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
914 // uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
915 //Temporary, for testing Doom...
916 // uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
918 // Note that the following PWIDTH values have the following pixel aspect ratios:
919 // PWIDTH = 1 -> 0.25:1 (1:4) pixels (X:Y ratio)
920 // PWIDTH = 2 -> 0.50:1 (1:2) pixels
921 // PWIDTH = 3 -> 0.75:1 (3:4) pixels
922 // PWIDTH = 4 -> 1.00:1 (1:1) pixels
923 // PWIDTH = 5 -> 1.25:1 (5:4) pixels
924 // PWIDTH = 6 -> 1.50:1 (3:2) pixels
925 // PWIDTH = 7 -> 1.75:1 (7:4) pixels
926 // PWIDTH = 8 -> 2.00:1 (2:1) pixels
928 // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
929 // this implies that the other modes have pixels that are *not* square!
930 // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
932 // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
933 // so we don't bother to add one...
934 // return width[(GET16(tomRam8, VMODE) & PWIDTH) >> 9];
936 // Now, we just calculate it...
937 /* uint16 hdb1 = GET16(tomRam8, HDB1), hde = GET16(tomRam8, HDE),
938 hbb = GET16(tomRam8, HBB), pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
939 // return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
940 //Temporary, for testing Doom...
941 return ((hbb < hde ? hbb : hde) - hdb1) / (pwidth == 8 ? 4 : pwidth);*/
943 // To make it easier to make a quasi-fixed display size, we restrict the viewing
944 // area to an arbitrary range of the Horizontal Count.
945 uint16 pwidth = ((GET16(tomRam8, VMODE) & PWIDTH) >> 9) + 1;
946 return (vjs.hardwareTypeNTSC ? RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC : RIGHT_VISIBLE_HC_PAL - LEFT_VISIBLE_HC_PAL) / pwidth;
947 //Temporary, for testing Doom...
948 // return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 8 ? 4 : pwidth);
949 //// return (RIGHT_VISIBLE_HC - LEFT_VISIBLE_HC) / (pwidth == 4 ? 8 : pwidth);
951 // More speculating...
952 // According to the JTRM, the number of potential pixels across is given by the
953 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
954 // zero to this value twice per scanline (the high bit is set on the second count).
955 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
956 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
957 // HDB1, it starts fetching the line from position 0 in LBUF.
959 // The trick, it would seem, is to figure out how long the typical visible scanline
960 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
961 // course). Using that length, we can establish an "absolute left display limit" with
962 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
963 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
964 // backbuffer + 5 pixels).
966 // That's basically what we're doing now...!
969 // *** SPECULATION ***
970 // It might work better to virtualize the height settings, i.e., set the vertical
971 // height at 240 lines and clip using the VDB and VDE/VP registers...
972 // Same with the width... [Width is pretty much virtualized now.]
974 // Now that that the width is virtualized, let's virtualize the height. :-)
975 uint32 TOMGetVideoModeHeight(void)
977 // uint16 vmode = GET16(tomRam8, VMODE);
978 // uint16 vbe = GET16(tomRam8, VBE);
979 // uint16 vbb = GET16(tomRam8, VBB);
980 // uint16 vdb = GET16(tomRam8, VDB);
981 // uint16 vde = GET16(tomRam8, VDE);
982 // uint16 vp = GET16(tomRam8, VP);
984 /* if (vde == 0xFFFF)
987 // return 227;//WAS:(vde/*-vdb*/) >> 1;
988 // The video mode height probably works this way:
989 // VC counts from 0 to VP. VDB starts the OP. Either when
990 // VDE is reached or VP, the OP is stopped. Let's try it...
991 // Also note that we're conveniently ignoring interlaced display modes...!
992 // return ((vde > vp ? vp : vde) - vdb) >> 1;
993 // return ((vde > vbb ? vbb : vde) - vdb) >> 1;
994 //Let's try from the Vertical Blank interval...
996 // return (vbb - vbe) >> 1; // Again, doesn't take interlacing into account...
997 // This of course doesn't take interlacing into account. But I haven't seen any
998 // Jaguar software that takes advantage of it either...
999 //Also, doesn't reflect PAL Jaguar either... !!! FIX !!! [DONE]
1000 // return 240; // Set virtual screen height to 240 lines...
1001 return (vjs.hardwareTypeNTSC ? 240 : 256);
1006 // Now PAL friendly!
1012 memset(tomRam8, 0x00, 0x4000);
1014 if (vjs.hardwareTypeNTSC)
1016 SET16(tomRam8, MEMCON1, 0x1861);
1017 SET16(tomRam8, MEMCON2, 0x35CC);
1018 SET16(tomRam8, HP, 844); // Horizontal Period (1-based; HP=845)
1019 SET16(tomRam8, HBB, 1713); // Horizontal Blank Begin
1020 SET16(tomRam8, HBE, 125); // Horizontal Blank End
1021 SET16(tomRam8, HDE, 1665); // Horizontal Display End
1022 SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
1023 SET16(tomRam8, VP, 523); // Vertical Period (1-based; in this case VP = 524)
1024 SET16(tomRam8, VBE, 24); // Vertical Blank End
1025 SET16(tomRam8, VDB, 38); // Vertical Display Begin
1026 SET16(tomRam8, VDE, 518); // Vertical Display End
1027 SET16(tomRam8, VBB, 500); // Vertical Blank Begin
1028 SET16(tomRam8, VS, 517); // Vertical Sync
1029 SET16(tomRam8, VMODE, 0x06C1);
1033 SET16(tomRam8, MEMCON1, 0x1861);
1034 SET16(tomRam8, MEMCON2, 0x35CC);
1035 SET16(tomRam8, HP, 850); // Horizontal Period
1036 SET16(tomRam8, HBB, 1711); // Horizontal Blank Begin
1037 SET16(tomRam8, HBE, 158); // Horizontal Blank End
1038 SET16(tomRam8, HDE, 1665); // Horizontal Display End
1039 SET16(tomRam8, HDB1, 203); // Horizontal Display Begin 1
1040 SET16(tomRam8, VP, 623); // Vertical Period (1-based; in this case VP = 624)
1041 SET16(tomRam8, VBE, 34); // Vertical Blank End
1042 SET16(tomRam8, VDB, 38); // Vertical Display Begin
1043 SET16(tomRam8, VDE, 518); // Vertical Display End
1044 SET16(tomRam8, VBB, 600); // Vertical Blank Begin
1045 SET16(tomRam8, VS, 618); // Vertical Sync
1046 SET16(tomRam8, VMODE, 0x06C1);
1052 tom_jerry_int_pending = 0;
1053 tom_timer_int_pending = 0;
1054 tom_object_int_pending = 0;
1055 tom_gpu_int_pending = 0;
1056 tom_video_int_pending = 0;
1058 tomTimerPrescaler = 0; // TOM PIT is disabled
1059 tomTimerDivider = 0;
1060 tomTimerCounter = 0;
1064 // TOM byte access (read)
1066 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
1068 //???Is this needed???
1069 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
1070 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
1071 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
1072 // offset &= 0xFF3FFF;
1075 WriteLog("TOM: Reading byte at %06X\n", offset);
1078 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1079 return GPUReadByte(offset, who);
1080 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1081 return GPUReadByte(offset, who);
1082 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1083 return OPReadByte(offset, who);*/
1084 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1085 return BlitterReadByte(offset, who);
1086 else if (offset == 0xF00050)
1087 return tomTimerPrescaler >> 8;
1088 else if (offset == 0xF00051)
1089 return tomTimerPrescaler & 0xFF;
1090 else if (offset == 0xF00052)
1091 return tomTimerDivider >> 8;
1092 else if (offset == 0xF00053)
1093 return tomTimerDivider & 0xFF;
1095 return tomRam8[offset & 0x3FFF];
1099 // TOM word access (read)
1101 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
1103 //???Is this needed???
1104 // offset &= 0xFF3FFF;
1106 WriteLog("TOM: Reading word at %06X\n", offset);
1108 if (offset >= 0xF02000 && offset <= 0xF020FF)
1109 WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
1111 if (offset == 0xF000E0)
1113 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
1114 | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
1115 | (tom_video_int_pending << 0);
1116 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
1119 //Shoud be handled by the jaguar main loop now... And it is! ;-)
1120 /* else if (offset == 0xF00006) // VC
1121 // What if we're in interlaced mode?
1122 // According to docs, in non-interlace mode VC is ALWAYS even...
1123 // return (tom_scanline << 1);// + 1;
1124 //But it's causing Rayman to be fucked up... Why???
1125 //Because VC is even in NI mode when calling the OP! That's why!
1126 return (tom_scanline << 1) + 1;//*/
1128 // F00004 R/W -----xxx xxxxxxxx HC - horizontal count
1129 // -----x-- -------- (which half of the display)
1130 // ------xx xxxxxxxx (10-bit counter)
1132 // This is a kludge to get the HC working somewhat... What we really should do here
1133 // is check what the global time is at the time of the read and calculate the correct HC...
1135 else if (offset == 0xF00004)
1136 return rand() & 0x03FF;
1137 else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE + 0x20))
1138 return GPUReadWord(offset, who);
1139 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE + 0x1000))
1140 return GPUReadWord(offset, who);
1141 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1142 return OPReadWord(offset, who);*/
1143 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1144 return BlitterReadWord(offset, who);
1145 else if (offset == 0xF00050)
1146 return tomTimerPrescaler;
1147 else if (offset == 0xF00052)
1148 return tomTimerDivider;
1151 return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
1155 // TOM byte access (write)
1157 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
1159 //???Is this needed???
1160 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
1164 WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
1167 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1169 GPUWriteByte(offset, data, who);
1172 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1174 GPUWriteByte(offset, data, who);
1177 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1179 OPWriteByte(offset, data, who);
1182 else if ((offset >= 0xF02200) && (offset < 0xF022A0))
1184 BlitterWriteByte(offset, data, who);
1187 else if (offset == 0xF00050)
1189 tomTimerPrescaler = (tomTimerPrescaler & 0x00FF) | (data << 8);
1193 else if (offset == 0xF00051)
1195 tomTimerPrescaler = (tomTimerPrescaler & 0xFF00) | data;
1199 else if (offset == 0xF00052)
1201 tomTimerDivider = (tomTimerDivider & 0x00FF) | (data << 8);
1205 else if (offset == 0xF00053)
1207 tomTimerDivider = (tomTimerDivider & 0xFF00) | data;
1211 else if (offset >= 0xF00400 && offset <= 0xF007FF) // CLUT (A & B)
1213 // Writing to one CLUT writes to the other
1214 offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
1215 tomRam8[offset] = data, tomRam8[offset + 0x200] = data;
1218 tomRam8[offset & 0x3FFF] = data;
1222 // TOM word access (write)
1224 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
1226 //???Is this needed???
1230 WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1232 if (offset == 0xF00000 + MEMCON1)
1233 WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1234 if (offset == 0xF00000 + MEMCON2)
1235 WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1236 if (offset >= 0xF02000 && offset <= 0xF020FF)
1237 WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1239 if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1241 GPUWriteWord(offset, data, who);
1244 else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1246 GPUWriteWord(offset, data, who);
1249 //What's so special about this?
1250 /* else if ((offset >= 0xF00000) && (offset < 0xF00002))
1252 TOMWriteByte(offset, data >> 8);
1253 TOMWriteByte(offset+1, data & 0xFF);
1255 /* else if ((offset >= 0xF00010) && (offset < 0xF00028))
1257 OPWriteWord(offset, data, who);
1260 else if (offset == 0xF00050)
1262 tomTimerPrescaler = data;
1266 else if (offset == 0xF00052)
1268 tomTimerDivider = data;
1272 else if (offset == 0xF000E0)
1276 tom_video_int_pending = 0;
1278 tom_gpu_int_pending = 0;
1280 tom_object_int_pending = 0;
1282 tom_timer_int_pending = 0;
1284 tom_jerry_int_pending = 0;
1286 else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1288 BlitterWriteWord(offset, data, who);
1291 else if (offset >= 0xF00400 && offset <= 0xF007FE) // CLUT (A & B)
1293 // Writing to one CLUT writes to the other
1294 offset &= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
1295 // Watch out for unaligned writes here! (Not fixed yet)
1296 SET16(tomRam8, offset, data);
1297 SET16(tomRam8, offset + 0x200, data);
1301 if (offset == 0x28) // VMODE (Why? Why not OBF?)
1302 //Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!
1303 #warning "Actually, we should check to see if the Enable bit of VMODE is set before doing this... !!! FIX !!!"
1304 objectp_running = 1;
1306 if (offset >= 0x30 && offset <= 0x4E)
1307 data &= 0x07FF; // These are (mostly) 11-bit registers
1308 if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1309 data &= 0x03FF; // These are all 10-bit registers
1311 TOMWriteByte(offset, data >> 8, who);
1312 TOMWriteByte(offset+1, data & 0xFF, who);
1315 WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1317 WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1319 WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1321 WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1323 WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1325 WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1327 WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1329 WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1331 WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1333 WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1335 WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1337 WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1338 if (offset == VMODE)
1339 WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tomRam8, VC));
1341 // detect screen resolution changes
1342 //This may go away in the future, if we do the virtualized screen thing...
1343 //This may go away soon!
1344 if ((offset >= 0x28) && (offset <= 0x4F))
1346 uint32 width = TOMGetVideoModeWidth(), height = TOMGetVideoModeHeight();
1348 if ((width != tomWidth) || (height != tomHeight))
1350 tomWidth = width, tomHeight = height;
1352 #warning "!!! TOM: ResizeScreen commented out !!!"
1353 // No need to resize anything, since we're prepared for this...
1354 // if (vjs.renderType == RT_NORMAL)
1355 // ResizeScreen(tomWidth, tomHeight);
1360 int TOMIRQEnabled(int irq)
1362 // This is the correct byte in big endian... D'oh!
1363 // return jaguar_byte_read(0xF000E1) & (1 << irq);
1364 return tomRam8[INT1 + 1/*0xE1*/] & (1 << irq);
1368 // TOM Programmable Interrupt Timer handler
1369 // NOTE: TOM's PIT is only enabled if the prescaler is != 0
1370 // The PIT only generates an interrupt when it counts down to zero, not when loaded!
1372 void TOMPITCallback(void);
1374 void TOMResetPIT(void)
1376 #ifndef NEW_TIMER_SYSTEM
1377 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!! [DONE]
1378 //Also, why +1??? 'Cause that's what it says in the JTRM...!
1379 //There is a small problem with this approach: If both the prescaler and the divider are equal
1380 //to $FFFF then the counter won't be large enough to handle it. !!! FIX !!!
1381 if (tom_timer_prescaler)
1382 tom_timer_counter += (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1383 // WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1385 // Need to remove previous timer from the queue, if it exists...
1386 RemoveCallback(TOMPITCallback);
1388 if (tomTimerPrescaler)
1390 double usecs = (float)(tomTimerPrescaler + 1) * (float)(tomTimerDivider + 1) * RISC_CYCLE_IN_USEC;
1391 SetCallbackTime(TOMPITCallback, usecs);
1397 // TOM Programmable Interrupt Timer handler
1398 // NOTE: TOM's PIT is only enabled if the prescaler is != 0
1400 //NOTE: This is only used by the old execution code... Safe to remove
1401 // once the timer system is stable.
1402 void TOMExecPIT(uint32 cycles)
1404 if (tomTimerPrescaler)
1406 tomTimerCounter -= cycles;
1408 if (tomTimerCounter <= 0)
1410 TOMSetPendingTimerInt();
1411 GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // GPUSetIRQLine does the 'IRQ enabled' checking
1413 if (TOMIRQEnabled(IRQ_TIMER))
1414 m68k_set_irq(7); // Cause a 68000 NMI...
1421 void TOMPITCallback(void)
1423 // INT1_RREG |= 0x08; // Set TOM PIT interrupt pending
1424 TOMSetPendingTimerInt();
1425 GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE); // It does the 'IRQ enabled' checking
1427 // if (INT1_WREG & 0x08)
1428 if (TOMIRQEnabled(IRQ_TIMER))
1429 m68k_set_irq(7); // Generate 68K NMI