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[virtualjaguar] / src / tom.cpp
1 //
2 // TOM Processing
3 //
4 // by cal2
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Cleanups and endian wrongness amelioration by James L. Hammons
7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
8 //       the braindead way in which MAME handles memory. :-)
9 //
10 // Note: TOM has only a 16K memory space
11 //
12 //      ------------------------------------------------------------
13 //      TOM REGISTERS (Mapped by Aaron Giles)
14 //      ------------------------------------------------------------
15 //      F00000-F0FFFF   R/W   xxxxxxxx xxxxxxxx   Internal Registers
16 //      F00000          R/W   -x-xx--- xxxxxxxx   MEMCON1 - memory config reg 1
17 //                            -x------ --------      (CPU32 - is the CPU 32bits?)
18 //                            ---xx--- --------      (IOSPEED - external I/O clock cycles)
19 //                            -------- x-------      (FASTROM - reduces ROM clock cycles)
20 //                            -------- -xx-----      (DRAMSPEED - sets RAM clock cycles)
21 //                            -------- ---xx---      (ROMSPEED - sets ROM clock cycles)
22 //                            -------- -----xx-      (ROMWIDTH - sets width of ROM: 8,16,32,64 bits)
23 //                            -------- -------x      (ROMHI - controls ROM mapping)
24 //      F00002          R/W   --xxxxxx xxxxxxxx   MEMCON2 - memory config reg 2
25 //                            --x----- --------      (HILO - image display bit order)
26 //                            ---x---- --------      (BIGEND - big endian addressing?)
27 //                            ----xxxx --------      (REFRATE - DRAM refresh rate)
28 //                            -------- xx------      (DWIDTH1 - DRAM1 width: 8,16,32,64 bits)
29 //                            -------- --xx----      (COLS1 - DRAM1 columns: 256,512,1024,2048)
30 //                            -------- ----xx--      (DWIDTH0 - DRAM0 width: 8,16,32,64 bits)
31 //                            -------- ------xx      (COLS0 - DRAM0 columns: 256,512,1024,2048)
32 //      F00004          R/W   -----xxx xxxxxxxx   HC - horizontal count
33 //                            -----x-- --------      (which half of the display)
34 //                            ------xx xxxxxxxx      (10-bit counter)
35 //      F00006          R/W   ----xxxx xxxxxxxx   VC - vertical count
36 //                            ----x--- --------      (which field is being generated)
37 //                            -----xxx xxxxxxxx      (11-bit counter)
38 //      F00008          R     -----xxx xxxxxxxx   LPH - light pen horizontal position
39 //      F0000A          R     -----xxx xxxxxxxx   LPV - light pen vertical position
40 //      F00010-F00017   R     xxxxxxxx xxxxxxxx   OB - current object code from the graphics processor
41 //      F00020-F00023     W   xxxxxxxx xxxxxxxx   OLP - start of the object list
42 //      F00026            W   -------- -------x   OBF - object processor flag
43 //      F00028            W   ----xxxx xxxxxxxx   VMODE - video mode
44 //                        W   ----xxx- --------      (PWIDTH1-8 - width of pixel in video clock cycles)
45 //                        W   -------x --------      (VARMOD - enable variable color resolution)
46 //                        W   -------- x-------      (BGEN - clear line buffer to BG color)
47 //                        W   -------- -x------      (CSYNC - enable composite sync on VSYNC)
48 //                        W   -------- --x-----      (BINC - local border color if INCEN)
49 //                        W   -------- ---x----      (INCEN - encrustation enable)
50 //                        W   -------- ----x---      (GENLOCK - enable genlock)
51 //                        W   -------- -----xx-      (MODE - CRY16,RGB24,DIRECT16,RGB16)
52 //                        W   -------- -------x      (VIDEN - enables video)
53 //      F0002A            W   xxxxxxxx xxxxxxxx   BORD1 - border color (red/green)
54 //      F0002C            W   -------- xxxxxxxx   BORD2 - border color (blue)
55 //      F0002E            W   ------xx xxxxxxxx   HP - horizontal period
56 //      F00030            W   -----xxx xxxxxxxx   HBB - horizontal blanking begin
57 //      F00032            W   -----xxx xxxxxxxx   HBE - horizontal blanking end
58 //      F00034            W   -----xxx xxxxxxxx   HSYNC - horizontal sync
59 //      F00036            W   ------xx xxxxxxxx   HVS - horizontal vertical sync
60 //      F00038            W   -----xxx xxxxxxxx   HDB1 - horizontal display begin 1
61 //      F0003A            W   -----xxx xxxxxxxx   HDB2 - horizontal display begin 2
62 //      F0003C            W   -----xxx xxxxxxxx   HDE - horizontal display end
63 //      F0003E            W   -----xxx xxxxxxxx   VP - vertical period
64 //      F00040            W   -----xxx xxxxxxxx   VBB - vertical blanking begin
65 //      F00042            W   -----xxx xxxxxxxx   VBE - vertical blanking end
66 //      F00044            W   -----xxx xxxxxxxx   VS - vertical sync
67 //      F00046            W   -----xxx xxxxxxxx   VDB - vertical display begin
68 //      F00048            W   -----xxx xxxxxxxx   VDE - vertical display end
69 //      F0004A            W   -----xxx xxxxxxxx   VEB - vertical equalization begin
70 //      F0004C            W   -----xxx xxxxxxxx   VEE - vertical equalization end
71 //      F0004E            W   -----xxx xxxxxxxx   VI - vertical interrupt
72 //      F00050            W   xxxxxxxx xxxxxxxx   PIT0 - programmable interrupt timer 0
73 //      F00052            W   xxxxxxxx xxxxxxxx   PIT1 - programmable interrupt timer 1
74 //      F00054            W   ------xx xxxxxxxx   HEQ - horizontal equalization end
75 //      F00058            W   xxxxxxxx xxxxxxxx   BG - background color
76 //      F000E0          R/W   ---xxxxx ---xxxxx   INT1 - CPU interrupt control register
77 //                            ---x---- --------      (C_JERCLR - clear pending Jerry ints)
78 //                            ----x--- --------      (C_PITCLR - clear pending PIT ints)
79 //                            -----x-- --------      (C_OPCLR - clear pending object processor ints)
80 //                            ------x- --------      (C_GPUCLR - clear pending graphics processor ints)
81 //                            -------x --------      (C_VIDCLR - clear pending video timebase ints)
82 //                            -------- ---x----      (C_JERENA - enable Jerry ints)
83 //                            -------- ----x---      (C_PITENA - enable PIT ints)
84 //                            -------- -----x--      (C_OPENA - enable object processor ints)
85 //                            -------- ------x-      (C_GPUENA - enable graphics processor ints)
86 //                            -------- -------x      (C_VIDENA - enable video timebase ints)
87 //      F000E2            W   -------- --------   INT2 - CPU interrupt resume register
88 //      F00400-F005FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table A
89 //      F00600-F007FF   R/W   xxxxxxxx xxxxxxxx   CLUT - color lookup table B
90 //      F00800-F00D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer A
91 //      F01000-F0159F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer B
92 //      F01800-F01D9F   R/W   xxxxxxxx xxxxxxxx   LBUF - line buffer currently selected
93 //      ------------------------------------------------------------
94 //      F02000-F021FF   R/W   xxxxxxxx xxxxxxxx   GPU control registers
95 //      F02100          R/W   xxxxxxxx xxxxxxxx   G_FLAGS - GPU flags register
96 //                      R/W   x------- --------      (DMAEN - DMA enable)
97 //                      R/W   -x------ --------      (REGPAGE - register page)
98 //                        W   --x----- --------      (G_BLITCLR - clear blitter interrupt)
99 //                        W   ---x---- --------      (G_OPCLR - clear object processor int)
100 //                        W   ----x--- --------      (G_PITCLR - clear PIT interrupt)
101 //                        W   -----x-- --------      (G_JERCLR - clear Jerry interrupt)
102 //                        W   ------x- --------      (G_CPUCLR - clear CPU interrupt)
103 //                      R/W   -------x --------      (G_BLITENA - enable blitter interrupt)
104 //                      R/W   -------- x-------      (G_OPENA - enable object processor int)
105 //                      R/W   -------- -x------      (G_PITENA - enable PIT interrupt)
106 //                      R/W   -------- --x-----      (G_JERENA - enable Jerry interrupt)
107 //                      R/W   -------- ---x----      (G_CPUENA - enable CPU interrupt)
108 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
109 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
110 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
111 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
112 //      F02104            W   -------- ----xxxx   G_MTXC - matrix control register
113 //                        W   -------- ----x---      (MATCOL - column/row major)
114 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
115 //      F02108            W   ----xxxx xxxxxx--   G_MTXA - matrix address register
116 //      F0210C            W   -------- -----xxx   G_END - data organization register
117 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
118 //                        W   -------- ------x-      (BIG_PIX - big endian pixels)
119 //                        W   -------- -------x      (BIG_IO - big endian I/O)
120 //      F02110          R/W   xxxxxxxx xxxxxxxx   G_PC - GPU program counter
121 //      F02114          R/W   xxxxxxxx xx-xxxxx   G_CTRL - GPU control/status register
122 //                      R     xxxx---- --------      (VERSION - GPU version code)
123 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
124 //                      R/W   -----x-- --------      (G_BLITLAT - blitter interrupt latch)
125 //                      R/W   ------x- --------      (G_OPLAT - object processor int latch)
126 //                      R/W   -------x --------      (G_PITLAT - PIT interrupt latch)
127 //                      R/W   -------- x-------      (G_JERLAT - Jerry interrupt latch)
128 //                      R/W   -------- -x------      (G_CPULAT - CPU interrupt latch)
129 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
130 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
131 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
132 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
133 //                      R/W   -------- -------x      (GPUGO - enable GPU execution)
134 //      F02118-F0211B   R/W   xxxxxxxx xxxxxxxx   G_HIDATA - high data register
135 //      F0211C-F0211F   R     xxxxxxxx xxxxxxxx   G_REMAIN - divide unit remainder
136 //      F0211C            W   -------- -------x   G_DIVCTRL - divide unit control
137 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
138 //      ------------------------------------------------------------
139 //      BLITTER REGISTERS
140 //      ------------------------------------------------------------
141 //      F02200-F022FF   R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   Blitter registers
142 //      F02200            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_BASE - A1 base register
143 //      F02204            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A1_FLAGS - A1 flags register
144 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
145 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
146 //                        W   -------- -----x-- -------- --------      (Y add control)
147 //                        W   -------- ------xx -------- --------      (X add control)
148 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
149 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
150 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
151 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
152 //      F02208            W   -xxxxxxx xxxxxxxx -xxxxxxx xxxxxxxx   A1_CLIP - A1 clipping size
153 //                        W   -xxxxxxx xxxxxxxx -------- --------      (height)
154 //                        W   -------- -------- -xxxxxxx xxxxxxxx      (width)
155 //      F0220C          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_PIXEL - A1 pixel pointer
156 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
157 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
158 //      F02210            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_STEP - A1 step value
159 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
160 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
161 //      F02214            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FSTEP - A1 step fraction value
162 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step fraction value)
163 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step fraction value)
164 //      F02218          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FPIXEL - A1 pixel pointer fraction
165 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel fraction value)
166 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel fraction value)
167 //      F0221C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_INC - A1 increment
168 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment)
169 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment)
170 //      F02220            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A1_FINC - A1 increment fraction
171 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y increment fraction)
172 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X increment fraction)
173 //      F02224            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_BASE - A2 base register
174 //      F02228            W   -------- ---xxxxx -xxxxxxx xxxxx-xx   A2_FLAGS - A2 flags register
175 //                        W   -------- ---x---- -------- --------      (YSIGNSUB - invert sign of Y delta)
176 //                        W   -------- ----x--- -------- --------      (XSIGNSUB - invert sign of X delta)
177 //                        W   -------- -----x-- -------- --------      (Y add control)
178 //                        W   -------- ------xx -------- --------      (X add control)
179 //                        W   -------- -------- -xxxxxx- --------      (width in 6-bit floating point)
180 //                        W   -------- -------- -------x xx------      (ZOFFS1-6 - Z data offset)
181 //                        W   -------- -------- -------- --xxx---      (PIXEL - pixel size)
182 //                        W   -------- -------- -------- ------xx      (PITCH1-4 - data phrase pitch)
183 //      F0222C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_MASK - A2 window mask
184 //      F02230          R/W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_PIXEL - A2 pixel pointer
185 //                      R/W   xxxxxxxx xxxxxxxx -------- --------      (Y pixel value)
186 //                      R/W   -------- -------- xxxxxxxx xxxxxxxx      (X pixel value)
187 //      F02234            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   A2_STEP - A2 step value
188 //                        W   xxxxxxxx xxxxxxxx -------- --------      (Y step value)
189 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (X step value)
190 //      F02238            W   -xxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - command register
191 //                        W   -x------ -------- -------- --------      (SRCSHADE - modify source intensity)
192 //                        W   --x----- -------- -------- --------      (BUSHI - hi priority bus)
193 //                        W   ---x---- -------- -------- --------      (BKGWREN - writeback destination)
194 //                        W   ----x--- -------- -------- --------      (DCOMPEN - write inhibit from data comparator)
195 //                        W   -----x-- -------- -------- --------      (BCOMPEN - write inhibit from bit coparator)
196 //                        W   ------x- -------- -------- --------      (CMPDST - compare dest instead of src)
197 //                        W   -------x xxx----- -------- --------      (logical operation)
198 //                        W   -------- ---xxx-- -------- --------      (ZMODE - Z comparator mode)
199 //                        W   -------- ------x- -------- --------      (ADDDSEL - select sum of src & dst)
200 //                        W   -------- -------x -------- --------      (PATDSEL - select pattern data)
201 //                        W   -------- -------- x------- --------      (TOPNEN - enable carry into top intensity nibble)
202 //                        W   -------- -------- -x------ --------      (TOPBEN - enable carry into top intensity byte)
203 //                        W   -------- -------- --x----- --------      (ZBUFF - enable Z updates in inner loop)
204 //                        W   -------- -------- ---x---- --------      (GOURD - enable gouraud shading in inner loop)
205 //                        W   -------- -------- ----x--- --------      (DSTA2 - reverses A2/A1 roles)
206 //                        W   -------- -------- -----x-- --------      (UPDA2 - add A2 step to A2 in outer loop)
207 //                        W   -------- -------- ------x- --------      (UPDA1 - add A1 step to A1 in outer loop)
208 //                        W   -------- -------- -------x --------      (UPDA1F - add A1 fraction step to A1 in outer loop)
209 //                        W   -------- -------- -------- x-------      (diagnostic use)
210 //                        W   -------- -------- -------- -x------      (CLIP_A1 - clip A1 to window)
211 //                        W   -------- -------- -------- --x-----      (DSTWRZ - enable dest Z write in inner loop)
212 //                        W   -------- -------- -------- ---x----      (DSTENZ - enable dest Z read in inner loop)
213 //                        W   -------- -------- -------- ----x---      (DSTEN - enables dest data read in inner loop)
214 //                        W   -------- -------- -------- -----x--      (SRCENX - enable extra src read at start of inner)
215 //                        W   -------- -------- -------- ------x-      (SRCENZ - enables source Z read in inner loop)
216 //                        W   -------- -------- -------- -------x      (SRCEN - enables source data read in inner loop)
217 //      F02238          R     xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_CMD - status register
218 //                      R     xxxxxxxx xxxxxxxx -------- --------      (inner count)
219 //                      R     -------- -------- xxxxxxxx xxxxxx--      (diagnostics)
220 //                      R     -------- -------- -------- ------x-      (STOPPED - when stopped in collision detect)
221 //                      R     -------- -------- -------- -------x      (IDLE - when idle)
222 //      F0223C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_COUNT - counters register
223 //                        W   xxxxxxxx xxxxxxxx -------- --------      (outer loop count)
224 //                        W   -------- -------- xxxxxxxx xxxxxxxx      (inner loop count)
225 //      F02240-F02247     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCD - source data register
226 //      F02248-F0224F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTD - destination data register
227 //      F02250-F02257     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_DSTZ - destination Z register
228 //      F02258-F0225F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ1 - source Z register 1
229 //      F02260-F02267     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_SRCZ2 - source Z register 2
230 //      F02268-F0226F     W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_PATD - pattern data register
231 //      F02270            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_IINC - intensity increment
232 //      F02274            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_ZINC - Z increment
233 //      F02278            W   -------- -------- -------- -----xxx   B_STOP - collision control
234 //                        W   -------- -------- -------- -----x--      (STOPEN - enable blitter collision stops)
235 //                        W   -------- -------- -------- ------x-      (ABORT - abort after stop)
236 //                        W   -------- -------- -------- -------x      (RESUME - resume after stop)
237 //      F0227C            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I3 - intensity 3
238 //      F02280            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I2 - intensity 2
239 //      F02284            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I1 - intensity 1
240 //      F02288            W   -------- xxxxxxxx xxxxxxxx xxxxxxxx   B_I0 - intensity 0
241 //      F0228C            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z3 - Z3
242 //      F02290            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z2 - Z2
243 //      F02294            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z1 - Z1
244 //      F02298            W   xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx   B_Z0 - Z0
245 //      ------------------------------------------------------------
246
247 #include <SDL.h>
248 #include "tom.h"
249 #include "gpu.h"
250 #include "objectp.h"
251 #include "cry2rgb.h"
252
253 // TOM registers (offset from $F00000)
254
255 #define MEMCON1         0x00
256 #define MEMCON2         0x02
257 #define HC                      0x04
258 #define VC                      0x06
259 #define VMODE           0x28
260 #define   MODE          0x0006          // Line buffer to video generator mode
261 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
262 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode (only works in MODE 0!)
263 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)
264 #define HP                      0x2E            // Values range from 1 - 1024 (value written + 1)
265 #define HBB                     0x30
266 #define HBE                     0x32
267 #define HDB1            0x38
268 #define HDB2            0x3A
269 #define HDE                     0x3C
270 #define VP                      0x3E            // Value ranges from 1 - 2048 (value written + 1)
271 #define VBB                     0x40
272 #define VBE                     0x42
273 #define VS                      0x44
274 #define VDB                     0x46
275 #define VDE                     0x48
276 #define VI                      0x4E
277 #define BG                      0x58
278 #define INT1            0xE0
279
280 //This can be defined in the makefile as well...
281 //(It's easier to do it here, though...)
282 //#define TOM_DEBUG
283
284 extern uint32 jaguar_mainRom_crc32;
285 extern uint8 objectp_running;
286
287 static uint8 * tom_ram_8;
288 uint32 tom_width, tom_height, tom_real_internal_width;
289 static uint32 tom_timer_prescaler;
290 static uint32 tom_timer_divider;
291 static int32 tom_timer_counter;
292 //uint32 tom_scanline;
293 //uint32 hblankWidthInPixels = 0;
294 uint16 tom_jerry_int_pending, tom_timer_int_pending, tom_object_int_pending,
295         tom_gpu_int_pending, tom_video_int_pending;
296 uint16 * tom_cry_rgb_mix_lut;
297
298 static char * videoMode_to_str[8] =
299         { "16 BPP CRY", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB",
300           "Mixed mode", "24 BPP RGB", "16 BPP DIRECT", "16 BPP RGB" };
301
302 typedef void (render_xxx_scanline_fn)(int16 *);
303
304 // Private function prototypes
305
306 void tom_render_16bpp_cry_scanline(int16 * backbuffer);
307 void tom_render_24bpp_scanline(int16 * backbuffer);
308 void tom_render_16bpp_direct_scanline(int16 * backbuffer);
309 void tom_render_16bpp_rgb_scanline(int16 * backbuffer);
310 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer);
311
312 void tom_render_16bpp_cry_stretch_scanline(int16 * backbuffer);
313 void tom_render_24bpp_stretch_scanline(int16 * backbuffer);
314 void tom_render_16bpp_direct_stretch_scanline(int16 * backbuffer);
315 void tom_render_16bpp_rgb_stretch_scanline(int16 * backbuffer);
316 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 * backbuffer);
317
318 render_xxx_scanline_fn * scanline_render_normal[]=
319 {
320         tom_render_16bpp_cry_scanline,
321         tom_render_24bpp_scanline,
322         tom_render_16bpp_direct_scanline,
323         tom_render_16bpp_rgb_scanline,
324         tom_render_16bpp_cry_rgb_mix_scanline,
325         tom_render_24bpp_scanline,
326         tom_render_16bpp_direct_scanline,
327         tom_render_16bpp_rgb_scanline
328 };
329
330 render_xxx_scanline_fn * scanline_render_stretch[]=
331 {
332         tom_render_16bpp_cry_stretch_scanline,
333         tom_render_24bpp_stretch_scanline,
334         tom_render_16bpp_direct_stretch_scanline,
335         tom_render_16bpp_rgb_stretch_scanline,
336         tom_render_16bpp_cry_rgb_mix_stretch_scanline,
337         tom_render_24bpp_stretch_scanline,
338         tom_render_16bpp_direct_stretch_scanline,
339         tom_render_16bpp_rgb_stretch_scanline,
340 };
341
342 render_xxx_scanline_fn * scanline_render[8];
343
344
345 void tom_calc_cry_rgb_mix_lut(void)
346 {
347         memory_malloc_secure((void **)&tom_cry_rgb_mix_lut, 2 * 0x10000, "CRY/RGB mixed mode LUT");
348
349         for (uint32 i=0; i<0x10000; i++)
350         {
351                 uint16 color = i;
352
353                 if (color & 0x01)
354                 {
355                         color >>= 1;
356                         color = (color & 0x007C00) | ((color & 0x00003E0) >> 5) | ((color & 0x0000001F) << 5);
357                 }
358                 else
359                 {
360                         uint32 chrm = (color & 0xF000) >> 12,
361                                 chrl = (color & 0x0F00) >> 8,
362                                 y = color & 0x00FF;
363                         uint16 red = (((uint32)redcv[chrm][chrl]) * y) >> 11,
364                                 green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
365                                 blue = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
366                         color = (red << 10) | (green << 5) | blue;
367                 }
368                 tom_cry_rgb_mix_lut[i] = color;
369         }
370 }
371
372 void tom_set_pending_jerry_int(void)
373 {
374         tom_jerry_int_pending = 1;
375 }
376
377 void tom_set_pending_timer_int(void)
378 {
379         tom_timer_int_pending = 1;
380 }
381
382 void tom_set_pending_object_int(void)
383 {
384         tom_object_int_pending = 1;
385 }
386
387 void tom_set_pending_gpu_int(void)
388 {
389         tom_gpu_int_pending = 1;
390 }
391
392 void tom_set_pending_video_int(void)
393 {
394         tom_video_int_pending = 1;
395 }
396
397 uint8 * tom_get_ram_pointer(void)
398 {
399         return tom_ram_8;
400 }
401
402 uint8 tom_getVideoMode(void)
403 {
404         uint16 vmode = GET16(tom_ram_8, VMODE);
405         return ((vmode & VARMOD) >> 6) | ((vmode & MODE) >> 1);
406 }
407
408 //Used in only one place (and for debug purposes): OBJECTP.CPP
409 uint16 tom_get_vdb(void)
410 {
411 // This in NOT VDB!!!
412 //      return GET16(tom_ram_8, VBE);
413         return GET16(tom_ram_8, VDB);
414 }
415
416 //
417 // 16 BPP CRY/RGB mixed mode rendering
418 //
419 void tom_render_16bpp_cry_rgb_mix_scanline(int16 * backbuffer)
420 {
421         uint16 width = tom_width;
422         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
423         
424         while (width)
425         {
426                 uint16 color = (*current_line_buffer++) << 8;
427                 color |= *current_line_buffer++;
428                 *backbuffer++ = tom_cry_rgb_mix_lut[color];
429                 width--;
430         }
431 }
432
433 //
434 // 16 BPP CRY mode rendering
435 //
436 void tom_render_16bpp_cry_scanline(int16 * backbuffer)
437 {
438         uint16 width = tom_width;
439         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
440
441         while (width)
442         {
443                 uint16 color = (*current_line_buffer++) << 8;
444                 color |= *current_line_buffer++;
445                 
446                 uint32 chrm = (color & 0xF000) >> 12,
447                         chrl = (color & 0x0F00) >> 8,
448                         y = (color & 0x00FF);
449                                 
450                 uint16 red   = (((uint32)redcv[chrm][chrl]) * y) >> 11,
451                         green = (((uint32)greencv[chrm][chrl]) * y) >> 11,
452                         blue  = (((uint32)bluecv[chrm][chrl]) * y) >> 11;
453                 
454                 *backbuffer++ = (red << 10) | (green << 5) | blue;
455                 width--;
456         }
457 }
458
459 //
460 // 24 BPP mode rendering
461 //
462 void tom_render_24bpp_scanline(int16 * backbuffer)
463 {
464         uint16 width = tom_width;
465         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
466         
467         while (width)
468         {
469                 uint16 green = (*current_line_buffer++) >> 3;
470                 uint16 red = (*current_line_buffer++) >> 3;
471                 current_line_buffer++;
472                 uint16 blue = (*current_line_buffer++) >> 3;
473                 *backbuffer++ = (red << 10) | (green << 5) | blue;
474                 width--;
475         }
476 }
477
478 //Seems to me that this is NOT a valid mode--the JTRM seems to imply that you would need
479 //extra hardware outside of the Jaguar console to support this!
480 //
481 // 16 BPP direct mode rendering
482 //
483 void tom_render_16bpp_direct_scanline(int16 * backbuffer)
484 {
485         uint16 width = tom_width;
486         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
487         
488         while (width)
489         {
490                 uint16 color = (*current_line_buffer++) << 8;
491                 color |= *current_line_buffer++;
492                 *backbuffer++ = color >> 1;
493                 width--;
494         }
495 }
496
497 //
498 // 16 BPP RGB mode rendering
499 //
500 void tom_render_16bpp_rgb_scanline(int16 * backbuffer)
501 {
502         uint16 width = tom_width;
503         uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
504         
505         while (width)
506         {
507                 uint16 color = (*current_line_buffer++) << 8;
508                 color = (color | *current_line_buffer++) >> 1;
509                 color = (color&0x7C00) | ((color&0x03E0) >> 5) | ((color&0x001F) << 5);
510                 *backbuffer++ = color;
511                 width--;
512         }
513 }
514
515 // This stuff may just go away by itself, especially if we do some
516 // good old OpenGL goodness...
517
518 void tom_render_16bpp_cry_rgb_mix_stretch_scanline(int16 *backbuffer)
519 {
520         uint16 width=tom_width;
521         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
522         
523         while (width)
524         {
525                 uint16 color;
526                 color=*current_line_buffer++;
527                 color<<=8;
528                 color|=*current_line_buffer++;
529                 *backbuffer++=tom_cry_rgb_mix_lut[color];
530                 current_line_buffer+=2;
531                 width--;
532         }
533 }
534
535 void tom_render_16bpp_cry_stretch_scanline(int16 *backbuffer)
536 {
537         uint32 chrm, chrl, y;
538
539         uint16 width=tom_width;
540         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
541         
542         while (width)
543         {
544                 uint16 color;
545                 color=*current_line_buffer++;
546                 color<<=8;
547                 color|=*current_line_buffer++;
548                 
549                 chrm = (color & 0xF000) >> 12;    
550                 chrl = (color & 0x0F00) >> 8;
551                 y    = (color & 0x00FF);
552                                 
553                 uint16 red   =  ((((uint32)redcv[chrm][chrl])*y)>>11);
554                 uint16 green =  ((((uint32)greencv[chrm][chrl])*y)>>11);
555                 uint16 blue  =  ((((uint32)bluecv[chrm][chrl])*y)>>11);
556                 
557                 uint16 color2;
558                 color2=*current_line_buffer++;
559                 color2<<=8;
560                 color2|=*current_line_buffer++;
561                 
562                 chrm = (color2 & 0xF000) >> 12;    
563                 chrl = (color2 & 0x0F00) >> 8;
564                 y    = (color2 & 0x00FF);
565                                 
566                 uint16 red2   = ((((uint32)redcv[chrm][chrl])*y)>>11);
567                 uint16 green2 = ((((uint32)greencv[chrm][chrl])*y)>>11);
568                 uint16 blue2  = ((((uint32)bluecv[chrm][chrl])*y)>>11);
569                 
570                 red=(red+red2)>>1;
571                 green=(green+green2)>>1;
572                 blue=(blue+blue2)>>1;
573
574                 *backbuffer++=(red<<10)|(green<<5)|blue;
575                 width--;
576         }
577 }
578
579 void tom_render_24bpp_stretch_scanline(int16 *backbuffer)
580 {
581         uint16 width=tom_width;
582         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
583         
584         while (width)
585         {
586                 uint16 green=*current_line_buffer++;
587                 uint16 red=*current_line_buffer++;
588                 /*uint16 nc=*/current_line_buffer++;
589                 uint16 blue=*current_line_buffer++;
590                 red>>=3;
591                 green>>=3;
592                 blue>>=3;
593                 *backbuffer++=(red<<10)|(green<<5)|blue;
594                 current_line_buffer+=4;
595                 width--;
596         }
597 }
598
599 void tom_render_16bpp_direct_stretch_scanline(int16 *backbuffer)
600 {
601         uint16 width=tom_width;
602         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
603         
604         while (width)
605         {
606                 uint16 color=*current_line_buffer++;
607                 color<<=8;
608                 color|=*current_line_buffer++;
609                 color>>=1;
610                 *backbuffer++=color;
611                 current_line_buffer+=2;
612                 width--;
613         }
614 }
615
616 void tom_render_16bpp_rgb_stretch_scanline(int16 *backbuffer)
617 {
618         uint16 width=tom_width;
619         uint8 *current_line_buffer=(uint8*)&tom_ram_8[0x1800];
620         
621         while (width)
622         {
623                 uint16 color1=*current_line_buffer++;
624                 color1<<=8;
625                 color1|=*current_line_buffer++;
626                 color1>>=1;
627                 uint16 color2=*current_line_buffer++;
628                 color2<<=8;
629                 color2|=*current_line_buffer++;
630                 color2>>=1;
631                 uint16 red=(((color1&0x7c00)>>10)+((color2&0x7c00)>>10))>>1;
632                 uint16 green=(((color1&0x00003e0)>>5)+((color2&0x00003e0)>>5))>>1;
633                 uint16 blue=(((color1&0x0000001f))+((color2&0x0000001f)))>>1;
634
635                 color1=(red<<10)|(blue<<5)|green;
636                 *backbuffer++=color1;
637                 width--;
638         }
639 }
640
641 //
642 // Process a single scanline
643 //
644 void tom_exec_scanline(int16 * backbuffer, int32 scanline, bool render)
645 {
646         if (render)
647         {
648                 uint8 * current_line_buffer = (uint8 *)&tom_ram_8[0x1800];
649                 uint8 bgHI = tom_ram_8[BG], bgLO = tom_ram_8[BG + 1];
650
651                 // Clear line buffer with BG
652                 if (GET16(tom_ram_8, VMODE) & BGEN) // && (CRY or RGB16)...
653                         for(uint32 i=0; i<720; i++)
654                                 *current_line_buffer++ = bgHI, *current_line_buffer++ = bgLO;
655
656                 OPProcessList(scanline, render);
657                 scanline_render[tom_getVideoMode()](backbuffer);
658         }
659 }
660
661 uint32 TOMGetSDLScreenPitch(void)
662 {
663         extern SDL_Surface * surface;
664
665         return surface->pitch;
666 }
667
668 //
669 // TOM initialization
670 //
671 void tom_init(void)
672 {
673         op_init();
674         blitter_init();
675 //This should be done by JERRY! pcm_init();
676         memory_malloc_secure((void **)&tom_ram_8, 0x4000, "TOM RAM");
677         tom_reset();
678         // Setup the non-stretchy scanline rendering...
679         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
680         tom_calc_cry_rgb_mix_lut();
681 }
682
683 void tom_done(void)
684 {
685         op_done();
686 //This should be done by JERRY! pcm_done();
687         blitter_done();
688         WriteLog("TOM: Resolution %i x %i %s\n", tom_getVideoModeWidth(), tom_getVideoModeHeight(),
689                 videoMode_to_str[tom_getVideoMode()]);
690 //      WriteLog("\ntom: object processor:\n");
691 //      WriteLog("tom: pointer to object list: 0x%.8x\n",op_get_list_pointer());
692 //      WriteLog("tom: INT1=0x%.2x%.2x\n",TOMReadByte(0xf000e0),TOMReadByte(0xf000e1));
693 //      gpu_done();
694 //      dsp_done();
695         memory_free(tom_ram_8);
696 }
697
698 /*uint32 tom_getHBlankWidthInPixels(void)
699 {
700         return hblankWidthInPixels;
701 }*/
702
703 uint32 tom_getVideoModeWidth(void)
704 {
705         //These widths are pretty bogus. Should use HDB1/2 & HDE/HBB & PWIDTH to calc the width...
706         uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 166 };
707 //Temporary, for testing Doom...
708 //      uint32 width[8] = { 1330, 665, 443, 332, 266, 222, 190, 332 };
709
710         // Note that the following PWIDTH values have the following pixel aspect ratios:
711         // PWIDTH = 1 -> 0.25:1 pixels (X:Y ratio)
712         // PWIDTH = 2 -> 0.50:1 pixels
713         // PWIDTH = 3 -> 0.75:1 pixels
714         // PWIDTH = 4 -> 1.00:1 pixels
715         // PWIDTH = 5 -> 1.25:1 pixels
716         // PWIDTH = 6 -> 1.50:1 pixels
717         // PWIDTH = 7 -> 1.75:1 pixels
718         // PWIDTH = 8 -> 2.00:1 pixels
719
720         // Also note that the JTRM says that PWIDTH of 4 gives pixels that are "about" square--
721         // this implies that the other modes have pixels that are *not* square!
722         // Also, I seriously doubt that you will see any games that use PWIDTH = 1!
723
724         // NOTE: Even though the PWIDTH value is + 1, here we're using a zero-based index and
725         //       so we don't bother to add one...
726 //      return width[(GET16(tom_ram_8, VMODE) & PWIDTH) >> 9];
727
728         // Now, we just calculate it...
729         uint16 hdb1 = GET16(tom_ram_8, HDB1), hde = GET16(tom_ram_8, HDE),
730                 hbb = GET16(tom_ram_8, HBB), pwidth = ((GET16(tom_ram_8, VMODE) & PWIDTH) >> 9) + 1;
731         return ((hbb < hde ? hbb : hde) - hdb1) / pwidth;
732
733 // More speculating...
734 // According to the JTRM, the number of potential pixels across is given by the
735 // Horizontal Period (HP - in NTSC this is 845). The Horizontal Count counts from
736 // zero to this value twice per scanline (the high bit is set on the second count).
737 // HBE and HBB define the absolute "black" limits of the screen, while HDB1/2 and
738 // HDE determine the extent of the OP "on" time. I.e., when the OP is turned on by
739 // HDB1, it starts fetching the line from position 0 in LBUF.
740
741 // The trick, it would seem, is to figure out how long the typical visible scanline
742 // of a TV is in HP ticks and limit the visible area to that (divided by PWIDTH, of
743 // course). Using that length, we can establish an "absolute left display limit" with
744 // which to measure HBB & HDB1/2 against when rendering LBUF (i.e., if HDB1 is 20 ticks
745 // to the right of the ALDL and PWIDTH is 4, then start writing the LBUF starting at
746 // backbuffer + 5 pixels).
747 }
748
749 // *** SPECULATION ***
750 // It might work better to virtualize the height settings, i.e., set the vertical
751 // height at 240 lines and clip using the VDB and VDE/VP registers...
752 // Same with the width...
753
754 uint32 tom_getVideoModeHeight(void)
755 {
756 //      uint16 vmode = GET16(tom_ram_8, VMODE);
757         uint16 vbe = GET16(tom_ram_8, VBE);
758         uint16 vbb = GET16(tom_ram_8, VBB);
759 //      uint16 vdb = GET16(tom_ram_8, VDB);
760 //      uint16 vde = GET16(tom_ram_8, VDE);
761 //      uint16 vp = GET16(tom_ram_8, VP);
762         
763 /*      if (vde == 0xFFFF)
764                 vde = vbb;//*/
765
766 //      return 227;//WAS:(vde/*-vdb*/) >> 1;
767         // The video mode height probably works this way:
768         // VC counts from 0 to VP. VDB starts the OP. Either when
769         // VDE is reached or VP, the OP is stopped. Let's try it...
770         // Also note that we're conveniently ignoring interlaced display modes...!
771 //      return ((vde > vp ? vp : vde) - vdb) >> 1;
772 //      return ((vde > vbb ? vbb : vde) - vdb) >> 1;
773 //Let's try from the Vertical Blank interval...
774 //Seems to work OK!
775         return (vbb - vbe) >> 1;        // Again, doesn't take interlacing into account...
776 }
777
778 //
779 // TOM reset code
780 // Now PAL friendly!
781 //
782 void tom_reset(void)
783 {
784         extern bool hardwareTypeNTSC;
785
786         op_reset();
787         blitter_reset();
788 //This should be done by JERRY!         pcm_reset();
789
790         memset(tom_ram_8, 0x00, 0x4000);
791
792         if (hardwareTypeNTSC)
793         {
794                 SET16(tom_ram_8, MEMCON1, 0x1861);
795                 SET16(tom_ram_8, MEMCON2, 0x35CC);
796                 SET16(tom_ram_8, HP, 844);                                      // Horizontal Period (1-based; HP=845)
797                 SET16(tom_ram_8, HBB, 1713);                            // Horizontal Blank Begin
798                 SET16(tom_ram_8, HBE, 125);                                     // Horizontal Blank End
799                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
800                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
801                 SET16(tom_ram_8, VP, 523);                                      // Vertical Period (1-based; in this case VP = 524)
802                 SET16(tom_ram_8, VBE, 24);                                      // Vertical Blank End
803                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
804                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
805                 SET16(tom_ram_8, VBB, 500);                                     // Vertical Blank Begin
806                 SET16(tom_ram_8, VS, 517);                                      // Vertical Sync
807                 SET16(tom_ram_8, VMODE, 0x06C1);
808         }
809         else    // PAL Jaguar
810         {
811                 SET16(tom_ram_8, MEMCON1, 0x1861);
812                 SET16(tom_ram_8, MEMCON2, 0x35CC);
813                 SET16(tom_ram_8, HP, 850);                                      // Horizontal Period
814                 SET16(tom_ram_8, HBB, 1711);                            // Horizontal Blank Begin
815                 SET16(tom_ram_8, HBE, 158);                                     // Horizontal Blank End
816                 SET16(tom_ram_8, HDE, 1665);                            // Horizontal Display End
817                 SET16(tom_ram_8, HDB1, 203);                            // Horizontal Display Begin 1
818                 SET16(tom_ram_8, VP, 623);                                      // Vertical Period (1-based; in this case VP = 624)
819                 SET16(tom_ram_8, VBE, 34);                                      // Vertical Blank End
820                 SET16(tom_ram_8, VDB, 38);                                      // Vertical Display Begin
821                 SET16(tom_ram_8, VDE, 518);                                     // Vertical Display End
822                 SET16(tom_ram_8, VBB, 600);                                     // Vertical Blank Begin
823                 SET16(tom_ram_8, VS, 618);                                      // Vertical Sync
824                 SET16(tom_ram_8, VMODE, 0x06C1);
825         }
826
827         tom_width = tom_real_internal_width = 0;
828         tom_height = 0;
829 //      tom_scanline = 0;
830
831 //This is WRONG
832 //      hblankWidthInPixels = GET16(tom_ram_8, HDB1) >> 1;
833
834         tom_jerry_int_pending = 0;
835         tom_timer_int_pending = 0;
836         tom_object_int_pending = 0;
837         tom_gpu_int_pending = 0;
838         tom_video_int_pending = 0;
839
840         tom_timer_prescaler = 0;
841         tom_timer_divider = 0;
842         tom_timer_counter = 0;
843         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));
844 }
845
846 //
847 // TOM byte access (read)
848 //
849 uint8 TOMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
850 {
851 //???Is this needed???
852 // It seems so. Perhaps it's the +$8000 offset being written to (32-bit interface)?
853 // However, the 32-bit interface is WRITE ONLY, so that can't be it...
854 // Also, the 68K CANNOT make use of the 32-bit interface, since its bus width is only 16-bits...
855 //      offset &= 0xFF3FFF;
856
857 #ifdef TOM_DEBUG
858         WriteLog("TOM: Reading byte at %06X\n", offset);
859 #endif
860
861         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
862                 return GPUReadByte(offset, who);
863         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
864                 return GPUReadByte(offset, who);
865         else if ((offset >= 0xF00010) && (offset < 0xF00028))
866                 return OPReadByte(offset, who);
867         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
868                 return BlitterReadByte(offset, who);
869         else if (offset == 0xF00050)
870                 return tom_timer_prescaler >> 8;
871         else if (offset == 0xF00051)
872                 return tom_timer_prescaler & 0xFF;
873         else if (offset == 0xF00052)
874                 return tom_timer_divider >> 8;
875         else if (offset == 0xF00053)
876                 return tom_timer_divider & 0xFF;
877
878         return tom_ram_8[offset & 0x3FFF];
879 }
880
881 //
882 // TOM word access (read)
883 //
884 uint16 TOMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
885 {
886 //???Is this needed???
887 //      offset &= 0xFF3FFF;
888 #ifdef TOM_DEBUG
889         WriteLog("TOM: Reading word at %06X\n", offset);
890 #endif
891 if (offset >= 0xF02000 && offset <= 0xF020FF)
892         WriteLog("TOM: Read attempted from GPU register file by %s (unimplemented)!\n", whoName[who]);
893
894         if (offset == 0xF000E0)
895         {
896                 uint16 data = (tom_jerry_int_pending << 4) | (tom_timer_int_pending << 3)
897                         | (tom_object_int_pending << 2) | (tom_gpu_int_pending << 1)
898                         | (tom_video_int_pending << 0);
899                 //WriteLog("tom: interrupt status is 0x%.4x \n",data);
900                 return data;
901         }
902 //Shoud be handled by the jaguar main loop now... And it is! ;-)
903 /*      else if (offset == 0xF00006)    // VC
904         // What if we're in interlaced mode?
905         // According to docs, in non-interlace mode VC is ALWAYS even...
906 //              return (tom_scanline << 1);// + 1;
907 //But it's causing Rayman to be fucked up... Why???
908 //Because VC is even in NI mode when calling the OP! That's why!
909                 return (tom_scanline << 1) + 1;//*/
910         else if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
911                 return GPUReadWord(offset, who);
912         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
913                 return GPUReadWord(offset, who);
914         else if ((offset >= 0xF00010) && (offset < 0xF00028))
915                 return OPReadWord(offset, who);
916         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
917                 return BlitterReadWord(offset, who);
918         else if (offset == 0xF00050)
919                 return tom_timer_prescaler;
920         else if (offset == 0xF00052)
921                 return tom_timer_divider;
922
923         offset &= 0x3FFF;
924         return (TOMReadByte(offset, who) << 8) | TOMReadByte(offset + 1, who);
925 }
926
927 //
928 // TOM byte access (write)
929 //
930 void TOMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
931 {
932 //???Is this needed???
933 // Perhaps on the writes--32-bit writes that is! And masked with FF7FFF...
934         offset &= 0xFF3FFF;
935
936 #ifdef TOM_DEBUG
937         WriteLog("TOM: Writing byte %02X at %06X\n", data, offset);
938 #endif
939
940         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
941         {
942                 GPUWriteByte(offset, data, who);
943                 return;
944         }
945         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
946         {
947                 GPUWriteByte(offset, data, who);
948                 return;
949         }
950         else if ((offset >= 0xF00010) && (offset < 0xF00028))
951         {
952                 OPWriteByte(offset, data, who);
953                 return;
954         }
955         else if ((offset >= 0xF02200) && (offset < 0xF022A0))
956         {
957                 BlitterWriteByte(offset, data, who);
958                 return;
959         }
960         else if (offset == 0xF00050)
961         {
962                 tom_timer_prescaler = (tom_timer_prescaler & 0x00FF) | (data << 8);
963                 tom_reset_timer();
964                 return;
965         }
966         else if (offset == 0xF00051)
967         {
968                 tom_timer_prescaler = (tom_timer_prescaler & 0xFF00) | data;
969                 tom_reset_timer();
970                 return;
971         }
972         else if (offset == 0xF00052)
973         {
974                 tom_timer_divider = (tom_timer_divider & 0x00FF) | (data << 8);
975                 tom_reset_timer();
976                 return;
977         }
978         else if (offset == 0xF00053)
979         {
980                 tom_timer_divider = (tom_timer_divider & 0xFF00) | data;
981                 tom_reset_timer();
982                 return;
983         }
984         else if (offset >= 0xF00400 && offset <= 0xF007FF)      // CLUT (A & B)
985         {
986                 // Writing to one CLUT writes to the other
987                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
988                 tom_ram_8[offset] = data, tom_ram_8[offset + 0x200] = data;
989         }
990
991         tom_ram_8[offset & 0x3FFF] = data;
992 }
993
994 //
995 // TOM word access (write)
996 //
997 void TOMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
998 {
999 //???Is this needed???
1000         offset &= 0xFF3FFF;
1001
1002 #ifdef TOM_DEBUG
1003         WriteLog("TOM: Writing word %04X at %06X\n", data, offset);
1004 #endif
1005 if (offset == 0xF00000 + MEMCON1)
1006         WriteLog("TOM: Memory Configuration 1 written by %s: %04X\n", whoName[who], data);
1007 if (offset == 0xF00000 + MEMCON2)
1008         WriteLog("TOM: Memory Configuration 2 written by %s: %04X\n", whoName[who], data);
1009 if (offset >= 0xF02000 && offset <= 0xF020FF)
1010         WriteLog("TOM: Write attempted to GPU register file by %s (unimplemented)!\n", whoName[who]);
1011
1012         if ((offset >= GPU_CONTROL_RAM_BASE) && (offset < GPU_CONTROL_RAM_BASE+0x20))
1013         {
1014                 GPUWriteWord(offset, data, who);
1015                 return;
1016         }
1017         else if ((offset >= GPU_WORK_RAM_BASE) && (offset < GPU_WORK_RAM_BASE+0x1000))
1018         {
1019                 GPUWriteWord(offset, data, who);
1020                 return;
1021         }
1022 //What's so special about this?
1023 /*      else if ((offset >= 0xF00000) && (offset < 0xF00002))
1024         {
1025                 TOMWriteByte(offset, data >> 8);
1026                 TOMWriteByte(offset+1, data & 0xFF);
1027         }*/
1028         else if ((offset >= 0xF00010) && (offset < 0xF00028))
1029         {
1030                 OPWriteWord(offset, data, who);
1031                 return;
1032         }
1033         else if (offset == 0xF00050)
1034         {
1035                 tom_timer_prescaler = data;
1036                 tom_reset_timer();
1037                 return;
1038         }
1039         else if (offset == 0xF00052)
1040         {
1041                 tom_timer_divider = data;
1042                 tom_reset_timer();
1043                 return;
1044         }
1045         else if (offset == 0xF000E0)
1046         {
1047 //Check this out...
1048                 if (data & 0x0100)
1049                         tom_video_int_pending = 0;
1050                 if (data & 0x0200)
1051                         tom_gpu_int_pending = 0;
1052                 if (data & 0x0400)
1053                         tom_object_int_pending = 0;
1054                 if (data & 0x0800)
1055                         tom_timer_int_pending = 0;
1056                 if (data & 0x1000)
1057                         tom_jerry_int_pending = 0;
1058         }
1059         else if ((offset >= 0xF02200) && (offset <= 0xF0229F))
1060         {
1061                 BlitterWriteWord(offset, data, who);
1062                 return;
1063         }
1064         else if (offset >= 0xF00400 && offset <= 0xF007FE)      // CLUT (A & B)
1065         {
1066                 // Writing to one CLUT writes to the other
1067                 offset &= 0x5FF;                // Mask out $F00600 (restrict to $F00400-5FF)
1068 // Watch out for unaligned writes here! (Not fixed yet)
1069                 SET16(tom_ram_8, offset, data), SET16(tom_ram_8, offset + 0x200, data);
1070         }
1071
1072         offset &= 0x3FFF;
1073         if (offset == 0x28)                     // VMODE (Why? Why not OBF?)
1074                 objectp_running = 1;
1075
1076         if (offset >= 0x30 && offset <= 0x4E)
1077                 data &= 0x07FF;                 // These are (mostly) 11-bit registers
1078         if (offset == 0x2E || offset == 0x36 || offset == 0x54)
1079                 data &= 0x03FF;                 // These are all 10-bit registers
1080
1081         TOMWriteByte(offset, data >> 8, who);
1082         TOMWriteByte(offset+1, data & 0xFF, who);
1083
1084 if (offset == VDB)
1085         WriteLog("TOM: Vertical Display Begin written by %s: %u\n", whoName[who], data);
1086 if (offset == VDE)
1087         WriteLog("TOM: Vertical Display End written by %s: %u\n", whoName[who], data);
1088 if (offset == VP)
1089         WriteLog("TOM: Vertical Period written by %s: %u (%sinterlaced)\n", whoName[who], data, (data & 0x01 ? "non-" : ""));
1090 if (offset == HDB1)
1091         WriteLog("TOM: Horizontal Display Begin 1 written by %s: %u\n", whoName[who], data);
1092 if (offset == HDE)
1093         WriteLog("TOM: Horizontal Display End written by %s: %u\n", whoName[who], data);
1094 if (offset == HP)
1095         WriteLog("TOM: Horizontal Period written by %s: %u (+1*2 = %u)\n", whoName[who], data, (data + 1) * 2);
1096 if (offset == VBB)
1097         WriteLog("TOM: Vertical Blank Begin written by %s: %u\n", whoName[who], data);
1098 if (offset == VBE)
1099         WriteLog("TOM: Vertical Blank End written by %s: %u\n", whoName[who], data);
1100 if (offset == VS)
1101         WriteLog("TOM: Vertical Sync written by %s: %u\n", whoName[who], data);
1102 if (offset == VI)
1103         WriteLog("TOM: Vertical Interrupt written by %s: %u\n", whoName[who], data);
1104 if (offset == HBB)
1105         WriteLog("TOM: Horizontal Blank Begin written by %s: %u\n", whoName[who], data);
1106 if (offset == HBE)
1107         WriteLog("TOM: Horizontal Blank End written by %s: %u\n", whoName[who], data);
1108 if (offset == VMODE)
1109         WriteLog("TOM: Video Mode written by %s: %04X. PWIDTH = %u, MODE = %s, flags:%s%s (VC = %u)\n", whoName[who], data, ((data >> 9) & 0x07) + 1, videoMode_to_str[(data & MODE) >> 1], (data & BGEN ? " BGEN" : ""), (data & VARMOD ? " VARMOD" : ""), GET16(tom_ram_8, VC));
1110 /*#define   MODE                0x0006          // Line buffer to video generator mode
1111 #define   BGEN          0x0080          // Background enable (CRY & RGB16 only)
1112 #define   VARMOD        0x0100          // Mixed CRY/RGB16 mode
1113 #define   PWIDTH        0x0E00          // Pixel width in video clock cycles (value written + 1)*/
1114
1115         // detect screen resolution changes
1116 //This may go away in the future, if we do the virtualized screen thing...
1117         if ((offset >= 0x28) && (offset <= 0x4F))
1118         {
1119                 uint32 width = tom_getVideoModeWidth(), height = tom_getVideoModeHeight();
1120                 tom_real_internal_width = width;
1121
1122 //This looks like an attempt to render non-square pixels (though wrong...)
1123 /*              if (width == 640)
1124                 {
1125                         memcpy(scanline_render, scanline_render_stretch, sizeof(scanline_render));
1126                         width = 320;
1127                 }
1128                 else
1129                         memcpy(scanline_render, scanline_render_normal, sizeof(scanline_render));//*/
1130                 
1131                 if ((width != tom_width) || (height != tom_height))
1132                 {
1133                         extern SDL_Surface * surface, * mainSurface;
1134                         extern Uint32 mainSurfaceFlags;
1135                         static char window_title[256];
1136                         
1137                         tom_width = width, tom_height = height;
1138                         SDL_FreeSurface(surface);
1139                         surface = SDL_CreateRGBSurface(SDL_SWSURFACE, tom_width, tom_height,
1140                                 16, 0x7C00, 0x03E0, 0x001F, 0);
1141                         if (surface == NULL)
1142                         {
1143                                 WriteLog("TOM: Could not create primary SDL surface: %s", SDL_GetError());
1144                                 exit(1);
1145                         }
1146
1147                         sprintf(window_title, "Virtual Jaguar (%i x %i)", (int)tom_width, (int)tom_height);
1148 //???Should we do this??? No!
1149 //      SDL_FreeSurface(mainSurface);
1150                         mainSurface = SDL_SetVideoMode(tom_width, tom_height, 16, mainSurfaceFlags);
1151
1152                         if (mainSurface == NULL)
1153                         {
1154                                 WriteLog("Joystick: SDL is unable to set the video mode: %s\n", SDL_GetError());
1155                                 exit(1);
1156                         }
1157
1158                         SDL_WM_SetCaption(window_title, window_title);
1159                 }
1160         }
1161 }
1162
1163 int tom_irq_enabled(int irq)
1164 {
1165         // This is the correct byte in big endian... D'oh!
1166 //      return jaguar_byte_read(0xF000E1) & (1 << irq);
1167         return tom_ram_8[INT1 + 1/*0xE1*/] & (1 << irq);
1168 }
1169
1170 //unused
1171 /*void tom_set_irq_latch(int irq, int enabled)
1172 {
1173         tom_ram_8[0xE0] = (tom_ram_8[0xE0] & (~(1<<irq))) | (enabled ? (1<<irq) : 0);
1174 }*/
1175
1176 //unused
1177 /*uint16 tom_irq_control_reg(void)
1178 {
1179         return (tom_ram_8[0xE0] << 8) | tom_ram_8[0xE1];
1180 }*/
1181
1182 void tom_reset_timer(void)
1183 {
1184         if (!tom_timer_prescaler || !tom_timer_divider)
1185                 tom_timer_counter = 0;
1186         else
1187 //Probably should *add* this amount to the counter to retain cycle accuracy! !!! FIX !!!
1188 //Also, why +1???
1189                 tom_timer_counter = (1 + tom_timer_prescaler) * (1 + tom_timer_divider);
1190 //      WriteLog("tom: reseting timer to 0x%.8x (%i)\n",tom_timer_counter,tom_timer_counter);
1191 }
1192
1193 //
1194 // TOM Programmable Interrupt Timer handler
1195 //
1196 void tom_pit_exec(uint32 cycles)
1197 {
1198         if (tom_timer_counter > 0)
1199         {
1200                 tom_timer_counter -= cycles;
1201
1202                 if (tom_timer_counter <= 0)
1203                 {
1204                         tom_set_pending_timer_int();
1205                         GPUSetIRQLine(GPUIRQ_TIMER, ASSERT_LINE);
1206                         if (tom_irq_enabled(IRQ_TIMER) && jaguar_interrupt_handler_is_valid(64))
1207                                 m68k_set_irq(7);                                // Cause a 68000 NMI...
1208
1209                         tom_reset_timer();
1210                 }
1211         }
1212 }
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