2 // MEMORY.H: Header file
4 // All Jaguar related memory and I/O locations are contained in this file
12 extern uint8 jagMemSpace[];
14 extern uint8 * jaguarMainRAM;
15 extern uint8 * jaguarMainROM;
16 extern uint8 jaguarBootROM[];
17 extern uint8 jaguarCDBootROM[];
18 extern uint8 * gpuRAM;
19 extern uint8 * dspRAM;
22 extern uint32 & butch, & dscntrl;
23 extern uint16 & ds_data;
24 extern uint32 & i2cntrl, & sbcntrl, & subdata, & subdatb, & sb_time, & fifo_data, & i2sdat2, & unknown;
26 extern uint32 butch, dscntrl, ds_data, i2cntrl, sbcntrl, subdata, subdatb, sb_time, fifo_data, i2sdat2, unknown;
29 extern uint16 & memcon1, & memcon2, & hc, & vc, & lph, & lpv;
30 extern uint64 & obData;
32 extern uint16 & obf, & vmode, & bord1, & bord2, & hp, & hbb, & hbe, & hs,
33 & hvs, & hdb1, & hdb2, & hde, & vp, & vbb, & vbe, & vs, & vdb, & vde,
34 & veb, & vee, & vi, & pit0, & pit1, & heq;
36 extern uint16 & int1, & int2;
37 extern uint8 * clut, * lbuf;
38 extern uint32 & g_flags, & g_mtxc, & g_mtxa, & g_end, & g_pc, & g_ctrl,
39 & g_hidata, & g_divctrl;
40 extern uint32 g_remain;
41 extern uint32 & a1_base, & a1_flags, & a1_clip, & a1_pixel, & a1_step,
42 & a1_fstep, & a1_fpixel, & a1_inc, & a1_finc, & a2_base, & a2_flags,
43 & a2_mask, & a2_pixel, & a2_step, & b_cmd, & b_count;
44 extern uint64 & b_srcd, & b_dstd, & b_dstz, & b_srcz1, & b_srcz2, & b_patd;
45 extern uint32 & b_iinc, & b_zinc, & b_stop, & b_i3, & b_i2, & b_i1, & b_i0, & b_z3,
46 & b_z2, & b_z1, & b_z0;
47 extern uint16 & jpit1, & jpit2, & jpit3, & jpit4, & clk1, & clk2, & clk3, & j_int,
49 extern uint16 asistat;
50 extern uint16 & asiclk, & joystick, & joybuts;
51 extern uint32 & d_flags, & d_mtxc, & d_mtxa, & d_end, & d_pc, & d_ctrl,
53 extern uint32 d_remain;
54 extern uint32 & d_machi;
55 extern uint16 & ltxd, lrxd, & rtxd, rrxd;
56 extern uint8 & sclk, sstat;
57 extern uint32 & smode;
59 uint16 & ltxd = *((uint16 *)&jagMemSpace[0xF1A148]);
60 uint16 lrxd; // Dual register with $F1A148
61 uint16 & rtxd = *((uint16 *)&jagMemSpace[0xF1A14C]);
62 uint16 rrxd; // Dual register with $F1A14C
63 uint8 & sclk = *((uint8 *) &jagMemSpace[0xF1A150]);
64 uint8 sstat; // Dual register with $F1A150
65 uint32 & smode = *((uint32 *)&jagMemSpace[0xF1A154]);
68 // Read/write tracing enumeration
70 enum { UNKNOWN, JAGUAR, DSP, GPU, TOM, JERRY, M68K, BLITTER, OP };
71 extern const char * whoName[9];
73 // Some handy macros to help converting native endian to big endian (jaguar native)
76 #define SET64(r, a, v) r[(a)] = ((v) & 0xFF00000000000000) >> 56, r[(a)+1] = ((v) & 0x00FF000000000000) >> 48, \
77 r[(a)+2] = ((v) & 0x0000FF0000000000) >> 40, r[(a)+3] = ((v) & 0x000000FF00000000) >> 32, \
78 r[(a)+4] = ((v) & 0xFF000000) >> 24, r[(a)+5] = ((v) & 0x00FF0000) >> 16, \
79 r[(a)+6] = ((v) & 0x0000FF00) >> 8, r[(a)+7] = (v) & 0x000000FF
80 #define GET64(r, a) (((uint64)r[(a)] << 56) | ((uint64)r[(a)+1] << 48) | \
81 ((uint64)r[(a)+2] << 40) | ((uint64)r[(a)+3] << 32) | \
82 ((uint64)r[(a)+4] << 24) | ((uint64)r[(a)+5] << 16) | \
83 ((uint64)r[(a)+6] << 8) | (uint64)r[(a)+7])
84 #define SET32(r, a, v) r[(a)] = ((v) & 0xFF000000) >> 24, r[(a)+1] = ((v) & 0x00FF0000) >> 16, \
85 r[(a)+2] = ((v) & 0x0000FF00) >> 8, r[(a)+3] = (v) & 0x000000FF
86 #define GET32(r, a) ((r[(a)] << 24) | (r[(a)+1] << 16) | (r[(a)+2] << 8) | r[(a)+3])
87 #define SET16(r, a, v) r[(a)] = ((v) & 0xFF00) >> 8, r[(a)+1] = (v) & 0xFF
88 #define GET16(r, a) ((r[(a)] << 8) | r[(a)+1])
90 // This is GCC specific, but we can fix that if we need to...
91 // Big plus of this approach is that these compile down to single instructions on little
92 // endian machines while one big endian machines we don't have any overhead. :-)
97 #if __BYTE_ORDER == __LITTLE_ENDIAN
98 #define ESAFE16(x) bswap_16(x)
99 #define ESAFE32(x) bswap_32(x)
100 #define ESAFE64(x) bswap_64(x)
102 #define ESAFE16(x) (x)
103 #define ESAFE32(x) (x)
104 #define ESAFE64(x) (x)
107 #endif // __MEMORY_H__