2 // m68kinterface.c: Code interface to the UAE 68000 core and support code
5 // (C) 2011 Underground Software
7 // JLH = James Hammons <jlhamm@acm.org>
10 // --- ---------- -------------------------------------------------------------
11 // JLH 10/28/2011 Created this file ;-)
14 #include "m68kinterface.h"
21 // Exception Vectors handled by emulation
22 #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
23 #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
24 #define EXCEPTION_ILLEGAL_INSTRUCTION 4
25 #define EXCEPTION_ZERO_DIVIDE 5
26 #define EXCEPTION_CHK 6
27 #define EXCEPTION_TRAPV 7
28 #define EXCEPTION_PRIVILEGE_VIOLATION 8
29 #define EXCEPTION_TRACE 9
30 #define EXCEPTION_1010 10
31 #define EXCEPTION_1111 11
32 #define EXCEPTION_FORMAT_ERROR 14
33 #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
34 #define EXCEPTION_SPURIOUS_INTERRUPT 24
35 #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
36 #define EXCEPTION_TRAP_BASE 32
38 // These are found in obj/cpustbl.c (generated by gencpu)
40 //extern const struct cputbl op_smalltbl_0_ff[]; /* 68040 */
41 //extern const struct cputbl op_smalltbl_1_ff[]; /* 68020 + 68881 */
42 //extern const struct cputbl op_smalltbl_2_ff[]; /* 68020 */
43 //extern const struct cputbl op_smalltbl_3_ff[]; /* 68010 */
44 extern const struct cputbl op_smalltbl_4_ff[]; /* 68000 */
45 extern const struct cputbl op_smalltbl_5_ff[]; /* 68000 slow but compatible. */
47 // Externs, supplied by the user...
48 extern int irq_ack_handler(int);
50 // Function prototypes...
51 STATIC_INLINE void m68ki_check_interrupts(void);
52 void m68ki_exception_interrupt(uint32_t intLevel);
53 STATIC_INLINE uint32_t m68ki_init_exception(void);
54 STATIC_INLINE void m68ki_stack_frame_3word(uint32_t pc, uint32_t sr);
55 unsigned long IllegalOpcode(uint32_t opcode);
56 void BuildCPUFunctionTable(void);
58 // Local "Global" vars
59 static int32_t initialCycles;
60 cpuop_func * cpuFunctionTable[65536];
64 #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
65 #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
66 #define SET_CYCLES(A) m68ki_remaining_cycles = A
67 #define GET_CYCLES() m68ki_remaining_cycles
68 #define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
70 #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
71 #define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
72 #define CPU_STOPPED m68ki_cpu.stopped
73 #define CPU_PREF_ADDR m68ki_cpu.pref_addr
74 #define CPU_PREF_DATA m68ki_cpu.pref_data
75 #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
76 #define CPU_SR_MASK m68ki_cpu.sr_mask
80 void Dasm(uint32_t offset, uint32_t qt)
83 // back up a few instructions...
85 static char buffer[2048];//, mem[64];
86 int pc = offset, oldpc;
92 for(int j=0; j<64; j++)
93 mem[j^0x01] = jaguar_byte_read(pc + j);
95 pc += Dasm68000((char *)mem, buffer, 0);
96 WriteLog("%08X: %s\n", oldpc, buffer);//*/
98 pc += m68k_disassemble(buffer, pc, 0);//M68K_CPU_TYPE_68000);
99 // WriteLog("%08X: %s\n", oldpc, buffer);//*/
100 printf("%08X: %s\n", oldpc, buffer);//*/
106 void DumpRegisters(void)
112 printf("%s%i: %08X ", (i < 8 ? "D" : "A"), i & 0x7, regs.regs[i]);
121 void m68k_set_cpu_type(unsigned int type)
125 // Pulse the RESET line on the CPU
126 void m68k_pulse_reset(void)
128 static uint32_t emulation_initialized = 0;
130 // The first call to this function initializes the opcode handler jump table
131 if (!emulation_initialized)
134 m68ki_build_opcode_table();
135 m68k_set_int_ack_callback(NULL);
136 m68k_set_bkpt_ack_callback(NULL);
137 m68k_set_reset_instr_callback(NULL);
138 m68k_set_pc_changed_callback(NULL);
139 m68k_set_fc_callback(NULL);
140 m68k_set_instr_hook_callback(NULL);
142 // Build opcode handler table here...
145 BuildCPUFunctionTable();
147 emulation_initialized = 1;
150 // if (CPU_TYPE == 0) /* KW 990319 */
151 // m68k_set_cpu_type(M68K_CPU_TYPE_68000);
154 /* Clear all stop levels and eat up all remaining cycles */
158 /* Turn off tracing */
159 FLAG_T1 = FLAG_T0 = 0;
161 /* Interrupt mask to level 7 */
162 FLAG_INT_MASK = 0x0700;
165 /* Go to supervisor mode */
166 m68ki_set_sm_flag(SFLAG_SET | MFLAG_CLEAR);
168 /* Invalidate the prefetch queue */
169 #if M68K_EMULATE_PREFETCH
170 /* Set to arbitrary number since our first fetch is from 0 */
171 CPU_PREF_ADDR = 0x1000;
172 #endif /* M68K_EMULATE_PREFETCH */
174 /* Read the initial stack pointer and program counter */
176 REG_SP = m68ki_read_imm_32();
177 REG_PC = m68ki_read_imm_32();
181 regs.remainingCycles = 0;
184 regs.s = 1; // Supervisor mode ON
186 // Read initial SP and PC
187 m68k_areg(regs, 7) = m68k_read_memory_32(0);
188 m68k_setpc(m68k_read_memory_32(4));
189 refill_prefetch(m68k_getpc(), 0);
193 int m68k_execute(int num_cycles)
196 /* Make sure we're not stopped */
199 /* We get here if the CPU is stopped or halted */
208 regs.remainingCycles = 0; // int32_t
209 regs.interruptCycles = 0; // uint32_t
216 /* Set our pool of clock cycles available */
217 SET_CYCLES(num_cycles);
218 m68ki_initial_cycles = num_cycles;
220 /* ASG: update cycles */
221 USE_CYCLES(CPU_INT_CYCLES);
224 /* Return point if we had an address error */
225 m68ki_set_address_error_trap(); /* auto-disable (see m68kcpu.h) */
227 regs.remainingCycles = num_cycles;
228 /*int32_t*/ initialCycles = num_cycles;
230 regs.remainingCycles -= regs.interruptCycles;
231 regs.interruptCycles = 0;
234 /* Main loop. Keep going until we run out of clock cycles */
238 /* Set tracing accodring to T1. (T0 is done inside instruction) */
239 m68ki_trace_t1(); /* auto-disable (see m68kcpu.h) */
241 /* Set the address space for reads */
242 m68ki_use_data_space(); /* auto-disable (see m68kcpu.h) */
244 /* Call external hook to peek at CPU */
245 m68ki_instr_hook(); /* auto-disable (see m68kcpu.h) */
247 /* Record previous program counter */
250 /* Read an instruction and call its handler */
251 REG_IR = m68ki_read_imm_16();
252 m68ki_instruction_jump_table[REG_IR]();
253 USE_CYCLES(CYC_INSTRUCTION[REG_IR]);
255 /* Trace m68k_exception, if necessary */
256 m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */
258 //Testing Hover Strike...
261 static int hitCount = 0;
262 static int inRoutine = 0;
265 //if (regs.pc == 0x80340A)
266 if (regs.pc == 0x803416)
271 printf("%i: $80340A start. A0=%08X, A1=%08X ", hitCount, regs.regs[8], regs.regs[9]);
273 else if (regs.pc == 0x803422)
276 printf("(%i instructions)\n", instSeen);
282 // AvP testing... (problem was: 32 bit addresses on 24 bit address cpu--FIXED)
286 if (regs.pc == 0x94BA)
292 if (regs.pc == 0x94C6)
295 // if (regs.regs[10] == 0xFFFFFFFF && go)
298 // printf("A2=-1, PC=%08X\n", regs.pc);
300 // Dasm(regs.pc, 130);
304 //94BA: 2468 0000 MOVEA.L (A0,$0000) == $0002328A, A2
305 //94BE: 200A MOVE.L A2, D0
306 //94C0: 6A02 BPL.B $94C4
307 //94C2: 2452 MOVEA.L (A2), A2 ; <--- HERE
308 //94C4: 4283 CLR.L D3
310 uint32_t opcode = get_iword(0);
311 //if ((opcode & 0xFFF8) == 0x31C0)
313 // printf("MOVE.W D%i, EA\n", opcode & 0x07);
315 int32_t cycles = (int32_t)(*cpuFunctionTable[opcode])(opcode);
316 regs.remainingCycles -= cycles;
317 //printf("Executed opcode $%04X (%i cycles)...\n", opcode, cycles);
321 while (GET_CYCLES() > 0);
323 while (regs.remainingCycles > 0);
327 /* set previous PC to current PC for the next entry into the loop */
330 /* ASG: update cycles */
331 USE_CYCLES(CPU_INT_CYCLES);
334 /* return how many clocks we used */
335 return m68ki_initial_cycles - GET_CYCLES();
337 regs.remainingCycles -= regs.interruptCycles;
338 regs.interruptCycles = 0;
340 // Return # of clock cycles used
341 return initialCycles - regs.remainingCycles;
345 /* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */
346 void m68k_set_irq(unsigned int intLevel)
349 uint old_level = CPU_INT_LEVEL;
350 CPU_INT_LEVEL = int_level << 8;
352 /* A transition from < 7 to 7 always interrupts (NMI) */
353 /* Note: Level 7 can also level trigger like a normal IRQ */
354 if(old_level != 0x0700 && CPU_INT_LEVEL == 0x0700)
355 m68ki_exception_interrupt(7); /* Edge triggered level 7 (NMI) */
357 m68ki_check_interrupts(); /* Level triggered (IRQ) */
359 int oldLevel = regs.intLevel;
360 regs.intLevel = intLevel;
362 // A transition from < 7 to 7 always interrupts (NMI)
363 // Note: Level 7 can also level trigger like a normal IRQ
364 if (oldLevel != 0x07 && regs.intLevel == 0x07)
365 m68ki_exception_interrupt(7); // Edge triggered level 7 (NMI)
367 m68ki_check_interrupts(); // Level triggered (IRQ)
371 // Check for interrupts
372 STATIC_INLINE void m68ki_check_interrupts(void)
375 if(CPU_INT_LEVEL > FLAG_INT_MASK)
376 m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
378 if (regs.intLevel > regs.intmask)
379 m68ki_exception_interrupt(regs.intLevel);
383 // Service an interrupt request and start exception processing
384 void m68ki_exception_interrupt(uint32_t intLevel)
391 /* Turn off the stopped state */
392 CPU_STOPPED &= ~STOP_LEVEL_STOP;
394 /* If we are halted, don't do anything */
398 /* Acknowledge the interrupt */
399 vector = m68ki_int_ack(int_level);
401 /* Get the interrupt vector */
402 if(vector == M68K_INT_ACK_AUTOVECTOR)
403 /* Use the autovectors. This is the most commonly used implementation */
404 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
405 else if(vector == M68K_INT_ACK_SPURIOUS)
406 /* Called if no devices respond to the interrupt acknowledge */
407 vector = EXCEPTION_SPURIOUS_INTERRUPT;
408 else if(vector > 255)
410 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
411 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
415 /* Start exception processing */
416 sr = m68ki_init_exception();
418 /* Set the interrupt mask to the level of the one being serviced */
419 FLAG_INT_MASK = int_level<<8;
422 new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
424 /* If vector is uninitialized, call the uninitialized interrupt vector */
426 new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
428 /* Generate a stack frame */
429 m68ki_stack_frame_0000(REG_PC, sr, vector);
431 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
433 /* Create throwaway frame */
434 m68ki_set_sm_flag(FLAG_S); /* clear M */
435 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
436 m68ki_stack_frame_0001(REG_PC, sr, vector);
441 /* Defer cycle counting until later */
442 CPU_INT_CYCLES += CYC_EXCEPTION[vector];
444 #if !M68K_EMULATE_INT_ACK
445 /* Automatically clear IRQ if we are not using an acknowledge scheme */
447 #endif /* M68K_EMULATE_INT_ACK */
449 // Turn off the stopped state
452 //JLH: need to add halt state?
453 // If we are halted, don't do anything
457 // Acknowledge the interrupt (NOTE: This is a user supplied function!)
458 uint32_t vector = irq_ack_handler(intLevel);
460 // Get the interrupt vector
461 if (vector == M68K_INT_ACK_AUTOVECTOR)
462 // Use the autovectors. This is the most commonly used implementation
463 vector = EXCEPTION_INTERRUPT_AUTOVECTOR + intLevel;
464 else if (vector == M68K_INT_ACK_SPURIOUS)
465 // Called if no devices respond to the interrupt acknowledge
466 vector = EXCEPTION_SPURIOUS_INTERRUPT;
467 else if (vector > 255)
469 // M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
470 // m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
474 // Start exception processing
475 uint32_t sr = m68ki_init_exception();
477 // Set the interrupt mask to the level of the one being serviced
478 regs.intmask = intLevel;
481 uint32_t newPC = m68k_read_memory_32(vector << 2);
483 // If vector is uninitialized, call the uninitialized interrupt vector
485 newPC = m68k_read_memory_32(EXCEPTION_UNINITIALIZED_INTERRUPT << 2);
487 // Generate a stack frame
488 m68ki_stack_frame_3word(regs.pc, sr);
492 // Defer cycle counting until later
493 regs.interruptCycles += 56; // NOT ACCURATE-- !!! FIX !!!
494 // CPU_INT_CYCLES += CYC_EXCEPTION[vector];
498 // Initiate exception processing
499 STATIC_INLINE uint32_t m68ki_init_exception(void)
502 /* Save the old status register */
503 uint sr = m68ki_get_sr();
505 /* Turn off trace flag, clear pending traces */
506 FLAG_T1 = FLAG_T0 = 0;
508 /* Enter supervisor mode */
509 m68ki_set_s_flag(SFLAG_SET);
514 uint32_t sr = regs.sr; // Save old status register
515 regs.s = 1; // Set supervisor mode
521 // 3 word stack frame (68000 only)
522 STATIC_INLINE void m68ki_stack_frame_3word(uint32_t pc, uint32_t sr)
529 m68k_areg(regs, 7) -= 4;
530 m68k_write_memory_32(m68k_areg(regs, 7), pc);
532 m68k_areg(regs, 7) -= 2;
533 m68k_write_memory_16(m68k_areg(regs, 7), sr);
537 unsigned int m68k_get_reg(void * context, m68k_register_t reg)
539 if (reg <= M68K_REG_A7)
540 return regs.regs[reg];
541 else if (reg == M68K_REG_PC)
543 else if (reg == M68K_REG_SR)
548 else if (reg == M68K_REG_SP)
549 return regs.regs[15];
554 void m68k_set_reg(m68k_register_t reg, unsigned int value)
556 if (reg <= M68K_REG_A7)
557 regs.regs[reg] = value;
558 else if (reg == M68K_REG_PC)
560 else if (reg == M68K_REG_SR)
565 else if (reg == M68K_REG_SP)
566 regs.regs[15] = value;
570 // Check if the instruction is a valid one
572 unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
574 instruction &= 0xFFFF;
576 if (cpuFunctionTable[instruction] == IllegalOpcode)
582 // Dummy functions, for now, until we prove the concept here. :-)
584 // Temp, while we're using the Musashi disassembler...
586 unsigned int m68k_disassemble(char * str_buff, unsigned int pc, unsigned int cpu_type)
592 int m68k_cycles_run(void) {} /* Number of cycles run so far */
593 int m68k_cycles_remaining(void) {} /* Number of cycles left */
594 void m68k_modify_timeslice(int cycles) {} /* Modify cycles left */
595 //void m68k_end_timeslice(void) {} /* End timeslice now */
597 void m68k_end_timeslice(void)
600 m68ki_initial_cycles = GET_CYCLES();
603 initialCycles = regs.remainingCycles;
604 regs.remainingCycles = 0;
609 unsigned long IllegalOpcode(uint32_t opcode)
612 uint32_t pc = m68k_getpc ();
614 if ((opcode & 0xF000) == 0xF000)
616 Exception(0x0B, 0, M68000_EXC_SRC_CPU); // LineF exception...
619 else if ((opcode & 0xF000) == 0xA000)
621 Exception(0x0A, 0, M68000_EXC_SRC_CPU); // LineA exception...
626 write_log ("Illegal instruction: %04x at %08lx\n", opcode, (long)pc);
629 Exception(0x04, 0, M68000_EXC_SRC_CPU); // Illegal opcode exception...
634 void BuildCPUFunctionTable(void)
637 unsigned long opcode;
639 // We're only using the "fast" 68000 emulation here, not the "compatible"
640 // ("fast" doesn't throw exceptions, so we're using "compatible" now :-P)
642 const struct cputbl * tbl = (currprefs.cpu_compatible
643 ? op_smalltbl_5_ff : op_smalltbl_4_ff);
645 //let's try "compatible" and see what happens here...
646 // const struct cputbl * tbl = op_smalltbl_4_ff;
647 const struct cputbl * tbl = op_smalltbl_5_ff;
650 // Log_Printf(LOG_DEBUG, "Building CPU function table (%d %d %d).\n",
651 // currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
653 // Set all instructions to Illegal...
654 for(opcode=0; opcode<65536; opcode++)
655 cpuFunctionTable[opcode] = IllegalOpcode;
657 // Move functions from compact table into our full function table...
658 for(i=0; tbl[i].handler!=NULL; i++)
659 cpuFunctionTable[tbl[i].opcode] = tbl[i].handler;
661 //JLH: According to readcpu.c, handler is set to -1 and never changes.
662 // Actually, it does read this crap in readcpu.c, do_merges() does it... :-P
663 // Again, seems like a build time thing could be done here...
665 for(opcode=0; opcode<65536; opcode++)
667 // if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
668 if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > 0)
671 if (table68k[opcode].handler != -1)
673 //printf("Relocate: $%04X->$%04X\n", table68k[opcode].handler, opcode);
674 cpuop_func * f = cpuFunctionTable[table68k[opcode].handler];
676 if (f == IllegalOpcode)
679 cpuFunctionTable[opcode] = f;