Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // Originally by David Raingeard
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
   6 // Cleanups/rewrites/fixes by James L. Hammons
   7 //
   8 // JLH = James L. Hammons
   9 //
  10 // WHO  WHEN        WHAT
  11 // ---  ----------  -----------------------------------------------------------
  12 // JLH  11/25/2009  Major rewrite of memory subsystem and handlers
  13 //
  14
  15 // ------------------------------------------------------------
  16 // JERRY REGISTERS (Mapped by Aaron Giles)
  17 // ------------------------------------------------------------
  18 // F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  19 // F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  20 // F10002            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  21 // F10004            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  22 // F10008            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  23 // F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  24 // F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  25 // F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  26 // F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  27 //                   W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  28 //                   W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  29 //                   W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  30 //                   W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  31 //                   W   -------x --------      (J_EXTCLR - clear external interrupts)
  32 //                 R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  33 //                 R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  34 //                 R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  35 //                 R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  36 //                 R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  37 // F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  38 // F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  39 //                   W   -x------ --------      (TXBRK - transmit break)
  40 //                   W   -------- -x------      (CLRERR - clear error)
  41 //                   W   -------- --x-----      (RINTEN - enable receiver interrupts)
  42 //                   W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  43 //                   W   -------- ----x---      (RXIPOL - receiver input polarity)
  44 //                   W   -------- -----x--      (TXOPOL - transmitter output polarity)
  45 //                   W   -------- ------x-      (PAREN - parity enable)
  46 //                   W   -------- -------x      (ODD - odd parity select)
  47 // F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  48 //                 R     x------- --------      (ERROR - OR of PE,FE,OE)
  49 //                 R     -x------ --------      (TXBRK - transmit break)
  50 //                 R     --x----- --------      (SERIN - serial input)
  51 //                 R     ----x--- --------      (OE - overrun error)
  52 //                 R     -----x-- --------      (FE - framing error)
  53 //                 R     ------x- --------      (PE - parity error)
  54 //                 R     -------x --------      (TBE - transmit buffer empty)
  55 //                 R     -------- x-------      (RBF - receive buffer full)
  56 //                 R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  57 //                 R     -------- ----x---      (RXIPOL - receiver input polarity)
  58 //                 R     -------- -----x--      (TXOPOL - transmitter output polarity)
  59 //                 R     -------- ------x-      (PAREN - parity enable)
  60 //                 R     -------- -------x      (ODD - odd parity)
  61 // F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  62 // F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  63 // F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  64 // F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  65 // F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  66 // ------------------------------------------------------------
  67 // F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  68 // F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  69 // F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  70 //                   W   x------- --------      (enable joystick outputs)
  71 //                   W   -------- xxxxxxxx      (joystick output data)
  72 // F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  73 // F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved (CD-ROM? no.)
  74 // F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  75 // F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  76 // F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  77 // F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  78 // F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  79 // ------------------------------------------------------------
  80 // F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  81 // F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  82 //                 R/W   x------- --------      (DMAEN - DMA enable)
  83 //                 R/W   -x------ --------      (REGPAGE - register page)
  84 //                   W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  85 //                   W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  86 //                   W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  87 //                   W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  88 //                   W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  89 //                 R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  90 //                 R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  91 //                 R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  92 //                 R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  93 //                 R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  94 //                 R/W   -------- ----x---      (IMASK - interrupt mask)
  95 //                 R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  96 //                 R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  97 //                 R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  98 // F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  99 //                 R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
 100 //                 R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
 101 // F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
 102 //                   W   -------- ----x---      (MATCOL - column/row major)
 103 //                   W   -------- -----xxx      (MATRIX3-15 - matrix width)
 104 // F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
 105 // F1A10C            W   -------- -----x-x   D_END - data organization register
 106 //                   W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 107 //                   W   -------- -------x      (BIG_IO - big endian I/O)
 108 // F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
 109 // F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
 110 //                 R     xxxx---- --------      (VERSION - DSP version code)
 111 //                 R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 112 //                 R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 113 //                 R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 114 //                 R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 115 //                 R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 116 //                 R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 117 //                 R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 118 //                 R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 119 //                 R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 120 //                 R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 121 //                 R/W   -------- -------x      (DSPGO - enable DSP execution)
 122 // F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 123 //                 R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 124 // F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 125 // F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 126 // F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 127 //                   W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 128 // F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 129 // F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 130 // F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 131 // F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 132 // F1A150          R     -------- ------xx   SSTAT
 133 //                 R     -------- ------x-      (left - no description)
 134 //                 R     -------- -------x      (WS - word strobe status)
 135 // F1A154            W   -------- --xxxx-x   SMODE - serial mode
 136 //                   W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 137 //                   W   -------- ---x----      (FALLING - interrupt on falling edge)
 138 //                   W   -------- ----x---      (RISING - interrupt of rising edge)
 139 //                   W   -------- -----x--      (WSEN - enable word strobes)
 140 //                   W   -------- -------x      (INTERNAL - enables serial clock)
 141 // ------------------------------------------------------------
 142 // F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 143 // ------------------------------------------------------------
 144 // F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 145 // F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 146 // F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 147 // F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 148 // F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 149 // F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 150 // F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 151 // F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 152 // ------------------------------------------------------------
 153
 154 #include "jerry.h"
 155
 156 #include <string.h>                                                             // For memcpy
 157 //#include <math.h>
 158 #include "cdrom.h"
 159 #include "dac.h"
 160 #include "dsp.h"
 161 #include "eeprom.h"
 162 #include "event.h"
 163 #include "jaguar.h"
 164 #include "joystick.h"
 165 #include "log.h"
 166 #include "wavetable.h"
 167
 168 //Note that 44100 Hz requires samples every 22.675737 usec.
 169 #define NEW_TIMER_SYSTEM
 170 //#define JERRY_DEBUG
 171
 172 /*static*/ uint8 jerry_ram_8[0x10000];
 173
 174 //#define JERRY_CONFIG  0x4002                                          // ??? What's this ???
 175
 176 uint8 analog_x, analog_y;
 177
 178 static uint32 JERRYPIT1Prescaler;
 179 static uint32 JERRYPIT1Divider;
 180 static uint32 JERRYPIT2Prescaler;
 181 static uint32 JERRYPIT2Divider;
 182 static int32 jerry_timer_1_counter;
 183 static int32 jerry_timer_2_counter;
 184
 185 uint32 JERRYI2SInterruptDivide = 8;
 186 int32 JERRYI2SInterruptTimer = -1;
 187 uint32 jerryI2SCycles;
 188 uint32 jerryIntPending;
 189
 190 // Private function prototypes
 191
 192 void JERRYResetPIT1(void);
 193 void JERRYResetPIT2(void);
 194 void JERRYResetI2S(void);
 195
 196 void JERRYPIT1Callback(void);
 197 void JERRYPIT2Callback(void);
 198 void JERRYI2SCallback(void);
 199
 200 //This approach is probably wrong, since the timer is continuously counting down, though
 201 //it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
 202 //timeslice should be running during that phase... (The DSP needs to be aware of this!)
 203
 204 //This is only used by the old system, so once the new timer system is working this
 205 //should be safe to nuke.
 206 void JERRYI2SExec(uint32 cycles)
 207 {
 208 #ifndef NEW_TIMER_SYSTEM
 209 #warning "externed var in source--should be in header file. !!! FIX !!!"
 210         extern uint16 serialMode;                                               // From DAC.CPP
 211         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 212         {
 213
 214         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 215 //Yes, it should. !!! FIX !!!
 216                 JERRYI2SInterruptDivide &= 0xFF;
 217
 218                 if (JERRYI2SInterruptTimer == -1)
 219                 {
 220                 // We don't have to divide the RISC clock rate by this--the reason is a bit
 221                 // convoluted. Will put explanation here later...
 222 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 223 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 224 // this: 26590906 / 44100 = 602 cycles.
 225 // Which means, every 602 cycles that go by we have to generate an interrupt.
 226                         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 227                 }
 228
 229                 JERYI2SInterruptTimer -= cycles;
 230                 if (JERRYI2SInterruptTimer <= 0)
 231                 {
 232 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
 233                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 234                         JERRYI2SInterruptTimer += jerryI2SCycles;
 235 #ifdef JERRY_DEBUG
 236                         if (JERRYI2SInterruptTimer < 0)
 237                                 WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
 238 #endif
 239                 }
 240         }
 241         else                                                                                    // JERRY is slave to external word clock
 242         {
 243                 // This is just a temporary kludge to see if the CD bus mastering works
 244                 // I.e., this is totally faked...!
 245 // The whole interrupt system is pretty much borked and is need of an overhaul.
 246 // What we need is a way of handling these interrupts when they happen instead of
 247 // scanline boundaries the way it is now.
 248                 JERRYI2SInterruptTimer -= cycles;
 249                 if (JERRYI2SInterruptTimer <= 0)
 250                 {
 251 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 252                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 253                         {
 254 //      return GetWordFromButchSSI(offset, who);
 255                                 SetSSIWordsXmittedFromButch();
 256                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 257                         }
 258                         JERRYI2SInterruptTimer += 602;
 259                 }
 260         }
 261 #else
 262         RemoveCallback(JERRYI2SCallback);
 263         JERRYI2SCallback();
 264 #endif
 265 }
 266
 267 //NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
 268 void JERRYExecPIT(uint32 cycles)
 269 {
 270 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 271 //      if (jerry_timer_1_counter)
 272                 jerry_timer_1_counter -= cycles;
 273
 274         if (jerry_timer_1_counter <= 0)
 275         {
 276 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 277                 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 278 //              JERRYResetPIT1();
 279                 jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 280         }
 281
 282 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 283 //      if (jerry_timer_2_counter)
 284                 jerry_timer_2_counter -= cycles;
 285
 286         if (jerry_timer_2_counter <= 0)
 287         {
 288 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 289                 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 290 //              JERRYResetPIT2();
 291                 jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 292         }
 293 }
 294
 295 void JERRYResetI2S(void)
 296 {
 297         //WriteLog("i2s: reseting\n");
 298 //This is really SCLK... !!! FIX !!!
 299         JERRYI2SInterruptDivide = 8;
 300         JERRYI2SInterruptTimer = -1;
 301 }
 302
 303 void JERRYResetPIT1(void)
 304 {
 305 #ifndef NEW_TIMER_SYSTEM
 306 /*      if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
 307                 jerry_timer_1_counter = 0;
 308         else//*/
 309 //Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
 310                 jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 311
 312 //      if (jerry_timer_1_counter)
 313 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
 314
 315 #else
 316         RemoveCallback(JERRYPIT1Callback);
 317
 318         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 319         {
 320                 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
 321                 SetCallbackTime(JERRYPIT1Callback, usecs);
 322         }
 323 #endif
 324 }
 325
 326 void JERRYResetPIT2(void)
 327 {
 328 #ifndef NEW_TIMER_SYSTEM
 329 /*      if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
 330         {
 331                 jerry_timer_2_counter = 0;
 332                 return;
 333         }
 334         else//*/
 335                 jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 336
 337 //      if (jerry_timer_2_counter)
 338 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
 339
 340 #else
 341         RemoveCallback(JERRYPIT2Callback);
 342
 343         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 344         {
 345                 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
 346                 SetCallbackTime(JERRYPIT2Callback, usecs);
 347         }
 348 #endif
 349 }
 350
 351 void JERRYPIT1Callback(void)
 352 {
 353         DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 354         JERRYResetPIT1();
 355 }
 356
 357 void JERRYPIT2Callback(void)
 358 {
 359         DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 360         JERRYResetPIT2();
 361 }
 362
 363 void JERRYI2SCallback(void)
 364 {
 365         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 366 //Yes, it should. !!! FIX !!!
 367 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
 368         JERRYI2SInterruptDivide &= 0xFF;
 369         // We don't have to divide the RISC clock rate by this--the reason is a bit
 370         // convoluted. Will put explanation here later...
 371 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 372 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 373 // this: 26590906 / 44100 = 602 cycles.
 374 // Which means, every 602 cycles that go by we have to generate an interrupt.
 375         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 376
 377 //This should be in this file with an extern reference in the header file so that
 378 //DAC.CPP can see it... !!! FIX !!!
 379         extern uint16 serialMode;                                               // From DAC.CPP
 380
 381         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 382         {
 383                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);         // This does the 'IRQ enabled' checking...
 384                 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
 385                 SetCallbackTime(JERRYI2SCallback, usecs);
 386         }
 387         else                                                                                    // JERRY is slave to external word clock
 388         {
 389 //Note that 44100 Hz requires samples every 22.675737 usec.
 390 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
 391 //sample rate or at a 88.2K sample rate (11.332... usec).
 392 /*              // This is just a temporary kludge to see if the CD bus mastering works
 393                 // I.e., this is totally faked...!
 394 // The whole interrupt system is pretty much borked and is need of an overhaul.
 395 // What we need is a way of handling these interrupts when they happen instead of
 396 // scanline boundaries the way it is now.
 397                 jerry_i2s_interrupt_timer -= cycles;
 398                 if (jerry_i2s_interrupt_timer <= 0)
 399                 {
 400 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 401                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 402                         {
 403 //      return GetWordFromButchSSI(offset, who);
 404                                 SetSSIWordsXmittedFromButch();
 405                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 406                         }
 407                         jerry_i2s_interrupt_timer += 602;
 408                 }*/
 409
 410                 if (ButchIsReadyToSend())//Not sure this is right spot to check...
 411                 {
 412 //      return GetWordFromButchSSI(offset, who);
 413                         SetSSIWordsXmittedFromButch();
 414                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 415                 }
 416
 417                 SetCallbackTime(JERRYI2SCallback, 22.675737);
 418         }
 419 }
 420
 421
 422 void JERRYInit(void)
 423 {
 424 //      clock_init();
 425 //      anajoy_init();
 426         JoystickInit();
 427         DACInit();
 428 //This should be handled with the cart initialization...
 429 //      eeprom_init();
 430 //      memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
 431         memcpy(&jerry_ram_8[0xD000], wave_table, 0x1000);
 432
 433         JERRYPIT1Prescaler = 0xFFFF;
 434         JERRYPIT2Prescaler = 0xFFFF;
 435         JERRYPIT1Divider = 0xFFFF;
 436         JERRYPIT2Divider = 0xFFFF;
 437 }
 438
 439 void JERRYReset(void)
 440 {
 441 //      clock_reset();
 442 //      anajoy_reset();
 443         JoystickReset();
 444         EepromReset();
 445         JERRYResetI2S();
 446         DACReset();
 447
 448         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 449         JERRYPIT1Prescaler = 0xFFFF;
 450         JERRYPIT2Prescaler = 0xFFFF;
 451         JERRYPIT1Divider = 0xFFFF;
 452         JERRYPIT2Divider = 0xFFFF;
 453         jerry_timer_1_counter = 0;
 454         jerry_timer_2_counter = 0;
 455 }
 456
 457 void JERRYDone(void)
 458 {
 459         WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
 460 //      memory_free(jerry_ram_8);
 461 //      clock_done();
 462 //      anajoy_done();
 463         JoystickDone();
 464         DACDone();
 465         EepromDone();
 466 }
 467
 468 bool JERRYIRQEnabled(int irq)
 469 {
 470         // Read the word @ $F10020
 471         return jerry_ram_8[0x21] & (1 << irq);
 472 }
 473
 474 void JERRYSetPendingIRQ(int irq)
 475 {
 476         // This is the shadow of INT (it's a split RO/WO register)
 477         jerryIntPending |= (1 << irq);
 478 }
 479
 480 //
 481 // JERRY byte access (read)
 482 //
 483 uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
 484 {
 485 #ifdef JERRY_DEBUG
 486         WriteLog("JERRY: Reading byte at %06X\n", offset);
 487 #endif
 488         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 489                 return DSPReadByte(offset, who);
 490         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 491                 return DSPReadByte(offset, who);
 492         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 493         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 494                 return DACReadByte(offset, who);
 495 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 496 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 497 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 498 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 499 //This is WRONG!
 500 //      else if (offset >= 0xF10000 && offset <= 0xF10007)
 501 //This is still wrong. What needs to be returned here are the values being counted down
 502 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 503
 504 //This is probably the problem with the new timer code... This is invalid
 505 //under the new system... !!! FIX !!!
 506         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 507         {
 508 #ifndef NEW_TIMER_SYSTEM
 509 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 510                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 511                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 512                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 513                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 514
 515                 switch(offset & 0x0F)
 516                 {
 517                 case 6:
 518 //                      return JERRYPIT1Prescaler >> 8;
 519                         return counter1Hi >> 8;
 520                 case 7:
 521 //                      return JERRYPIT1Prescaler & 0xFF;
 522                         return counter1Hi & 0xFF;
 523                 case 8:
 524 //                      return JERRYPIT1Divider >> 8;
 525                         return counter1Lo >> 8;
 526                 case 9:
 527 //                      return JERRYPIT1Divider & 0xFF;
 528                         return counter1Lo & 0xFF;
 529                 case 10:
 530 //                      return JERRYPIT2Prescaler >> 8;
 531                         return counter2Hi >> 8;
 532                 case 11:
 533 //                      return JERRYPIT2Prescaler & 0xFF;
 534                         return counter2Hi & 0xFF;
 535                 case 12:
 536 //                      return JERRYPIT2Divider >> 8;
 537                         return counter2Lo >> 8;
 538                 case 13:
 539 //                      return JERRYPIT2Divider & 0xFF;
 540                         return counter2Lo & 0xFF;
 541                 }
 542 #else
 543 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
 544 #endif
 545         }
 546 //      else if (offset >= 0xF10010 && offset <= 0xF10015)
 547 //              return clock_byte_read(offset);
 548 //      else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 549 //              return anajoy_byte_read(offset);
 550         else if (offset >= 0xF14000 && offset <= 0xF14003)
 551                 return JoystickReadByte(offset) | EepromReadByte(offset);
 552         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 553                 return EepromReadByte(offset);
 554
 555         return jerry_ram_8[offset & 0xFFFF];
 556 }
 557
 558 //
 559 // JERRY word access (read)
 560 //
 561 uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
 562 {
 563 #ifdef JERRY_DEBUG
 564         WriteLog("JERRY: Reading word at %06X\n", offset);
 565 #endif
 566
 567         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 568                 return DSPReadWord(offset, who);
 569         else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
 570                 return DSPReadWord(offset, who);
 571         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 572         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 573                 return DACReadWord(offset, who);
 574 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 575 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 576 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 577 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 578 //This is WRONG!
 579 //      else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 580 //This is still wrong. What needs to be returned here are the values being counted down
 581 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 582         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 583         {
 584 #ifndef NEW_TIMER_SYSTEM
 585 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 586                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 587                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 588                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 589                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 590
 591                 switch(offset & 0x0F)
 592                 {
 593                 case 6:
 594 //                      return JERRYPIT1Prescaler;
 595                         return counter1Hi;
 596                 case 8:
 597 //                      return JERRYPIT1Divider;
 598                         return counter1Lo;
 599                 case 10:
 600 //                      return JERRYPIT2Prescaler;
 601                         return counter2Hi;
 602                 case 12:
 603 //                      return JERRYPIT2Divider;
 604                         return counter2Lo;
 605                 }
 606                 // Unaligned word reads???
 607 #else
 608 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
 609 #endif
 610         }
 611 //      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 612 //              return clock_word_read(offset);
 613         else if (offset == 0xF10020)
 614                 return jerryIntPending;
 615 //      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 616 //              return anajoy_word_read(offset);
 617         else if (offset == 0xF14000)
 618                 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
 619         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 620                 return JoystickReadWord(offset);
 621         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 622                 return EepromReadWord(offset);
 623
 624 /*if (offset >= 0xF1D000)
 625         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 626
 627         offset &= 0xFFFF;                               // Prevent crashing...!
 628         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 629 }
 630
 631 //
 632 // JERRY byte access (write)
 633 //
 634 void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
 635 {
 636 #ifdef JERRY_DEBUG
 637         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 638 #endif
 639         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 640         {
 641                 DSPWriteByte(offset, data, who);
 642                 return;
 643         }
 644         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 645         {
 646                 DSPWriteByte(offset, data, who);
 647                 return;
 648         }
 649         // SCLK ($F1A150--8 bits wide)
 650 //NOTE: This should be taken care of in DAC...
 651         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 652         {
 653 //              WriteLog("JERRY: Writing %02X to SCLK...\n", data);
 654                 if ((offset & 0x03) == 2)
 655                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
 656                 else
 657                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
 658
 659                 JERRYI2SInterruptTimer = -1;
 660 #ifndef NEW_TIMER_SYSTEM
 661                 jerry_i2s_exec(0);
 662 #else
 663                 RemoveCallback(JERRYI2SCallback);
 664                 JERRYI2SCallback();
 665 #endif
 666 //              return;
 667         }
 668         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 669         else if (offset >= 0xF1A148 && offset <= 0xF1A157)
 670         {
 671                 DACWriteByte(offset, data, who);
 672                 return;
 673         }
 674         else if (offset >= 0xF10000 && offset <= 0xF10007)
 675         {
 676 #ifndef NEW_TIMER_SYSTEM
 677                 switch (offset & 0x07)
 678                 {
 679                 case 0:
 680                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
 681                         JERRYResetPIT1();
 682                         break;
 683                 case 1:
 684                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
 685                         JERRYResetPIT1();
 686                         break;
 687                 case 2:
 688                         JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
 689                         JERRYResetPIT1();
 690                         break;
 691                 case 3:
 692                         JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
 693                         JERRYResetPIT1();
 694                         break;
 695                 case 4:
 696                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
 697                         JERRYResetPIT2();
 698                         break;
 699                 case 5:
 700                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
 701                         JERRYResetPIT2();
 702                         break;
 703                 case 6:
 704                         JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
 705                         JERRYResetPIT2();
 706                         break;
 707                 case 7:
 708                         JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
 709                         JERRYResetPIT2();
 710                 }
 711 #else
 712 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
 713 #endif
 714                 return;
 715         }
 716 /*      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 717         {
 718                 clock_byte_write(offset, data);
 719                 return;
 720         }//*/
 721         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 722         else if (offset >= 0xF10020 && offset <= 0xF10023)
 723         {
 724 WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
 725         }
 726 /*      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 727         {
 728                 anajoy_byte_write(offset, data);
 729                 return;
 730         }*/
 731         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 732         {
 733                 JoystickWriteByte(offset, data);
 734                 EepromWriteByte(offset, data);
 735                 return;
 736         }
 737         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 738         {
 739                 EepromWriteByte(offset, data);
 740                 return;
 741         }
 742
 743 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 744         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 745                 return;
 746
 747         jerry_ram_8[offset & 0xFFFF] = data;
 748 }
 749
 750 //
 751 // JERRY word access (write)
 752 //
 753 void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
 754 {
 755 #ifdef JERRY_DEBUG
 756         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 757 #endif
 758
 759         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 760         {
 761                 DSPWriteWord(offset, data, who);
 762                 return;
 763         }
 764         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 765         {
 766                 DSPWriteWord(offset, data, who);
 767                 return;
 768         }
 769 //NOTE: This should be taken care of in DAC...
 770         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
 771         {
 772                 WriteLog("JERRY: Writing %04X to SCLK (by %s)...\n", data, whoName[who]);
 773 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
 774                 JERRYI2SInterruptDivide = (uint8)data;
 775                 JERRYI2SInterruptTimer = -1;
 776 #ifndef NEW_TIMER_SYSTEM
 777                 jerry_i2s_exec(0);
 778 #else
 779                 RemoveCallback(JERRYI2SCallback);
 780                 JERRYI2SCallback();
 781 #endif
 782
 783                 DACWriteWord(offset, data, who);
 784                 return;
 785         }
 786         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 787         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
 788         {
 789                 DACWriteWord(offset, data, who);
 790                 return;
 791         }
 792         else if (offset >= 0xF10000 && offset <= 0xF10007)
 793         {
 794 //#ifndef NEW_TIMER_SYSTEM
 795 #if 1
 796                 switch(offset & 0x07)
 797                 {
 798                 case 0:
 799                         JERRYPIT1Prescaler = data;
 800                         JERRYResetPIT1();
 801                         break;
 802                 case 2:
 803                         JERRYPIT1Divider = data;
 804                         JERRYResetPIT1();
 805                         break;
 806                 case 4:
 807                         JERRYPIT2Prescaler = data;
 808                         JERRYResetPIT2();
 809                         break;
 810                 case 6:
 811                         JERRYPIT2Divider = data;
 812                         JERRYResetPIT2();
 813                 }
 814                 // Need to handle (unaligned) cases???
 815 #else
 816 WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
 817 #endif
 818                 return;
 819         }
 820 /*      else if (offset >= 0xF10010 && offset < 0xF10016)
 821         {
 822                 clock_word_write(offset, data);
 823                 return;
 824         }//*/
 825         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 826         else if (offset >= 0xF10020 && offset <= 0xF10022)
 827         {
 828 WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
 829         }
 830 /*      else if (offset >= 0xF17C00 && offset < 0xF17C02)
 831         {
 832 //I think this was removed from the Jaguar. If so, then we don't need this...!
 833                 anajoy_word_write(offset, data);
 834                 return;
 835         }*/
 836         else if (offset >= 0xF14000 && offset < 0xF14003)
 837         {
 838                 JoystickWriteWord(offset, data);
 839                 EepromWriteWord(offset, data);
 840                 return;
 841         }
 842         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 843         {
 844                 EepromWriteWord(offset, data);
 845                 return;
 846         }
 847
 848 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 849         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 850                 return;
 851
 852         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 853         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 854 }