Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups by James L. Hammons
   7 //
   8 //      ------------------------------------------------------------
   9 //      JERRY REGISTERS (Mapped by Aaron Giles)
  10 //      ------------------------------------------------------------
  11 //      F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  12 //      F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  13 //      F10004            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  14 //      F10008            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  15 //      F1000C            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  16 //      F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  17 //      F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  18 //      F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  19 //      F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  20 //                        W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  21 //                        W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  22 //                        W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  23 //                        W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  24 //                        W   -------x --------      (J_EXTCLR - clear external interrupts)
  25 //                      R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  26 //                      R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  27 //                      R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  28 //                      R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  29 //                      R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  30 //      F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  31 //      F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  32 //                        W   -x------ --------      (TXBRK - transmit break)
  33 //                        W   -------- -x------      (CLRERR - clear error)
  34 //                        W   -------- --x-----      (RINTEN - enable receiver interrupts)
  35 //                        W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  36 //                        W   -------- ----x---      (RXIPOL - receiver input polarity)
  37 //                        W   -------- -----x--      (TXOPOL - transmitter output polarity)
  38 //                        W   -------- ------x-      (PAREN - parity enable)
  39 //                        W   -------- -------x      (ODD - odd parity select)
  40 //      F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  41 //                      R     x------- --------      (ERROR - OR of PE,FE,OE)
  42 //                      R     -x------ --------      (TXBRK - transmit break)
  43 //                      R     --x----- --------      (SERIN - serial input)
  44 //                      R     ----x--- --------      (OE - overrun error)
  45 //                      R     -----x-- --------      (FE - framing error)
  46 //                      R     ------x- --------      (PE - parity error)
  47 //                      R     -------x --------      (TBE - transmit buffer empty)
  48 //                      R     -------- x-------      (RBF - receive buffer full)
  49 //                      R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  50 //                      R     -------- ----x---      (RXIPOL - receiver input polarity)
  51 //                      R     -------- -----x--      (TXOPOL - transmitter output polarity)
  52 //                      R     -------- ------x-      (PAREN - parity enable)
  53 //                      R     -------- -------x      (ODD - odd parity)
  54 //      F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  55 //      ------------------------------------------------------------
  56 //      F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  57 //      F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  58 //      F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  59 //                        W   x------- --------      (enable joystick outputs)
  60 //                        W   -------- xxxxxxxx      (joystick output data)
  61 //      F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  62 //      F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved
  63 //      F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  64 //      F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  65 //      F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  66 //      F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  67 //      F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  68 //      ------------------------------------------------------------
  69 //      F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  70 //      F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  71 //                      R/W   x------- --------      (DMAEN - DMA enable)
  72 //                      R/W   -x------ --------      (REGPAGE - register page)
  73 //                        W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  74 //                        W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  75 //                        W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  76 //                        W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  77 //                        W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  78 //                      R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  79 //                      R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  80 //                      R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  81 //                      R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  82 //                      R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  83 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
  84 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  85 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  86 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  87 //      F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  88 //                      R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
  89 //                      R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
  90 //      F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
  91 //                        W   -------- ----x---      (MATCOL - column/row major)
  92 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
  93 //      F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
  94 //      F1A10C            W   -------- -----x-x   D_END - data organization register
  95 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
  96 //                        W   -------- -------x      (BIG_IO - big endian I/O)
  97 //      F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
  98 //      F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
  99 //                      R     xxxx---- --------      (VERSION - DSP version code)
 100 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 101 //                      R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 102 //                      R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 103 //                      R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 104 //                      R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 105 //                      R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 106 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 107 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 108 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 109 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 110 //                      R/W   -------- -------x      (DSPGO - enable DSP execution)
 111 //      F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 112 //                      R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 113 //      F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 114 //      F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 115 //      F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 116 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 117 //      F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 118 //      F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 119 //      F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 120 //      F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 121 //      F1A150          R     -------- ------xx   SSTAT
 122 //                      R     -------- ------x-      (left - no description)
 123 //                      R     -------- -------x      (WS - word strobe status)
 124 //      F1A154            W   -------- --xxxx-x   SMODE - serial mode
 125 //                        W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 126 //                        W   -------- ---x----      (FALLING - interrupt on falling edge)
 127 //                        W   -------- ----x---      (RISING - interrupt of rising edge)
 128 //                        W   -------- -----x--      (WSEN - enable word strobes)
 129 //                        W   -------- -------x      (INTERNAL - enables serial clock)
 130 //      ------------------------------------------------------------
 131 //      F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 132 //      ------------------------------------------------------------
 133 //      F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 134 //      F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 135 //      F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 136 //      F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 137 //      F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 138 //      F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 139 //      F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 140 //      F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 141 //      ------------------------------------------------------------
 142
 143 #include "jerry.h"
 144 #include "wavetable.h"
 145 #include <math.h>
 146
 147 //#define JERRY_DEBUG
 148
 149 static uint8 * jerry_ram_8;
 150
 151 #define JERRY_CONFIG    0x4002
 152
 153 uint8 analog_x, analog_y;
 154
 155 static uint32 jerry_timer_1_prescaler;
 156 static uint32 jerry_timer_2_prescaler;
 157 static uint32 jerry_timer_1_divider;
 158 static uint32 jerry_timer_2_divider;
 159 static int32 jerry_timer_1_counter;
 160 static int32 jerry_timer_2_counter;
 161
 162 static uint32 jerry_i2s_interrupt_divide = 8;
 163 static int32 jerry_i2s_interrupt_timer = -1;
 164 static int32 jerry_i2s_interrupt_cycles_per_scanline = 0;
 165
 166
 167 void jerry_i2s_exec(uint32 cycles)
 168 {
 169         // Why is it called this? Instead of SCLK?
 170         jerry_i2s_interrupt_divide &= 0xFF;
 171
 172         if (jerry_i2s_interrupt_timer == -1)
 173         {
 174                 uint32 jerry_i2s_int_freq = (26591000 / 64) / (jerry_i2s_interrupt_divide + 1);
 175 //Note: The formula is system_clock_freq / (2 * (N + 1)), and to get 16 bits each of
 176 //      left & right channel, ...
 177 //
 178 //WriteLog("SCLK: Setting serial clock freqency to %u Hz...\n", jerry_i2s_int_freq);
 179 //WriteLog("SCLK: Real serial clock freqency would be %u Hz (N=%u)...\n", 26590906 / (2 * (jerry_i2s_interrupt_divide + 1)), jerry_i2s_interrupt_divide);
 180 //WTF is this???
 181                 jerry_i2s_interrupt_cycles_per_scanline = 13300000 / jerry_i2s_int_freq;
 182                 jerry_i2s_interrupt_timer = jerry_i2s_interrupt_cycles_per_scanline;
 183                 //WriteLog("jerry: i2s interrupt rate set to %i hz (every %i cpu clock cycles) jerry_i2s_interrupt_divide=%i\n",jerry_i2s_int_freq,jerry_i2s_interrupt_cycles_per_scanline,jerry_i2s_interrupt_divide);
 184 //No need, we write it directly         pcm_set_sample_rate(jerry_i2s_int_freq);
 185         }
 186         jerry_i2s_interrupt_timer -= cycles;
 187         // note : commented since the sound doesn't work properly else
 188 // !!! FIX !!!
 189         if (1)//jerry_i2s_interrupt_timer<=0)
 190         {
 191                 // i2s interrupt
 192                 dsp_check_if_i2s_interrupt_needed();
 193                 //WriteLog("jerry_i2s_interrupt_timer=%i, generating an i2s interrupt\n",jerry_i2s_interrupt_timer);
 194                 jerry_i2s_interrupt_timer += jerry_i2s_interrupt_cycles_per_scanline;
 195         }
 196 }
 197
 198 void jerry_reset_i2s_timer(void)
 199 {
 200         //WriteLog("i2s: reseting\n");
 201         jerry_i2s_interrupt_divide = 8;
 202         jerry_i2s_interrupt_timer = -1;
 203 }
 204
 205 void jerry_reset_timer_1(void)
 206 {
 207         if (!jerry_timer_1_prescaler || !jerry_timer_1_divider)
 208                 jerry_timer_1_counter = 0;
 209         else
 210                 jerry_timer_1_counter = (1 + jerry_timer_1_prescaler) * (1 + jerry_timer_1_divider);
 211
 212 //      if (jerry_timer_1_counter)
 213 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
 214 }
 215
 216 void jerry_reset_timer_2(void)
 217 {
 218         if (!jerry_timer_2_prescaler || !jerry_timer_2_divider)
 219         {
 220                 jerry_timer_2_counter = 0;
 221                 return;
 222         }
 223         else
 224                 jerry_timer_2_counter = ((1 + jerry_timer_2_prescaler) * (1 + jerry_timer_2_divider));
 225
 226 //      if (jerry_timer_2_counter)
 227 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
 228 }
 229
 230 void jerry_pit_exec(uint32 cycles)
 231 {
 232         if (jerry_timer_1_counter)
 233                 jerry_timer_1_counter -= cycles;
 234
 235         if (jerry_timer_1_counter <= 0)
 236         {
 237                 dsp_set_irq_line(2, 1);
 238                 jerry_reset_timer_1();
 239         }
 240
 241         if (jerry_timer_2_counter)
 242                 jerry_timer_2_counter -= cycles;
 243
 244         if (jerry_timer_2_counter <= 0)
 245         {
 246                 dsp_set_irq_line(3, 1);
 247                 jerry_reset_timer_2();
 248         }
 249 }
 250
 251 void jerry_init(void)
 252 {
 253         clock_init();
 254         anajoy_init();
 255         joystick_init();
 256         DACInit();
 257 //This should be handled with the cart initialization...
 258 //      eeprom_init();
 259         memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
 260         memcpy(&jerry_ram_8[0xD000], wave_table, 0x1000);
 261 }
 262
 263 void jerry_reset(void)
 264 {
 265         //WriteLog("jerry_reset()\n");
 266         clock_reset();
 267         anajoy_reset();
 268         joystick_reset();
 269         eeprom_reset();
 270         jerry_reset_i2s_timer();
 271         DACReset();
 272
 273         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 274         jerry_ram_8[JERRY_CONFIG+1] |= 0x10;    // NTSC (bit 4)
 275         jerry_timer_1_prescaler = 0xFFFF;
 276         jerry_timer_2_prescaler = 0xFFFF;
 277         jerry_timer_1_divider = 0xFFFF;
 278         jerry_timer_2_divider = 0xFFFF;
 279         jerry_timer_1_counter = 0;
 280         jerry_timer_2_counter = 0;
 281 }
 282
 283 void jerry_done(void)
 284 {
 285         //WriteLog("jerry_done()\n");
 286         memory_free(jerry_ram_8);
 287         clock_done();
 288         anajoy_done();
 289         joystick_done();
 290         DACDone();
 291         eeprom_done();
 292 }
 293
 294 //
 295 // JERRY byte access (read)
 296 //
 297 unsigned jerry_byte_read(unsigned int offset)
 298 {
 299 #ifdef JERRY_DEBUG
 300         WriteLog("JERRY: Reading byte at %06X\n", offset);
 301 #endif
 302         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 303                 return dsp_byte_read(offset);
 304         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 305                 return dsp_byte_read(offset);
 306         else if (offset >= 0xF10000 && offset <= 0xF10007)
 307         {
 308                 switch(offset & 0x07)
 309                 {
 310                 case 0:
 311                         return jerry_timer_1_prescaler >> 8;
 312                 case 1:
 313                         return jerry_timer_1_prescaler & 0xFF;
 314                 case 2:
 315                         return jerry_timer_1_divider >> 8;
 316                 case 3:
 317                         return jerry_timer_1_divider & 0xFF;
 318                 case 4:
 319                         return jerry_timer_2_prescaler >> 8;
 320                 case 5:
 321                         return jerry_timer_2_prescaler & 0xFF;
 322                 case 6:
 323                         return jerry_timer_2_divider >> 8;
 324                 case 7:
 325                         return jerry_timer_2_divider & 0xFF;
 326                 }
 327         }
 328         else if (offset >= 0xF10010 && offset <= 0xf10015)
 329                 return clock_byte_read(offset);
 330         else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 331                 return anajoy_byte_read(offset);
 332         else if (offset >= 0xF14000 && offset <= 0xF14003)
 333         {
 334                 return joystick_byte_read(offset) | eeprom_byte_read(offset);
 335         }
 336         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 337                 return eeprom_byte_read(offset);
 338
 339         return jerry_ram_8[offset & 0xFFFF];
 340 }
 341
 342 //
 343 // JERRY word access (read)
 344 //
 345 unsigned jerry_word_read(unsigned int offset)
 346 {
 347 #ifdef JERRY_DEBUG
 348         WriteLog("JERRY: Reading word at %06X\n", offset);
 349 #endif
 350
 351         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 352                 return dsp_word_read(offset);
 353         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 354                 return dsp_word_read(offset);
 355         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 356         {
 357                 switch(offset & 0x07)
 358                 {
 359                 case 0:
 360                         return jerry_timer_1_prescaler;
 361                 case 2:
 362                         return jerry_timer_1_divider;
 363                 case 4:
 364                         return jerry_timer_2_prescaler;
 365                 case 6:
 366                         return jerry_timer_2_divider;
 367                 }
 368                 // Unaligned word reads???
 369         }
 370         else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 371                 return clock_word_read(offset);
 372         else if (offset == 0xF10020)
 373                 return 0x00;
 374         else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 375                 return anajoy_word_read(offset);
 376         else if (offset == 0xF14000)
 377         {
 378                 //WriteLog("reading 0x%.4x from 0xf14000\n");
 379                 return (joystick_word_read(offset) & 0xFFFE) | eeprom_word_read(offset);
 380         }
 381         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 382                 return joystick_word_read(offset);
 383         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 384                 return eeprom_word_read(offset);
 385
 386 // This is never executed!
 387 /*      offset &= 0xFFFF;
 388         if (offset==0x4002)
 389                 return(0xffff);*/
 390
 391 /*if (offset >= 0xF1D000)
 392         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 393
 394         offset &= 0xFFFF;                               // Prevent crashing...!
 395         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 396 }
 397
 398 //
 399 // JERRY byte access (write)
 400 //
 401 void jerry_byte_write(unsigned offset, unsigned data)
 402 {
 403 #ifdef JERRY_DEBUG
 404         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 405 #endif
 406         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 407         {
 408                 dsp_byte_write(offset, data);
 409                 return;
 410         }
 411         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 412         {
 413                 dsp_byte_write(offset, data);
 414                 return;
 415         }
 416         // SCLK ($F1A150--8 bits wide)
 417         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 418         {
 419 //              WriteLog("i2s: writing 0x%.2x to SCLK\n",data);
 420                 if ((offset & 0x03) == 2)
 421                         jerry_i2s_interrupt_divide = (jerry_i2s_interrupt_divide & 0x00FF) | ((uint32)data << 8);
 422                 else
 423                         jerry_i2s_interrupt_divide = (jerry_i2s_interrupt_divide & 0xFF00) | (uint32)data;
 424
 425                 jerry_i2s_interrupt_timer = -1;
 426                 jerry_i2s_exec(0);
 427                 return;
 428         }
 429         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 430         {
 431                 switch(offset & 0x07)
 432                 {
 433                 case 0:
 434                         jerry_timer_1_prescaler = (jerry_timer_1_prescaler & 0x00FF) | (data << 8);
 435                         jerry_reset_timer_1();
 436                         break;
 437                 case 1: { jerry_timer_1_prescaler=(jerry_timer_1_prescaler&0xff00)|(data);              jerry_reset_timer_1(); return; }
 438                 case 2: { jerry_timer_1_divider=(jerry_timer_1_divider&0x00ff)|(data<<8);               jerry_reset_timer_1(); return; }
 439                 case 3: { jerry_timer_1_divider=(jerry_timer_1_divider&0xff00)|(data);                  jerry_reset_timer_1(); return; }
 440                 case 4: { jerry_timer_2_prescaler=(jerry_timer_2_prescaler&0x00ff)|(data<<8);   jerry_reset_timer_2(); return; }
 441                 case 5: { jerry_timer_2_prescaler=(jerry_timer_2_prescaler&0xff00)|(data);              jerry_reset_timer_2(); return; }
 442                 case 6: { jerry_timer_2_divider=(jerry_timer_2_divider&0x00ff)|(data<<8);               jerry_reset_timer_2(); return; }
 443                 case 7: { jerry_timer_2_divider=(jerry_timer_2_divider&0xff00)|(data);                  jerry_reset_timer_2(); return; }
 444                 }
 445                 return;
 446         }
 447         else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 448         {
 449                 clock_byte_write(offset, data);
 450                 return;
 451         }
 452         else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 453         {
 454                 anajoy_byte_write(offset, data);
 455                 return;
 456         }
 457         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 458         {
 459                 joystick_byte_write(offset, data);
 460                 eeprom_byte_write(offset, data);
 461                 return;
 462         }
 463         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 464         {
 465                 eeprom_byte_write(offset, data);
 466                 return;
 467         }
 468
 469 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 470         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 471                 return;
 472
 473         jerry_ram_8[offset & 0xFFFF] = data;
 474 }
 475
 476 //
 477 // JERRY word access (write)
 478 //
 479 void jerry_word_write(unsigned offset, unsigned data)
 480 {
 481 #ifdef JERRY_DEBUG
 482         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 483 #endif
 484
 485         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 486         {
 487                 dsp_word_write(offset, data);
 488                 return;
 489         }
 490         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 491         {
 492                 dsp_word_write(offset, data);
 493                 return;
 494         }
 495         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
 496         {
 497 //              WriteLog("i2s: writing 0x%.4x to SCLK\n",data);
 498                 jerry_i2s_interrupt_divide = data & 0xFF;
 499                 jerry_i2s_interrupt_timer = -1;
 500                 jerry_i2s_exec(0);
 501         }
 502         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 503         {
 504                 switch(offset & 0x07)
 505                 {
 506                 case 0:
 507                         jerry_timer_1_prescaler = data;
 508                         jerry_reset_timer_1();
 509                         break;
 510                 case 2:
 511                         jerry_timer_1_divider = data;
 512                         jerry_reset_timer_1();
 513                         break;
 514                 case 4:
 515                         jerry_timer_2_prescaler = data;
 516                         jerry_reset_timer_2();
 517                         break;
 518                 case 6:
 519                         jerry_timer_2_divider = data;
 520                         jerry_reset_timer_2();
 521                 }
 522                 // Need to handle (unaligned) cases???
 523                 return;
 524         }
 525         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 526         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
 527         {
 528                 DACWriteWord(offset, data);
 529                 return;
 530         }
 531         else if ((offset >= 0xF10010) && (offset < 0xF10016))
 532         {
 533                 clock_word_write(offset, data);
 534                 return;
 535         }
 536         else if ((offset >= 0xF17C00) && (offset < 0xF17C02))
 537         {
 538 //I think this was removed from the Jaguar. If so, then we don't need this...!
 539                 anajoy_word_write(offset, data);
 540                 return;
 541         }
 542         else if ((offset >= 0xF14000) && (offset < 0xF14003))
 543         {
 544                 joystick_word_write(offset, data);
 545                 eeprom_word_write(offset, data);
 546                 return;
 547         }
 548         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 549         {
 550                 eeprom_word_write(offset, data);
 551                 return;
 552         }
 553
 554 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 555         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 556                 return;
 557
 558         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 559         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 560 }