Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // Originally by David Raingeard
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
   6 // Cleanups/rewrites/fixes by James L. Hammons
   7 //
   8 // JLH = James L. Hammons
   9 //
  10 // WHO  WHEN        WHAT
  11 // ---  ----------  -----------------------------------------------------------
  12 // JLH  11/25/2009  Major rewrite of memory subsystem and handlers
  13 //
  14
  15 // ------------------------------------------------------------
  16 // JERRY REGISTERS (Mapped by Aaron Giles)
  17 // ------------------------------------------------------------
  18 // F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  19 // F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  20 // F10002            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  21 // F10004            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  22 // F10008            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  23 // F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  24 // F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  25 // F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  26 // F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  27 //                   W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  28 //                   W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  29 //                   W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  30 //                   W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  31 //                   W   -------x --------      (J_EXTCLR - clear external interrupts)
  32 //                 R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  33 //                 R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  34 //                 R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  35 //                 R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  36 //                 R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  37 // F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  38 // F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  39 //                   W   -x------ --------      (TXBRK - transmit break)
  40 //                   W   -------- -x------      (CLRERR - clear error)
  41 //                   W   -------- --x-----      (RINTEN - enable receiver interrupts)
  42 //                   W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  43 //                   W   -------- ----x---      (RXIPOL - receiver input polarity)
  44 //                   W   -------- -----x--      (TXOPOL - transmitter output polarity)
  45 //                   W   -------- ------x-      (PAREN - parity enable)
  46 //                   W   -------- -------x      (ODD - odd parity select)
  47 // F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  48 //                 R     x------- --------      (ERROR - OR of PE,FE,OE)
  49 //                 R     -x------ --------      (TXBRK - transmit break)
  50 //                 R     --x----- --------      (SERIN - serial input)
  51 //                 R     ----x--- --------      (OE - overrun error)
  52 //                 R     -----x-- --------      (FE - framing error)
  53 //                 R     ------x- --------      (PE - parity error)
  54 //                 R     -------x --------      (TBE - transmit buffer empty)
  55 //                 R     -------- x-------      (RBF - receive buffer full)
  56 //                 R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  57 //                 R     -------- ----x---      (RXIPOL - receiver input polarity)
  58 //                 R     -------- -----x--      (TXOPOL - transmitter output polarity)
  59 //                 R     -------- ------x-      (PAREN - parity enable)
  60 //                 R     -------- -------x      (ODD - odd parity)
  61 // F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  62 // F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  63 // F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  64 // F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  65 // F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  66 // ------------------------------------------------------------
  67 // F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  68 // F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  69 // F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  70 //                   W   x------- --------      (enable joystick outputs)
  71 //                   W   -------- xxxxxxxx      (joystick output data)
  72 // F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  73 // F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved (CD-ROM? no.)
  74 // F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  75 // F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  76 // F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  77 // F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  78 // F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  79 // ------------------------------------------------------------
  80 // F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  81 // F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  82 //                 R/W   x------- --------      (DMAEN - DMA enable)
  83 //                 R/W   -x------ --------      (REGPAGE - register page)
  84 //                   W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  85 //                   W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  86 //                   W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  87 //                   W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  88 //                   W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  89 //                 R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  90 //                 R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  91 //                 R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  92 //                 R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  93 //                 R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  94 //                 R/W   -------- ----x---      (IMASK - interrupt mask)
  95 //                 R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  96 //                 R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  97 //                 R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  98 // F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  99 //                 R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
 100 //                 R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
 101 // F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
 102 //                   W   -------- ----x---      (MATCOL - column/row major)
 103 //                   W   -------- -----xxx      (MATRIX3-15 - matrix width)
 104 // F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
 105 // F1A10C            W   -------- -----x-x   D_END - data organization register
 106 //                   W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 107 //                   W   -------- -------x      (BIG_IO - big endian I/O)
 108 // F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
 109 // F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
 110 //                 R     xxxx---- --------      (VERSION - DSP version code)
 111 //                 R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 112 //                 R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 113 //                 R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 114 //                 R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 115 //                 R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 116 //                 R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 117 //                 R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 118 //                 R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 119 //                 R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 120 //                 R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 121 //                 R/W   -------- -------x      (DSPGO - enable DSP execution)
 122 // F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 123 //                 R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 124 // F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 125 // F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 126 // F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 127 //                   W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 128 // F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 129 // F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 130 // F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 131 // F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 132 // F1A150          R     -------- ------xx   SSTAT
 133 //                 R     -------- ------x-      (left - no description)
 134 //                 R     -------- -------x      (WS - word strobe status)
 135 // F1A154            W   -------- --xxxx-x   SMODE - serial mode
 136 //                   W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 137 //                   W   -------- ---x----      (FALLING - interrupt on falling edge)
 138 //                   W   -------- ----x---      (RISING - interrupt of rising edge)
 139 //                   W   -------- -----x--      (WSEN - enable word strobes)
 140 //                   W   -------- -------x      (INTERNAL - enables serial clock)
 141 // ------------------------------------------------------------
 142 // F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 143 // ------------------------------------------------------------
 144 // F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 145 // F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 146 // F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 147 // F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 148 // F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 149 // F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 150 // F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 151 // F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 152 // ------------------------------------------------------------
 153
 154 #include "jerry.h"
 155
 156 #include <string.h>                                                             // For memcpy
 157 //#include <math.h>
 158 #include "cdrom.h"
 159 #include "dac.h"
 160 #include "dsp.h"
 161 #include "eeprom.h"
 162 #include "event.h"
 163 #include "jaguar.h"
 164 #include "joystick.h"
 165 #include "log.h"
 166 //#include "memory.h"
 167 #include "wavetable.h"
 168
 169 //Note that 44100 Hz requires samples every 22.675737 usec.
 170 #define NEW_TIMER_SYSTEM
 171 //#define JERRY_DEBUG
 172
 173 /*static*/ uint8 jerry_ram_8[0x10000];
 174
 175 //#define JERRY_CONFIG  0x4002                                          // ??? What's this ???
 176
 177 uint8 analog_x, analog_y;
 178
 179 static uint32 JERRYPIT1Prescaler;
 180 static uint32 JERRYPIT1Divider;
 181 static uint32 JERRYPIT2Prescaler;
 182 static uint32 JERRYPIT2Divider;
 183 static int32 jerry_timer_1_counter;
 184 static int32 jerry_timer_2_counter;
 185
 186 uint32 JERRYI2SInterruptDivide = 8;
 187 int32 JERRYI2SInterruptTimer = -1;
 188 uint32 jerryI2SCycles;
 189 uint32 jerryIntPending;
 190
 191 // Private function prototypes
 192
 193 void JERRYResetPIT1(void);
 194 void JERRYResetPIT2(void);
 195 void JERRYResetI2S(void);
 196
 197 void JERRYPIT1Callback(void);
 198 void JERRYPIT2Callback(void);
 199 void JERRYI2SCallback(void);
 200
 201 //This approach is probably wrong, since the timer is continuously counting down, though
 202 //it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
 203 //timeslice should be running during that phase... (The DSP needs to be aware of this!)
 204
 205 //This is only used by the old system, so once the new timer system is working this
 206 //should be safe to nuke.
 207 void JERRYI2SExec(uint32 cycles)
 208 {
 209 #ifndef NEW_TIMER_SYSTEM
 210 #warning "externed var in source--should be in header file. !!! FIX !!!"
 211         extern uint16 serialMode;                                               // From DAC.CPP
 212         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 213         {
 214
 215         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 216 //Yes, it should. !!! FIX !!!
 217                 JERRYI2SInterruptDivide &= 0xFF;
 218
 219                 if (JERRYI2SInterruptTimer == -1)
 220                 {
 221                 // We don't have to divide the RISC clock rate by this--the reason is a bit
 222                 // convoluted. Will put explanation here later...
 223 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 224 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 225 // this: 26590906 / 44100 = 602 cycles.
 226 // Which means, every 602 cycles that go by we have to generate an interrupt.
 227                         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 228                 }
 229
 230                 JERYI2SInterruptTimer -= cycles;
 231                 if (JERRYI2SInterruptTimer <= 0)
 232                 {
 233 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
 234                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 235                         JERRYI2SInterruptTimer += jerryI2SCycles;
 236 #ifdef JERRY_DEBUG
 237                         if (JERRYI2SInterruptTimer < 0)
 238                                 WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
 239 #endif
 240                 }
 241         }
 242         else                                                                                    // JERRY is slave to external word clock
 243         {
 244                 // This is just a temporary kludge to see if the CD bus mastering works
 245                 // I.e., this is totally faked...!
 246 // The whole interrupt system is pretty much borked and is need of an overhaul.
 247 // What we need is a way of handling these interrupts when they happen instead of
 248 // scanline boundaries the way it is now.
 249                 JERRYI2SInterruptTimer -= cycles;
 250                 if (JERRYI2SInterruptTimer <= 0)
 251                 {
 252 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 253                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 254                         {
 255 //      return GetWordFromButchSSI(offset, who);
 256                                 SetSSIWordsXmittedFromButch();
 257                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 258                         }
 259                         JERRYI2SInterruptTimer += 602;
 260                 }
 261         }
 262 #else
 263         RemoveCallback(JERRYI2SCallback);
 264         JERRYI2SCallback();
 265 #endif
 266 }
 267
 268 //NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
 269 void JERRYExecPIT(uint32 cycles)
 270 {
 271 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 272 //      if (jerry_timer_1_counter)
 273                 jerry_timer_1_counter -= cycles;
 274
 275         if (jerry_timer_1_counter <= 0)
 276         {
 277 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 278                 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 279 //              JERRYResetPIT1();
 280                 jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 281         }
 282
 283 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 284 //      if (jerry_timer_2_counter)
 285                 jerry_timer_2_counter -= cycles;
 286
 287         if (jerry_timer_2_counter <= 0)
 288         {
 289 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 290                 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 291 //              JERRYResetPIT2();
 292                 jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 293         }
 294 }
 295
 296 void JERRYResetI2S(void)
 297 {
 298         //WriteLog("i2s: reseting\n");
 299 //This is really SCLK... !!! FIX !!!
 300         JERRYI2SInterruptDivide = 8;
 301         JERRYI2SInterruptTimer = -1;
 302 }
 303
 304 void JERRYResetPIT1(void)
 305 {
 306 #ifndef NEW_TIMER_SYSTEM
 307 /*      if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
 308                 jerry_timer_1_counter = 0;
 309         else//*/
 310 //Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
 311                 jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 312
 313 //      if (jerry_timer_1_counter)
 314 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
 315
 316 #else
 317         RemoveCallback(JERRYPIT1Callback);
 318
 319         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 320         {
 321                 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
 322                 SetCallbackTime(JERRYPIT1Callback, usecs);
 323         }
 324 #endif
 325 }
 326
 327 void JERRYResetPIT2(void)
 328 {
 329 #ifndef NEW_TIMER_SYSTEM
 330 /*      if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
 331         {
 332                 jerry_timer_2_counter = 0;
 333                 return;
 334         }
 335         else//*/
 336                 jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 337
 338 //      if (jerry_timer_2_counter)
 339 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
 340
 341 #else
 342         RemoveCallback(JERRYPIT2Callback);
 343
 344         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 345         {
 346                 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
 347                 SetCallbackTime(JERRYPIT2Callback, usecs);
 348         }
 349 #endif
 350 }
 351
 352 void JERRYPIT1Callback(void)
 353 {
 354         DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 355         JERRYResetPIT1();
 356 }
 357
 358 void JERRYPIT2Callback(void)
 359 {
 360         DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 361         JERRYResetPIT2();
 362 }
 363
 364 void JERRYI2SCallback(void)
 365 {
 366         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 367 //Yes, it should. !!! FIX !!!
 368 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
 369         JERRYI2SInterruptDivide &= 0xFF;
 370         // We don't have to divide the RISC clock rate by this--the reason is a bit
 371         // convoluted. Will put explanation here later...
 372 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 373 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 374 // this: 26590906 / 44100 = 602 cycles.
 375 // Which means, every 602 cycles that go by we have to generate an interrupt.
 376         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 377
 378 //This should be in this file with an extern reference in the header file so that
 379 //DAC.CPP can see it... !!! FIX !!!
 380         extern uint16 serialMode;                                               // From DAC.CPP
 381
 382         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 383         {
 384                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);         // This does the 'IRQ enabled' checking...
 385                 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
 386                 SetCallbackTime(JERRYI2SCallback, usecs);
 387         }
 388         else                                                                                    // JERRY is slave to external word clock
 389         {
 390 //Note that 44100 Hz requires samples every 22.675737 usec.
 391 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
 392 //sample rate or at a 88.2K sample rate (11.332... usec).
 393 /*              // This is just a temporary kludge to see if the CD bus mastering works
 394                 // I.e., this is totally faked...!
 395 // The whole interrupt system is pretty much borked and is need of an overhaul.
 396 // What we need is a way of handling these interrupts when they happen instead of
 397 // scanline boundaries the way it is now.
 398                 jerry_i2s_interrupt_timer -= cycles;
 399                 if (jerry_i2s_interrupt_timer <= 0)
 400                 {
 401 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 402                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 403                         {
 404 //      return GetWordFromButchSSI(offset, who);
 405                                 SetSSIWordsXmittedFromButch();
 406                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 407                         }
 408                         jerry_i2s_interrupt_timer += 602;
 409                 }*/
 410
 411                 if (ButchIsReadyToSend())//Not sure this is right spot to check...
 412                 {
 413 //      return GetWordFromButchSSI(offset, who);
 414                         SetSSIWordsXmittedFromButch();
 415                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 416                 }
 417
 418                 SetCallbackTime(JERRYI2SCallback, 22.675737);
 419         }
 420 }
 421
 422
 423 void JERRYInit(void)
 424 {
 425 //      clock_init();
 426 //      anajoy_init();
 427         JoystickInit();
 428         DACInit();
 429 //This should be handled with the cart initialization...
 430 //      eeprom_init();
 431 //      memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
 432         memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
 433
 434         JERRYPIT1Prescaler = 0xFFFF;
 435         JERRYPIT2Prescaler = 0xFFFF;
 436         JERRYPIT1Divider = 0xFFFF;
 437         JERRYPIT2Divider = 0xFFFF;
 438 }
 439
 440 void JERRYReset(void)
 441 {
 442 //      clock_reset();
 443 //      anajoy_reset();
 444         JoystickReset();
 445         EepromReset();
 446         JERRYResetI2S();
 447         DACReset();
 448
 449         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 450         JERRYPIT1Prescaler = 0xFFFF;
 451         JERRYPIT2Prescaler = 0xFFFF;
 452         JERRYPIT1Divider = 0xFFFF;
 453         JERRYPIT2Divider = 0xFFFF;
 454         jerry_timer_1_counter = 0;
 455         jerry_timer_2_counter = 0;
 456 }
 457
 458 void JERRYDone(void)
 459 {
 460         WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
 461 //      memory_free(jerry_ram_8);
 462 //      clock_done();
 463 //      anajoy_done();
 464         JoystickDone();
 465         DACDone();
 466         EepromDone();
 467 }
 468
 469 bool JERRYIRQEnabled(int irq)
 470 {
 471         // Read the word @ $F10020
 472         return jerry_ram_8[0x21] & (1 << irq);
 473 }
 474
 475 void JERRYSetPendingIRQ(int irq)
 476 {
 477         // This is the shadow of INT (it's a split RO/WO register)
 478         jerryIntPending |= (1 << irq);
 479 }
 480
 481 //
 482 // JERRY byte access (read)
 483 //
 484 uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
 485 {
 486 #ifdef JERRY_DEBUG
 487         WriteLog("JERRY: Reading byte at %06X\n", offset);
 488 #endif
 489         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 490                 return DSPReadByte(offset, who);
 491         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 492                 return DSPReadByte(offset, who);
 493         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 494         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 495                 return DACReadByte(offset, who);
 496 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 497 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 498 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 499 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 500 //This is WRONG!
 501 //      else if (offset >= 0xF10000 && offset <= 0xF10007)
 502 //This is still wrong. What needs to be returned here are the values being counted down
 503 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 504
 505 //This is probably the problem with the new timer code... This is invalid
 506 //under the new system... !!! FIX !!!
 507         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 508         {
 509 #ifndef NEW_TIMER_SYSTEM
 510 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 511                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 512                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 513                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 514                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 515
 516                 switch(offset & 0x0F)
 517                 {
 518                 case 6:
 519 //                      return JERRYPIT1Prescaler >> 8;
 520                         return counter1Hi >> 8;
 521                 case 7:
 522 //                      return JERRYPIT1Prescaler & 0xFF;
 523                         return counter1Hi & 0xFF;
 524                 case 8:
 525 //                      return JERRYPIT1Divider >> 8;
 526                         return counter1Lo >> 8;
 527                 case 9:
 528 //                      return JERRYPIT1Divider & 0xFF;
 529                         return counter1Lo & 0xFF;
 530                 case 10:
 531 //                      return JERRYPIT2Prescaler >> 8;
 532                         return counter2Hi >> 8;
 533                 case 11:
 534 //                      return JERRYPIT2Prescaler & 0xFF;
 535                         return counter2Hi & 0xFF;
 536                 case 12:
 537 //                      return JERRYPIT2Divider >> 8;
 538                         return counter2Lo >> 8;
 539                 case 13:
 540 //                      return JERRYPIT2Divider & 0xFF;
 541                         return counter2Lo & 0xFF;
 542                 }
 543 #else
 544 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
 545 #endif
 546         }
 547 //      else if (offset >= 0xF10010 && offset <= 0xF10015)
 548 //              return clock_byte_read(offset);
 549 //      else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 550 //              return anajoy_byte_read(offset);
 551         else if (offset >= 0xF14000 && offset <= 0xF14003)
 552                 return JoystickReadByte(offset) | EepromReadByte(offset);
 553         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 554                 return EepromReadByte(offset);
 555
 556         return jerry_ram_8[offset & 0xFFFF];
 557 }
 558
 559 //
 560 // JERRY word access (read)
 561 //
 562 uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
 563 {
 564 #ifdef JERRY_DEBUG
 565         WriteLog("JERRY: Reading word at %06X\n", offset);
 566 #endif
 567
 568         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 569                 return DSPReadWord(offset, who);
 570         else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
 571                 return DSPReadWord(offset, who);
 572         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 573         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 574                 return DACReadWord(offset, who);
 575 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 576 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 577 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 578 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 579 //This is WRONG!
 580 //      else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 581 //This is still wrong. What needs to be returned here are the values being counted down
 582 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 583         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 584         {
 585 #ifndef NEW_TIMER_SYSTEM
 586 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 587                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 588                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 589                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 590                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 591
 592                 switch(offset & 0x0F)
 593                 {
 594                 case 6:
 595 //                      return JERRYPIT1Prescaler;
 596                         return counter1Hi;
 597                 case 8:
 598 //                      return JERRYPIT1Divider;
 599                         return counter1Lo;
 600                 case 10:
 601 //                      return JERRYPIT2Prescaler;
 602                         return counter2Hi;
 603                 case 12:
 604 //                      return JERRYPIT2Divider;
 605                         return counter2Lo;
 606                 }
 607                 // Unaligned word reads???
 608 #else
 609 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
 610 #endif
 611         }
 612 //      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 613 //              return clock_word_read(offset);
 614         else if (offset == 0xF10020)
 615                 return jerryIntPending;
 616 //      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 617 //              return anajoy_word_read(offset);
 618         else if (offset == 0xF14000)
 619                 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
 620         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 621                 return JoystickReadWord(offset);
 622         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 623                 return EepromReadWord(offset);
 624
 625 /*if (offset >= 0xF1D000)
 626         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 627
 628         offset &= 0xFFFF;                               // Prevent crashing...!
 629         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 630 }
 631
 632 //
 633 // JERRY byte access (write)
 634 //
 635 void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
 636 {
 637 #ifdef JERRY_DEBUG
 638         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 639 #endif
 640         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 641         {
 642                 DSPWriteByte(offset, data, who);
 643                 return;
 644         }
 645         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 646         {
 647                 DSPWriteByte(offset, data, who);
 648                 return;
 649         }
 650         // SCLK ($F1A150--8 bits wide)
 651 //NOTE: This should be taken care of in DAC...
 652         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 653         {
 654 //              WriteLog("JERRY: Writing %02X to SCLK...\n", data);
 655                 if ((offset & 0x03) == 2)
 656                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
 657                 else
 658                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
 659
 660                 JERRYI2SInterruptTimer = -1;
 661 #ifndef NEW_TIMER_SYSTEM
 662                 jerry_i2s_exec(0);
 663 #else
 664                 RemoveCallback(JERRYI2SCallback);
 665                 JERRYI2SCallback();
 666 #endif
 667 //              return;
 668         }
 669         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 670         else if (offset >= 0xF1A148 && offset <= 0xF1A157)
 671         {
 672                 DACWriteByte(offset, data, who);
 673                 return;
 674         }
 675         else if (offset >= 0xF10000 && offset <= 0xF10007)
 676         {
 677 #ifndef NEW_TIMER_SYSTEM
 678                 switch (offset & 0x07)
 679                 {
 680                 case 0:
 681                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
 682                         JERRYResetPIT1();
 683                         break;
 684                 case 1:
 685                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
 686                         JERRYResetPIT1();
 687                         break;
 688                 case 2:
 689                         JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
 690                         JERRYResetPIT1();
 691                         break;
 692                 case 3:
 693                         JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
 694                         JERRYResetPIT1();
 695                         break;
 696                 case 4:
 697                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
 698                         JERRYResetPIT2();
 699                         break;
 700                 case 5:
 701                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
 702                         JERRYResetPIT2();
 703                         break;
 704                 case 6:
 705                         JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
 706                         JERRYResetPIT2();
 707                         break;
 708                 case 7:
 709                         JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
 710                         JERRYResetPIT2();
 711                 }
 712 #else
 713 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
 714 #endif
 715                 return;
 716         }
 717 /*      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 718         {
 719                 clock_byte_write(offset, data);
 720                 return;
 721         }//*/
 722         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 723         else if (offset >= 0xF10020 && offset <= 0xF10023)
 724         {
 725 WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
 726         }
 727 /*      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 728         {
 729                 anajoy_byte_write(offset, data);
 730                 return;
 731         }*/
 732         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 733         {
 734                 JoystickWriteByte(offset, data);
 735                 EepromWriteByte(offset, data);
 736                 return;
 737         }
 738         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 739         {
 740                 EepromWriteByte(offset, data);
 741                 return;
 742         }
 743
 744 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 745         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 746                 return;
 747
 748         jerry_ram_8[offset & 0xFFFF] = data;
 749 }
 750
 751 //
 752 // JERRY word access (write)
 753 //
 754 void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
 755 {
 756 #ifdef JERRY_DEBUG
 757         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 758 #endif
 759
 760         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 761         {
 762                 DSPWriteWord(offset, data, who);
 763                 return;
 764         }
 765         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 766         {
 767                 DSPWriteWord(offset, data, who);
 768                 return;
 769         }
 770 //NOTE: This should be taken care of in DAC...
 771         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
 772         {
 773                 WriteLog("JERRY: Writing %04X to SCLK (by %s)...\n", data, whoName[who]);
 774 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
 775                 JERRYI2SInterruptDivide = (uint8)data;
 776                 JERRYI2SInterruptTimer = -1;
 777 #ifndef NEW_TIMER_SYSTEM
 778                 jerry_i2s_exec(0);
 779 #else
 780                 RemoveCallback(JERRYI2SCallback);
 781                 JERRYI2SCallback();
 782 #endif
 783
 784                 DACWriteWord(offset, data, who);
 785                 return;
 786         }
 787         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 788         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
 789         {
 790                 DACWriteWord(offset, data, who);
 791                 return;
 792         }
 793         else if (offset >= 0xF10000 && offset <= 0xF10007)
 794         {
 795 //#ifndef NEW_TIMER_SYSTEM
 796 #if 1
 797                 switch(offset & 0x07)
 798                 {
 799                 case 0:
 800                         JERRYPIT1Prescaler = data;
 801                         JERRYResetPIT1();
 802                         break;
 803                 case 2:
 804                         JERRYPIT1Divider = data;
 805                         JERRYResetPIT1();
 806                         break;
 807                 case 4:
 808                         JERRYPIT2Prescaler = data;
 809                         JERRYResetPIT2();
 810                         break;
 811                 case 6:
 812                         JERRYPIT2Divider = data;
 813                         JERRYResetPIT2();
 814                 }
 815                 // Need to handle (unaligned) cases???
 816 #else
 817 WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
 818 #endif
 819                 return;
 820         }
 821 /*      else if (offset >= 0xF10010 && offset < 0xF10016)
 822         {
 823                 clock_word_write(offset, data);
 824                 return;
 825         }//*/
 826         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 827         else if (offset >= 0xF10020 && offset <= 0xF10022)
 828         {
 829 WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
 830         }
 831 /*      else if (offset >= 0xF17C00 && offset < 0xF17C02)
 832         {
 833 //I think this was removed from the Jaguar. If so, then we don't need this...!
 834                 anajoy_word_write(offset, data);
 835                 return;
 836         }*/
 837         else if (offset >= 0xF14000 && offset < 0xF14003)
 838         {
 839                 JoystickWriteWord(offset, data);
 840                 EepromWriteWord(offset, data);
 841                 return;
 842         }
 843         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 844         {
 845                 EepromWriteWord(offset, data);
 846                 return;
 847         }
 848
 849 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 850         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 851                 return;
 852
 853         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 854         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 855 }