Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // Originally by David Raingeard
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
   6 // Cleanups/rewrites/fixes by James L. Hammons
   7 //
   8 // JLH = James L. Hammons
   9 //
  10 // WHO  WHEN        WHAT
  11 // ---  ----------  -----------------------------------------------------------
  12 // JLH  11/25/2009  Major rewrite of memory subsystem and handlers
  13 //
  14
  15 // ------------------------------------------------------------
  16 // JERRY REGISTERS (Mapped by Aaron Giles)
  17 // ------------------------------------------------------------
  18 // F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  19 // F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  20 // F10002            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  21 // F10004            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  22 // F10008            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  23 // F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  24 // F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  25 // F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  26 // F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  27 //                   W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  28 //                   W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  29 //                   W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  30 //                   W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  31 //                   W   -------x --------      (J_EXTCLR - clear external interrupts)
  32 //                 R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  33 //                 R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  34 //                 R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  35 //                 R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  36 //                 R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  37 // F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  38 // F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  39 //                   W   -x------ --------      (TXBRK - transmit break)
  40 //                   W   -------- -x------      (CLRERR - clear error)
  41 //                   W   -------- --x-----      (RINTEN - enable receiver interrupts)
  42 //                   W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  43 //                   W   -------- ----x---      (RXIPOL - receiver input polarity)
  44 //                   W   -------- -----x--      (TXOPOL - transmitter output polarity)
  45 //                   W   -------- ------x-      (PAREN - parity enable)
  46 //                   W   -------- -------x      (ODD - odd parity select)
  47 // F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  48 //                 R     x------- --------      (ERROR - OR of PE,FE,OE)
  49 //                 R     -x------ --------      (TXBRK - transmit break)
  50 //                 R     --x----- --------      (SERIN - serial input)
  51 //                 R     ----x--- --------      (OE - overrun error)
  52 //                 R     -----x-- --------      (FE - framing error)
  53 //                 R     ------x- --------      (PE - parity error)
  54 //                 R     -------x --------      (TBE - transmit buffer empty)
  55 //                 R     -------- x-------      (RBF - receive buffer full)
  56 //                 R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  57 //                 R     -------- ----x---      (RXIPOL - receiver input polarity)
  58 //                 R     -------- -----x--      (TXOPOL - transmitter output polarity)
  59 //                 R     -------- ------x-      (PAREN - parity enable)
  60 //                 R     -------- -------x      (ODD - odd parity)
  61 // F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  62 // F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  63 // F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  64 // F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  65 // F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  66 // ------------------------------------------------------------
  67 // F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  68 // F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  69 // F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  70 //                   W   x------- --------      (enable joystick outputs)
  71 //                   W   -------- xxxxxxxx      (joystick output data)
  72 // F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  73 // F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved (CD-ROM? no.)
  74 // F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  75 // F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  76 // F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  77 // F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  78 // F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  79 // ------------------------------------------------------------
  80 // F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  81 // F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  82 //                 R/W   x------- --------      (DMAEN - DMA enable)
  83 //                 R/W   -x------ --------      (REGPAGE - register page)
  84 //                   W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  85 //                   W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  86 //                   W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  87 //                   W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  88 //                   W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  89 //                 R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  90 //                 R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  91 //                 R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  92 //                 R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  93 //                 R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  94 //                 R/W   -------- ----x---      (IMASK - interrupt mask)
  95 //                 R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  96 //                 R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  97 //                 R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  98 // F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  99 //                 R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
 100 //                 R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
 101 // F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
 102 //                   W   -------- ----x---      (MATCOL - column/row major)
 103 //                   W   -------- -----xxx      (MATRIX3-15 - matrix width)
 104 // F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
 105 // F1A10C            W   -------- -----x-x   D_END - data organization register
 106 //                   W   -------- -----x--      (BIG_INST - big endian instruction fetch)
 107 //                   W   -------- -------x      (BIG_IO - big endian I/O)
 108 // F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
 109 // F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
 110 //                 R     xxxx---- --------      (VERSION - DSP version code)
 111 //                 R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 112 //                 R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 113 //                 R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 114 //                 R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 115 //                 R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 116 //                 R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 117 //                 R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 118 //                 R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 119 //                 R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 120 //                 R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 121 //                 R/W   -------- -------x      (DSPGO - enable DSP execution)
 122 // F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 123 //                 R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 124 // F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 125 // F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 126 // F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 127 //                   W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 128 // F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 129 // F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 130 // F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 131 // F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 132 // F1A150          R     -------- ------xx   SSTAT
 133 //                 R     -------- ------x-      (left - no description)
 134 //                 R     -------- -------x      (WS - word strobe status)
 135 // F1A154            W   -------- --xxxx-x   SMODE - serial mode
 136 //                   W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 137 //                   W   -------- ---x----      (FALLING - interrupt on falling edge)
 138 //                   W   -------- ----x---      (RISING - interrupt of rising edge)
 139 //                   W   -------- -----x--      (WSEN - enable word strobes)
 140 //                   W   -------- -------x      (INTERNAL - enables serial clock)
 141 // ------------------------------------------------------------
 142 // F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 143 // ------------------------------------------------------------
 144 // F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 145 // F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 146 // F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 147 // F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 148 // F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 149 // F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 150 // F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 151 // F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 152 // ------------------------------------------------------------
 153
 154 #include "jerry.h"
 155
 156 #include <string.h>                                                             // For memcpy
 157 //#include <math.h>
 158 #include "cdrom.h"
 159 #include "dac.h"
 160 #include "dsp.h"
 161 #include "eeprom.h"
 162 #include "event.h"
 163 #include "jaguar.h"
 164 #include "joystick.h"
 165 #include "log.h"
 166 #include "m68k.h"
 167 //#include "memory.h"
 168 #include "wavetable.h"
 169
 170 //Note that 44100 Hz requires samples every 22.675737 usec.
 171 #define NEW_TIMER_SYSTEM
 172 //#define JERRY_DEBUG
 173
 174 /*static*/ uint8 jerry_ram_8[0x10000];
 175
 176 //#define JERRY_CONFIG  0x4002                                          // ??? What's this ???
 177
 178 uint8 analog_x, analog_y;
 179
 180 static uint32 JERRYPIT1Prescaler;
 181 static uint32 JERRYPIT1Divider;
 182 static uint32 JERRYPIT2Prescaler;
 183 static uint32 JERRYPIT2Divider;
 184 static int32 jerry_timer_1_counter;
 185 static int32 jerry_timer_2_counter;
 186
 187 uint32 JERRYI2SInterruptDivide = 8;
 188 int32 JERRYI2SInterruptTimer = -1;
 189 uint32 jerryI2SCycles;
 190 uint32 jerryIntPending;
 191
 192 static uint16 jerryInterruptMask = 0;
 193 static uint16 jerryPendingInterrupt = 0;
 194 // Private function prototypes
 195
 196 void JERRYResetPIT1(void);
 197 void JERRYResetPIT2(void);
 198 void JERRYResetI2S(void);
 199
 200 void JERRYPIT1Callback(void);
 201 void JERRYPIT2Callback(void);
 202 void JERRYI2SCallback(void);
 203
 204 //This approach is probably wrong, since the timer is continuously counting down, though
 205 //it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
 206 //timeslice should be running during that phase... (The DSP needs to be aware of this!)
 207
 208 //This is only used by the old system, so once the new timer system is working this
 209 //should be safe to nuke.
 210 void JERRYI2SExec(uint32 cycles)
 211 {
 212 #ifndef NEW_TIMER_SYSTEM
 213 #warning "externed var in source--should be in header file. !!! FIX !!!"
 214         extern uint16 serialMode;                                               // From DAC.CPP
 215         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 216         {
 217
 218         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 219 //Yes, it should. !!! FIX !!!
 220                 JERRYI2SInterruptDivide &= 0xFF;
 221
 222                 if (JERRYI2SInterruptTimer == -1)
 223                 {
 224                 // We don't have to divide the RISC clock rate by this--the reason is a bit
 225                 // convoluted. Will put explanation here later...
 226 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 227 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 228 // this: 26590906 / 44100 = 602 cycles.
 229 // Which means, every 602 cycles that go by we have to generate an interrupt.
 230                         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 231                 }
 232
 233                 JERYI2SInterruptTimer -= cycles;
 234                 if (JERRYI2SInterruptTimer <= 0)
 235                 {
 236 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
 237                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 238                         JERRYI2SInterruptTimer += jerryI2SCycles;
 239 #ifdef JERRY_DEBUG
 240                         if (JERRYI2SInterruptTimer < 0)
 241                                 WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
 242 #endif
 243                 }
 244         }
 245         else                                                                                    // JERRY is slave to external word clock
 246         {
 247                 // This is just a temporary kludge to see if the CD bus mastering works
 248                 // I.e., this is totally faked...!
 249 // The whole interrupt system is pretty much borked and is need of an overhaul.
 250 // What we need is a way of handling these interrupts when they happen instead of
 251 // scanline boundaries the way it is now.
 252                 JERRYI2SInterruptTimer -= cycles;
 253                 if (JERRYI2SInterruptTimer <= 0)
 254                 {
 255 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 256                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 257                         {
 258 //      return GetWordFromButchSSI(offset, who);
 259                                 SetSSIWordsXmittedFromButch();
 260                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 261                         }
 262                         JERRYI2SInterruptTimer += 602;
 263                 }
 264         }
 265 #else
 266         RemoveCallback(JERRYI2SCallback);
 267         JERRYI2SCallback();
 268 #endif
 269 }
 270
 271 //NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
 272 void JERRYExecPIT(uint32 cycles)
 273 {
 274 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 275 //      if (jerry_timer_1_counter)
 276                 jerry_timer_1_counter -= cycles;
 277
 278         if (jerry_timer_1_counter <= 0)
 279         {
 280 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 281                 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 282 //              JERRYResetPIT1();
 283                 jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 284         }
 285
 286 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
 287 //      if (jerry_timer_2_counter)
 288                 jerry_timer_2_counter -= cycles;
 289
 290         if (jerry_timer_2_counter <= 0)
 291         {
 292 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
 293                 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 294 //              JERRYResetPIT2();
 295                 jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 296         }
 297 }
 298
 299 void JERRYResetI2S(void)
 300 {
 301         //WriteLog("i2s: reseting\n");
 302 //This is really SCLK... !!! FIX !!!
 303         JERRYI2SInterruptDivide = 8;
 304         JERRYI2SInterruptTimer = -1;
 305 }
 306
 307 void JERRYResetPIT1(void)
 308 {
 309 #ifndef NEW_TIMER_SYSTEM
 310 /*      if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
 311                 jerry_timer_1_counter = 0;
 312         else//*/
 313 //Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
 314                 jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 315
 316 //      if (jerry_timer_1_counter)
 317 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
 318
 319 #else
 320         RemoveCallback(JERRYPIT1Callback);
 321
 322         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 323         {
 324                 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
 325                 SetCallbackTime(JERRYPIT1Callback, usecs);
 326         }
 327 #endif
 328 }
 329
 330 void JERRYResetPIT2(void)
 331 {
 332 #ifndef NEW_TIMER_SYSTEM
 333 /*      if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
 334         {
 335                 jerry_timer_2_counter = 0;
 336                 return;
 337         }
 338         else//*/
 339                 jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
 340
 341 //      if (jerry_timer_2_counter)
 342 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
 343
 344 #else
 345         RemoveCallback(JERRYPIT2Callback);
 346
 347         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
 348         {
 349                 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
 350                 SetCallbackTime(JERRYPIT2Callback, usecs);
 351         }
 352 #endif
 353 }
 354
 355 void JERRYPIT1Callback(void)
 356 {
 357 //WriteLog("JERRY: In PIT1 callback, IRQM=$%04X\n", jerryInterruptMask);
 358         if (jerryInterruptMask & IRQ2_TIMER1)           // CPU Timer 1 IRQ
 359         {
 360 // Not sure, but I think we don't generate another IRQ if one's already going...
 361 // But this seems to work... :-/
 362                 jerryPendingInterrupt |= IRQ2_TIMER1;
 363                 m68k_set_irq(2);                                                // Generate 68K IPL 2
 364         }
 365
 366         DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 367         JERRYResetPIT1();
 368 }
 369
 370 void JERRYPIT2Callback(void)
 371 {
 372 //WriteLog("JERRY: In PIT2 callback, IRQM=$%04X\n", jerryInterruptMask);
 373         if (jerryInterruptMask & IRQ2_TIMER2)           // CPU Timer 2 IRQ
 374         {
 375                 jerryPendingInterrupt |= IRQ2_TIMER2;
 376                 m68k_set_irq(2);                                                // Generate 68K IPL 2
 377         }
 378
 379         DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
 380         JERRYResetPIT2();
 381 }
 382
 383 void JERRYI2SCallback(void)
 384 {
 385         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
 386 //Yes, it should. !!! FIX !!!
 387 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
 388         JERRYI2SInterruptDivide &= 0xFF;
 389         // We don't have to divide the RISC clock rate by this--the reason is a bit
 390         // convoluted. Will put explanation here later...
 391 // What's needed here is to find the ratio of the frequency to the number of clock cycles
 392 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
 393 // this: 26590906 / 44100 = 602 cycles.
 394 // Which means, every 602 cycles that go by we have to generate an interrupt.
 395         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
 396
 397 //This should be in this file with an extern reference in the header file so that
 398 //DAC.CPP can see it... !!! FIX !!!
 399         extern uint16 serialMode;                                               // From DAC.CPP
 400
 401         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
 402         {
 403                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);         // This does the 'IRQ enabled' checking...
 404                 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
 405                 SetCallbackTime(JERRYI2SCallback, usecs);
 406         }
 407         else                                                                                    // JERRY is slave to external word clock
 408         {
 409 //Note that 44100 Hz requires samples every 22.675737 usec.
 410 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
 411 //sample rate or at a 88.2K sample rate (11.332... usec).
 412 /*              // This is just a temporary kludge to see if the CD bus mastering works
 413                 // I.e., this is totally faked...!
 414 // The whole interrupt system is pretty much borked and is need of an overhaul.
 415 // What we need is a way of handling these interrupts when they happen instead of
 416 // scanline boundaries the way it is now.
 417                 jerry_i2s_interrupt_timer -= cycles;
 418                 if (jerry_i2s_interrupt_timer <= 0)
 419                 {
 420 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
 421                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
 422                         {
 423 //      return GetWordFromButchSSI(offset, who);
 424                                 SetSSIWordsXmittedFromButch();
 425                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 426                         }
 427                         jerry_i2s_interrupt_timer += 602;
 428                 }*/
 429
 430                 if (ButchIsReadyToSend())//Not sure this is right spot to check...
 431                 {
 432 //      return GetWordFromButchSSI(offset, who);
 433                         SetSSIWordsXmittedFromButch();
 434                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
 435                 }
 436
 437                 SetCallbackTime(JERRYI2SCallback, 22.675737);
 438         }
 439 }
 440
 441
 442 void JERRYInit(void)
 443 {
 444 //      clock_init();
 445 //      anajoy_init();
 446         JoystickInit();
 447         DACInit();
 448 //This should be handled with the cart initialization...
 449 //      eeprom_init();
 450 //      memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
 451         memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
 452
 453         JERRYPIT1Prescaler = 0xFFFF;
 454         JERRYPIT2Prescaler = 0xFFFF;
 455         JERRYPIT1Divider = 0xFFFF;
 456         JERRYPIT2Divider = 0xFFFF;
 457         jerryInterruptMask = 0x0000;
 458         jerryPendingInterrupt = 0x0000;
 459 }
 460
 461 void JERRYReset(void)
 462 {
 463 //      clock_reset();
 464 //      anajoy_reset();
 465         JoystickReset();
 466         EepromReset();
 467         JERRYResetI2S();
 468         DACReset();
 469
 470         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 471         JERRYPIT1Prescaler = 0xFFFF;
 472         JERRYPIT2Prescaler = 0xFFFF;
 473         JERRYPIT1Divider = 0xFFFF;
 474         JERRYPIT2Divider = 0xFFFF;
 475         jerry_timer_1_counter = 0;
 476         jerry_timer_2_counter = 0;
 477         jerryInterruptMask = 0x0000;
 478         jerryPendingInterrupt = 0x0000;
 479 }
 480
 481 void JERRYDone(void)
 482 {
 483         WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
 484 //      memory_free(jerry_ram_8);
 485 //      clock_done();
 486 //      anajoy_done();
 487         JoystickDone();
 488         DACDone();
 489         EepromDone();
 490 }
 491
 492 bool JERRYIRQEnabled(int irq)
 493 {
 494         // Read the word @ $F10020
 495 //      return jerry_ram_8[0x21] & (1 << irq);
 496         return jerryInterruptMask & irq;
 497 }
 498
 499 void JERRYSetPendingIRQ(int irq)
 500 {
 501         // This is the shadow of INT (it's a split RO/WO register)
 502 //      jerryIntPending |= (1 << irq);
 503         jerryPendingInterrupt |= irq;
 504 }
 505
 506 //
 507 // JERRY byte access (read)
 508 //
 509 uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
 510 {
 511 #ifdef JERRY_DEBUG
 512         WriteLog("JERRY: Reading byte at %06X\n", offset);
 513 #endif
 514         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 515                 return DSPReadByte(offset, who);
 516         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 517                 return DSPReadByte(offset, who);
 518         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 519         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 520                 return DACReadByte(offset, who);
 521 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 522 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 523 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 524 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 525 //This is WRONG!
 526 //      else if (offset >= 0xF10000 && offset <= 0xF10007)
 527 //This is still wrong. What needs to be returned here are the values being counted down
 528 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 529
 530 //This is probably the problem with the new timer code... This is invalid
 531 //under the new system... !!! FIX !!!
 532         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 533         {
 534 #ifndef NEW_TIMER_SYSTEM
 535 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 536                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 537                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 538                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 539                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 540
 541                 switch(offset & 0x0F)
 542                 {
 543                 case 6:
 544 //                      return JERRYPIT1Prescaler >> 8;
 545                         return counter1Hi >> 8;
 546                 case 7:
 547 //                      return JERRYPIT1Prescaler & 0xFF;
 548                         return counter1Hi & 0xFF;
 549                 case 8:
 550 //                      return JERRYPIT1Divider >> 8;
 551                         return counter1Lo >> 8;
 552                 case 9:
 553 //                      return JERRYPIT1Divider & 0xFF;
 554                         return counter1Lo & 0xFF;
 555                 case 10:
 556 //                      return JERRYPIT2Prescaler >> 8;
 557                         return counter2Hi >> 8;
 558                 case 11:
 559 //                      return JERRYPIT2Prescaler & 0xFF;
 560                         return counter2Hi & 0xFF;
 561                 case 12:
 562 //                      return JERRYPIT2Divider >> 8;
 563                         return counter2Lo >> 8;
 564                 case 13:
 565 //                      return JERRYPIT2Divider & 0xFF;
 566                         return counter2Lo & 0xFF;
 567                 }
 568 #else
 569 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
 570 #endif
 571         }
 572 //      else if (offset >= 0xF10010 && offset <= 0xF10015)
 573 //              return clock_byte_read(offset);
 574 //      else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 575 //              return anajoy_byte_read(offset);
 576         else if (offset >= 0xF14000 && offset <= 0xF14003)
 577                 return JoystickReadByte(offset) | EepromReadByte(offset);
 578         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 579                 return EepromReadByte(offset);
 580
 581         return jerry_ram_8[offset & 0xFFFF];
 582 }
 583
 584 //
 585 // JERRY word access (read)
 586 //
 587 uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
 588 {
 589 #ifdef JERRY_DEBUG
 590         WriteLog("JERRY: Reading word at %06X\n", offset);
 591 #endif
 592
 593         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 594                 return DSPReadWord(offset, who);
 595         else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
 596                 return DSPReadWord(offset, who);
 597         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
 598         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
 599                 return DACReadWord(offset, who);
 600 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
 601 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
 602 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
 603 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
 604 //This is WRONG!
 605 //      else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 606 //This is still wrong. What needs to be returned here are the values being counted down
 607 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
 608         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
 609         {
 610 #ifndef NEW_TIMER_SYSTEM
 611 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
 612                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
 613                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
 614                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
 615                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
 616
 617                 switch(offset & 0x0F)
 618                 {
 619                 case 6:
 620 //                      return JERRYPIT1Prescaler;
 621                         return counter1Hi;
 622                 case 8:
 623 //                      return JERRYPIT1Divider;
 624                         return counter1Lo;
 625                 case 10:
 626 //                      return JERRYPIT2Prescaler;
 627                         return counter2Hi;
 628                 case 12:
 629 //                      return JERRYPIT2Divider;
 630                         return counter2Lo;
 631                 }
 632                 // Unaligned word reads???
 633 #else
 634 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
 635 #endif
 636         }
 637 //      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 638 //              return clock_word_read(offset);
 639         else if (offset == 0xF10020)
 640 //              return jerryIntPending;
 641                 return jerryPendingInterrupt;
 642 //      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 643 //              return anajoy_word_read(offset);
 644         else if (offset == 0xF14000)
 645                 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
 646         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 647                 return JoystickReadWord(offset);
 648         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 649                 return EepromReadWord(offset);
 650
 651 /*if (offset >= 0xF1D000)
 652         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 653
 654         offset &= 0xFFFF;                               // Prevent crashing...!
 655         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 656 }
 657
 658 //
 659 // JERRY byte access (write)
 660 //
 661 void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
 662 {
 663 #ifdef JERRY_DEBUG
 664         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 665 #endif
 666         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 667         {
 668                 DSPWriteByte(offset, data, who);
 669                 return;
 670         }
 671         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 672         {
 673                 DSPWriteByte(offset, data, who);
 674                 return;
 675         }
 676         // SCLK ($F1A150--8 bits wide)
 677 //NOTE: This should be taken care of in DAC...
 678         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 679         {
 680 //              WriteLog("JERRY: Writing %02X to SCLK...\n", data);
 681                 if ((offset & 0x03) == 2)
 682                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
 683                 else
 684                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
 685
 686                 JERRYI2SInterruptTimer = -1;
 687 #ifndef NEW_TIMER_SYSTEM
 688                 jerry_i2s_exec(0);
 689 #else
 690                 RemoveCallback(JERRYI2SCallback);
 691                 JERRYI2SCallback();
 692 #endif
 693 //              return;
 694         }
 695         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 696         else if (offset >= 0xF1A148 && offset <= 0xF1A157)
 697         {
 698                 DACWriteByte(offset, data, who);
 699                 return;
 700         }
 701         else if (offset >= 0xF10000 && offset <= 0xF10007)
 702         {
 703 #ifndef NEW_TIMER_SYSTEM
 704                 switch (offset & 0x07)
 705                 {
 706                 case 0:
 707                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
 708                         JERRYResetPIT1();
 709                         break;
 710                 case 1:
 711                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
 712                         JERRYResetPIT1();
 713                         break;
 714                 case 2:
 715                         JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
 716                         JERRYResetPIT1();
 717                         break;
 718                 case 3:
 719                         JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
 720                         JERRYResetPIT1();
 721                         break;
 722                 case 4:
 723                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
 724                         JERRYResetPIT2();
 725                         break;
 726                 case 5:
 727                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
 728                         JERRYResetPIT2();
 729                         break;
 730                 case 6:
 731                         JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
 732                         JERRYResetPIT2();
 733                         break;
 734                 case 7:
 735                         JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
 736                         JERRYResetPIT2();
 737                 }
 738 #else
 739 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
 740 #endif
 741                 return;
 742         }
 743 /*      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 744         {
 745                 clock_byte_write(offset, data);
 746                 return;
 747         }//*/
 748         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 749         else if (offset >= 0xF10020 && offset <= 0xF10021)//WAS:23)
 750         {
 751                 if (offset == 0xF10020)
 752                 {
 753                         // Clear pending interrupts...
 754                         jerryPendingInterrupt &= ~data;
 755                 }
 756                 else if (offset == 0xF10021)
 757                         jerryInterruptMask = data;
 758 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
 759 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
 760         }
 761 /*      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 762         {
 763                 anajoy_byte_write(offset, data);
 764                 return;
 765         }*/
 766         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 767         {
 768                 JoystickWriteByte(offset, data);
 769                 EepromWriteByte(offset, data);
 770                 return;
 771         }
 772         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 773         {
 774                 EepromWriteByte(offset, data);
 775                 return;
 776         }
 777
 778 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 779         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 780                 return;
 781
 782         jerry_ram_8[offset & 0xFFFF] = data;
 783 }
 784
 785 //
 786 // JERRY word access (write)
 787 //
 788 void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
 789 {
 790 #ifdef JERRY_DEBUG
 791         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 792 #endif
 793 #if 1
 794 if (offset == 0xF10000)
 795         WriteLog("JERRY: JPIT1 word written by %s: %u\n", whoName[who], data);
 796 else if (offset == 0xF10002)
 797         WriteLog("JERRY: JPIT2 word written by %s: %u\n", whoName[who], data);
 798 else if (offset == 0xF10004)
 799         WriteLog("JERRY: JPIT3 word written by %s: %u\n", whoName[who], data);
 800 else if (offset == 0xF10006)
 801         WriteLog("JERRY: JPIT4 word written by %s: %u\n", whoName[who], data);
 802 else if (offset == 0xF10010)
 803         WriteLog("JERRY: CLK1 word written by %s: %u\n", whoName[who], data);
 804 else if (offset == 0xF10012)
 805         WriteLog("JERRY: CLK2 word written by %s: %u\n", whoName[who], data);
 806 else if (offset == 0xF10014)
 807         WriteLog("JERRY: CLK3 word written by %s: %u\n", whoName[who], data);
 808 //else if (offset == 0xF10020)
 809 //      WriteLog("JERRY: JINTCTRL word written by %s: $%04X\n", whoName[who], data);
 810 #endif
 811
 812         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 813         {
 814                 DSPWriteWord(offset, data, who);
 815                 return;
 816         }
 817         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 818         {
 819                 DSPWriteWord(offset, data, who);
 820                 return;
 821         }
 822 //NOTE: This should be taken care of in DAC...
 823         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
 824         {
 825                 WriteLog("JERRY: Writing %04X to SCLK (by %s)...\n", data, whoName[who]);
 826 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
 827                 JERRYI2SInterruptDivide = (uint8)data;
 828                 JERRYI2SInterruptTimer = -1;
 829 #ifndef NEW_TIMER_SYSTEM
 830                 jerry_i2s_exec(0);
 831 #else
 832                 RemoveCallback(JERRYI2SCallback);
 833                 JERRYI2SCallback();
 834 #endif
 835
 836                 DACWriteWord(offset, data, who);
 837                 return;
 838         }
 839         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
 840         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
 841         {
 842                 DACWriteWord(offset, data, who);
 843                 return;
 844         }
 845         else if (offset >= 0xF10000 && offset <= 0xF10007)
 846         {
 847 //#ifndef NEW_TIMER_SYSTEM
 848 #if 1
 849                 switch(offset & 0x07)
 850                 {
 851                 case 0:
 852                         JERRYPIT1Prescaler = data;
 853                         JERRYResetPIT1();
 854                         break;
 855                 case 2:
 856                         JERRYPIT1Divider = data;
 857                         JERRYResetPIT1();
 858                         break;
 859                 case 4:
 860                         JERRYPIT2Prescaler = data;
 861                         JERRYResetPIT2();
 862                         break;
 863                 case 6:
 864                         JERRYPIT2Divider = data;
 865                         JERRYResetPIT2();
 866                 }
 867                 // Need to handle (unaligned) cases???
 868 #else
 869 WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
 870 #endif
 871                 return;
 872         }
 873 /*      else if (offset >= 0xF10010 && offset < 0xF10016)
 874         {
 875                 clock_word_write(offset, data);
 876                 return;
 877         }//*/
 878         // JERRY -> 68K interrupt enables/latches (need to be handled!)
 879         else if (offset >= 0xF10020 && offset <= 0xF10022)
 880         {
 881                 jerryInterruptMask = data & 0xFF;
 882                 jerryPendingInterrupt &= ~(data >> 8);
 883 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
 884 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
 885                 return;
 886         }
 887 /*      else if (offset >= 0xF17C00 && offset < 0xF17C02)
 888         {
 889 //I think this was removed from the Jaguar. If so, then we don't need this...!
 890                 anajoy_word_write(offset, data);
 891                 return;
 892         }*/
 893         else if (offset >= 0xF14000 && offset < 0xF14003)
 894         {
 895                 JoystickWriteWord(offset, data);
 896                 EepromWriteWord(offset, data);
 897                 return;
 898         }
 899         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 900         {
 901                 EepromWriteWord(offset, data);
 902                 return;
 903         }
 904
 905 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 906         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 907                 return;
 908
 909         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 910         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 911 }