]> Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp
Minor fix to IRQ subsystem. Should fix games that expected DSP IRQs masked.
[virtualjaguar] / src / jerry.cpp
1 //
2 // JERRY Core
3 //
4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
6 // Cleanups/rewrites/fixes by James L. Hammons
7 //
8 // JLH = James L. Hammons
9 //
10 // WHO  WHEN        WHAT
11 // ---  ----------  -----------------------------------------------------------
12 // JLH  11/25/2009  Major rewrite of memory subsystem and handlers
13 //
14
15 // ------------------------------------------------------------
16 // JERRY REGISTERS (Mapped by Aaron Giles)
17 // ------------------------------------------------------------
18 // F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
19 // F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
20 // F10002            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
21 // F10004            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
22 // F10008            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
23 // F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
24 // F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
25 // F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
26 // F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
27 //                   W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
28 //                   W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
29 //                   W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
30 //                   W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
31 //                   W   -------x --------      (J_EXTCLR - clear external interrupts)
32 //                 R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
33 //                 R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
34 //                 R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
35 //                 R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
36 //                 R/W   -------- -------x      (J_EXTENA - enable external interrupts)
37 // F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
38 // F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
39 //                   W   -x------ --------      (TXBRK - transmit break)
40 //                   W   -------- -x------      (CLRERR - clear error)
41 //                   W   -------- --x-----      (RINTEN - enable receiver interrupts)
42 //                   W   -------- ---x----      (TINTEN - enable transmitter interrupts)
43 //                   W   -------- ----x---      (RXIPOL - receiver input polarity)
44 //                   W   -------- -----x--      (TXOPOL - transmitter output polarity)
45 //                   W   -------- ------x-      (PAREN - parity enable)
46 //                   W   -------- -------x      (ODD - odd parity select)
47 // F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
48 //                 R     x------- --------      (ERROR - OR of PE,FE,OE)
49 //                 R     -x------ --------      (TXBRK - transmit break)
50 //                 R     --x----- --------      (SERIN - serial input)
51 //                 R     ----x--- --------      (OE - overrun error)
52 //                 R     -----x-- --------      (FE - framing error)
53 //                 R     ------x- --------      (PE - parity error)
54 //                 R     -------x --------      (TBE - transmit buffer empty)
55 //                 R     -------- x-------      (RBF - receive buffer full)
56 //                 R     -------- ---x----      (TINTEN - enable transmitter interrupts)
57 //                 R     -------- ----x---      (RXIPOL - receiver input polarity)
58 //                 R     -------- -----x--      (TXOPOL - transmitter output polarity)
59 //                 R     -------- ------x-      (PAREN - parity enable)
60 //                 R     -------- -------x      (ODD - odd parity)
61 // F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
62 // F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
63 // F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
64 // F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
65 // F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
66 // ------------------------------------------------------------
67 // F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
68 // F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
69 // F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
70 //                   W   x------- --------      (enable joystick outputs)
71 //                   W   -------- xxxxxxxx      (joystick output data)
72 // F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
73 // F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved (CD-ROM? no.)
74 // F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
75 // F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
76 // F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
77 // F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
78 // F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
79 // ------------------------------------------------------------
80 // F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
81 // F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
82 //                 R/W   x------- --------      (DMAEN - DMA enable)
83 //                 R/W   -x------ --------      (REGPAGE - register page)
84 //                   W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
85 //                   W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
86 //                   W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
87 //                   W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
88 //                   W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
89 //                 R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
90 //                 R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
91 //                 R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
92 //                 R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
93 //                 R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
94 //                 R/W   -------- ----x---      (IMASK - interrupt mask)
95 //                 R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
96 //                 R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
97 //                 R/W   -------- -------x      (ZERO_FLAG - ALU zero)
98 // F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
99 //                 R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
100 //                 R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
101 // F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
102 //                   W   -------- ----x---      (MATCOL - column/row major)
103 //                   W   -------- -----xxx      (MATRIX3-15 - matrix width)
104 // F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
105 // F1A10C            W   -------- -----x-x   D_END - data organization register
106 //                   W   -------- -----x--      (BIG_INST - big endian instruction fetch)
107 //                   W   -------- -------x      (BIG_IO - big endian I/O)
108 // F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
109 // F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
110 //                 R     xxxx---- --------      (VERSION - DSP version code)
111 //                 R/W   ----x--- --------      (BUS_HOG - hog the bus!)
112 //                 R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
113 //                 R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
114 //                 R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
115 //                 R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
116 //                 R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
117 //                 R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
118 //                 R/W   -------- ----x---      (SINGLE_STEP - single step mode)
119 //                 R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
120 //                 R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
121 //                 R/W   -------- -------x      (DSPGO - enable DSP execution)
122 // F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
123 //                 R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
124 // F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
125 // F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
126 // F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
127 //                   W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
128 // F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
129 // F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
130 // F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
131 // F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
132 // F1A150          R     -------- ------xx   SSTAT
133 //                 R     -------- ------x-      (left - no description)
134 //                 R     -------- -------x      (WS - word strobe status)
135 // F1A154            W   -------- --xxxx-x   SMODE - serial mode
136 //                   W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
137 //                   W   -------- ---x----      (FALLING - interrupt on falling edge)
138 //                   W   -------- ----x---      (RISING - interrupt of rising edge)
139 //                   W   -------- -----x--      (WSEN - enable word strobes)
140 //                   W   -------- -------x      (INTERNAL - enables serial clock)
141 // ------------------------------------------------------------
142 // F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
143 // ------------------------------------------------------------
144 // F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
145 // F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
146 // F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
147 // F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
148 // F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
149 // F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
150 // F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
151 // F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
152 // ------------------------------------------------------------
153
154 #include "jerry.h"
155
156 #include <string.h>                                                             // For memcpy
157 //#include <math.h>
158 #include "cdrom.h"
159 #include "dac.h"
160 #include "dsp.h"
161 #include "eeprom.h"
162 #include "event.h"
163 #include "jaguar.h"
164 #include "joystick.h"
165 #include "log.h"
166 #include "m68k.h"
167 #include "tom.h"
168 //#include "memory.h"
169 #include "wavetable.h"
170
171 //Note that 44100 Hz requires samples every 22.675737 usec.
172 #define NEW_TIMER_SYSTEM
173 //#define JERRY_DEBUG
174
175 /*static*/ uint8 jerry_ram_8[0x10000];
176
177 //#define JERRY_CONFIG  0x4002                                          // ??? What's this ???
178
179 uint8 analog_x, analog_y;
180
181 static uint32 JERRYPIT1Prescaler;
182 static uint32 JERRYPIT1Divider;
183 static uint32 JERRYPIT2Prescaler;
184 static uint32 JERRYPIT2Divider;
185 static int32 jerry_timer_1_counter;
186 static int32 jerry_timer_2_counter;
187
188 uint32 JERRYI2SInterruptDivide = 8;
189 int32 JERRYI2SInterruptTimer = -1;
190 uint32 jerryI2SCycles;
191 uint32 jerryIntPending;
192
193 static uint16 jerryInterruptMask = 0;
194 static uint16 jerryPendingInterrupt = 0;
195 // Private function prototypes
196
197 void JERRYResetPIT1(void);
198 void JERRYResetPIT2(void);
199 void JERRYResetI2S(void);
200
201 void JERRYPIT1Callback(void);
202 void JERRYPIT2Callback(void);
203 void JERRYI2SCallback(void);
204
205 //This approach is probably wrong, since the timer is continuously counting down, though
206 //it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
207 //timeslice should be running during that phase... (The DSP needs to be aware of this!)
208
209 //This is only used by the old system, so once the new timer system is working this
210 //should be safe to nuke.
211 void JERRYI2SExec(uint32 cycles)
212 {
213 #ifndef NEW_TIMER_SYSTEM
214 #warning "externed var in source--should be in header file. !!! FIX !!!"
215         extern uint16 serialMode;                                               // From DAC.CPP
216         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
217         {
218
219         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
220 //Yes, it should. !!! FIX !!!
221                 JERRYI2SInterruptDivide &= 0xFF;
222
223                 if (JERRYI2SInterruptTimer == -1)
224                 {
225                 // We don't have to divide the RISC clock rate by this--the reason is a bit
226                 // convoluted. Will put explanation here later...
227 // What's needed here is to find the ratio of the frequency to the number of clock cycles
228 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
229 // this: 26590906 / 44100 = 602 cycles.
230 // Which means, every 602 cycles that go by we have to generate an interrupt.
231                         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
232                 }
233
234                 JERYI2SInterruptTimer -= cycles;
235                 if (JERRYI2SInterruptTimer <= 0)
236                 {
237 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
238                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
239                         JERRYI2SInterruptTimer += jerryI2SCycles;
240 #ifdef JERRY_DEBUG
241                         if (JERRYI2SInterruptTimer < 0)
242                                 WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
243 #endif
244                 }
245         }
246         else                                                                                    // JERRY is slave to external word clock
247         {
248                 // This is just a temporary kludge to see if the CD bus mastering works
249                 // I.e., this is totally faked...!
250 // The whole interrupt system is pretty much borked and is need of an overhaul.
251 // What we need is a way of handling these interrupts when they happen instead of
252 // scanline boundaries the way it is now.
253                 JERRYI2SInterruptTimer -= cycles;
254                 if (JERRYI2SInterruptTimer <= 0)
255                 {
256 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
257                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
258                         {
259 //      return GetWordFromButchSSI(offset, who);
260                                 SetSSIWordsXmittedFromButch();
261                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
262                         }
263                         JERRYI2SInterruptTimer += 602;
264                 }
265         }
266 #else
267         RemoveCallback(JERRYI2SCallback);
268         JERRYI2SCallback();
269 #endif
270 }
271
272 //NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
273 void JERRYExecPIT(uint32 cycles)
274 {
275 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
276 //      if (jerry_timer_1_counter)
277                 jerry_timer_1_counter -= cycles;
278
279         if (jerry_timer_1_counter <= 0)
280         {
281 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
282                 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
283 //              JERRYResetPIT1();
284                 jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
285         }
286
287 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
288 //      if (jerry_timer_2_counter)
289                 jerry_timer_2_counter -= cycles;
290
291         if (jerry_timer_2_counter <= 0)
292         {
293 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
294                 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
295 //              JERRYResetPIT2();
296                 jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
297         }
298 }
299
300 void JERRYResetI2S(void)
301 {
302         //WriteLog("i2s: reseting\n");
303 //This is really SCLK... !!! FIX !!!
304         JERRYI2SInterruptDivide = 8;
305         JERRYI2SInterruptTimer = -1;
306 }
307
308 void JERRYResetPIT1(void)
309 {
310 #ifndef NEW_TIMER_SYSTEM
311 /*      if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
312                 jerry_timer_1_counter = 0;
313         else//*/
314 //Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
315                 jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
316
317 //      if (jerry_timer_1_counter)
318 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
319
320 #else
321         RemoveCallback(JERRYPIT1Callback);
322
323         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
324         {
325                 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
326                 SetCallbackTime(JERRYPIT1Callback, usecs);
327         }
328 #endif
329 }
330
331 void JERRYResetPIT2(void)
332 {
333 #ifndef NEW_TIMER_SYSTEM
334 /*      if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
335         {
336                 jerry_timer_2_counter = 0;
337                 return;
338         }
339         else//*/
340                 jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
341
342 //      if (jerry_timer_2_counter)
343 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
344
345 #else
346         RemoveCallback(JERRYPIT2Callback);
347
348         if (JERRYPIT1Prescaler | JERRYPIT1Divider)
349         {
350                 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
351                 SetCallbackTime(JERRYPIT2Callback, usecs);
352         }
353 #endif
354 }
355
356 // This is the cause of the regressions in Cybermorph and Missile Command 3D...
357 // Solution: Probably have to check the DSP enable bit before sending these thru.
358 //#define JERRY_NO_IRQS
359 void JERRYPIT1Callback(void)
360 {
361 #ifndef JERRY_NO_IRQS
362 //WriteLog("JERRY: In PIT1 callback, IRQM=$%04X\n", jerryInterruptMask);
363         if (TOMIRQEnabled(IRQ_DSP))
364         {
365                 if (jerryInterruptMask & IRQ2_TIMER1)           // CPU Timer 1 IRQ
366                 {
367 // Not sure, but I think we don't generate another IRQ if one's already going...
368 // But this seems to work... :-/
369                         jerryPendingInterrupt |= IRQ2_TIMER1;
370                         m68k_set_irq(2);                                                // Generate 68K IPL 2
371                 }
372         }
373 #endif
374
375         DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
376         JERRYResetPIT1();
377 }
378
379 void JERRYPIT2Callback(void)
380 {
381 #ifndef JERRY_NO_IRQS
382         if (TOMIRQEnabled(IRQ_DSP))
383         {
384 //WriteLog("JERRY: In PIT2 callback, IRQM=$%04X\n", jerryInterruptMask);
385                 if (jerryInterruptMask & IRQ2_TIMER2)           // CPU Timer 2 IRQ
386                 {
387                         jerryPendingInterrupt |= IRQ2_TIMER2;
388                         m68k_set_irq(2);                                                // Generate 68K IPL 2
389                 }
390         }
391 #endif
392
393         DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE);      // This does the 'IRQ enabled' checking...
394         JERRYResetPIT2();
395 }
396
397 void JERRYI2SCallback(void)
398 {
399         // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
400 //Yes, it should. !!! FIX !!!
401 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
402         JERRYI2SInterruptDivide &= 0xFF;
403         // We don't have to divide the RISC clock rate by this--the reason is a bit
404         // convoluted. Will put explanation here later...
405 // What's needed here is to find the ratio of the frequency to the number of clock cycles
406 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
407 // this: 26590906 / 44100 = 602 cycles.
408 // Which means, every 602 cycles that go by we have to generate an interrupt.
409         jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
410
411 //This should be in this file with an extern reference in the header file so that
412 //DAC.CPP can see it... !!! FIX !!!
413         extern uint16 serialMode;                                               // From DAC.CPP
414
415         if (serialMode & 0x01)                                                  // INTERNAL flag (JERRY is master)
416         {
417                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);         // This does the 'IRQ enabled' checking...
418                 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
419                 SetCallbackTime(JERRYI2SCallback, usecs);
420         }
421         else                                                                                    // JERRY is slave to external word clock
422         {
423 //Note that 44100 Hz requires samples every 22.675737 usec.
424 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
425 //sample rate or at a 88.2K sample rate (11.332... usec).
426 /*              // This is just a temporary kludge to see if the CD bus mastering works
427                 // I.e., this is totally faked...!
428 // The whole interrupt system is pretty much borked and is need of an overhaul.
429 // What we need is a way of handling these interrupts when they happen instead of
430 // scanline boundaries the way it is now.
431                 jerry_i2s_interrupt_timer -= cycles;
432                 if (jerry_i2s_interrupt_timer <= 0)
433                 {
434 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
435                         if (ButchIsReadyToSend())//Not sure this is right spot to check...
436                         {
437 //      return GetWordFromButchSSI(offset, who);
438                                 SetSSIWordsXmittedFromButch();
439                                 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
440                         }
441                         jerry_i2s_interrupt_timer += 602;
442                 }*/
443
444                 if (ButchIsReadyToSend())//Not sure this is right spot to check...
445                 {
446 //      return GetWordFromButchSSI(offset, who);
447                         SetSSIWordsXmittedFromButch();
448                         DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
449                 }
450
451                 SetCallbackTime(JERRYI2SCallback, 22.675737);
452         }
453 }
454
455
456 void JERRYInit(void)
457 {
458 //      clock_init();
459 //      anajoy_init();
460         JoystickInit();
461         DACInit();
462 //This should be handled with the cart initialization...
463 //      eeprom_init();
464 //      memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
465         memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
466
467         JERRYPIT1Prescaler = 0xFFFF;
468         JERRYPIT2Prescaler = 0xFFFF;
469         JERRYPIT1Divider = 0xFFFF;
470         JERRYPIT2Divider = 0xFFFF;
471         jerryInterruptMask = 0x0000;
472         jerryPendingInterrupt = 0x0000;
473 }
474
475 void JERRYReset(void)
476 {
477 //      clock_reset();
478 //      anajoy_reset();
479         JoystickReset();
480         EepromReset();
481         JERRYResetI2S();
482         DACReset();
483
484         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
485         JERRYPIT1Prescaler = 0xFFFF;
486         JERRYPIT2Prescaler = 0xFFFF;
487         JERRYPIT1Divider = 0xFFFF;
488         JERRYPIT2Divider = 0xFFFF;
489         jerry_timer_1_counter = 0;
490         jerry_timer_2_counter = 0;
491         jerryInterruptMask = 0x0000;
492         jerryPendingInterrupt = 0x0000;
493 }
494
495 void JERRYDone(void)
496 {
497         WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
498 //      memory_free(jerry_ram_8);
499 //      clock_done();
500 //      anajoy_done();
501         JoystickDone();
502         DACDone();
503         EepromDone();
504 }
505
506 bool JERRYIRQEnabled(int irq)
507 {
508         // Read the word @ $F10020
509 //      return jerry_ram_8[0x21] & (1 << irq);
510         return jerryInterruptMask & irq;
511 }
512
513 void JERRYSetPendingIRQ(int irq)
514 {
515         // This is the shadow of INT (it's a split RO/WO register)
516 //      jerryIntPending |= (1 << irq);
517         jerryPendingInterrupt |= irq;
518 }
519
520 //
521 // JERRY byte access (read)
522 //
523 uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
524 {
525 #ifdef JERRY_DEBUG
526         WriteLog("JERRY: Reading byte at %06X\n", offset);
527 #endif
528         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
529                 return DSPReadByte(offset, who);
530         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
531                 return DSPReadByte(offset, who);
532         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
533         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
534                 return DACReadByte(offset, who);
535 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
536 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
537 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
538 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
539 //This is WRONG!
540 //      else if (offset >= 0xF10000 && offset <= 0xF10007)
541 //This is still wrong. What needs to be returned here are the values being counted down
542 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
543
544 //This is probably the problem with the new timer code... This is invalid
545 //under the new system... !!! FIX !!!
546         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
547         {
548 #ifndef NEW_TIMER_SYSTEM
549 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
550                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
551                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
552                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
553                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
554
555                 switch(offset & 0x0F)
556                 {
557                 case 6:
558 //                      return JERRYPIT1Prescaler >> 8;
559                         return counter1Hi >> 8;
560                 case 7:
561 //                      return JERRYPIT1Prescaler & 0xFF;
562                         return counter1Hi & 0xFF;
563                 case 8:
564 //                      return JERRYPIT1Divider >> 8;
565                         return counter1Lo >> 8;
566                 case 9:
567 //                      return JERRYPIT1Divider & 0xFF;
568                         return counter1Lo & 0xFF;
569                 case 10:
570 //                      return JERRYPIT2Prescaler >> 8;
571                         return counter2Hi >> 8;
572                 case 11:
573 //                      return JERRYPIT2Prescaler & 0xFF;
574                         return counter2Hi & 0xFF;
575                 case 12:
576 //                      return JERRYPIT2Divider >> 8;
577                         return counter2Lo >> 8;
578                 case 13:
579 //                      return JERRYPIT2Divider & 0xFF;
580                         return counter2Lo & 0xFF;
581                 }
582 #else
583 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
584 #endif
585         }
586 //      else if (offset >= 0xF10010 && offset <= 0xF10015)
587 //              return clock_byte_read(offset);
588 //      else if (offset >= 0xF17C00 && offset <= 0xF17C01)
589 //              return anajoy_byte_read(offset);
590         else if (offset >= 0xF14000 && offset <= 0xF14003)
591                 return JoystickReadByte(offset) | EepromReadByte(offset);
592         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
593                 return EepromReadByte(offset);
594
595         return jerry_ram_8[offset & 0xFFFF];
596 }
597
598 //
599 // JERRY word access (read)
600 //
601 uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
602 {
603 #ifdef JERRY_DEBUG
604         WriteLog("JERRY: Reading word at %06X\n", offset);
605 #endif
606
607         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
608                 return DSPReadWord(offset, who);
609         else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
610                 return DSPReadWord(offset, who);
611         // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
612         else if (offset >= 0xF1A148 && offset <= 0xF1A153)
613                 return DACReadWord(offset, who);
614 //      F10036          R     xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
615 //      F10038          R     xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
616 //      F1003A          R     xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
617 //      F1003C          R     xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
618 //This is WRONG!
619 //      else if ((offset >= 0xF10000) && (offset <= 0xF10007))
620 //This is still wrong. What needs to be returned here are the values being counted down
621 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
622         else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
623         {
624 #ifndef NEW_TIMER_SYSTEM
625 //              jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
626                 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
627                 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
628                 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
629                 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
630
631                 switch(offset & 0x0F)
632                 {
633                 case 6:
634 //                      return JERRYPIT1Prescaler;
635                         return counter1Hi;
636                 case 8:
637 //                      return JERRYPIT1Divider;
638                         return counter1Lo;
639                 case 10:
640 //                      return JERRYPIT2Prescaler;
641                         return counter2Hi;
642                 case 12:
643 //                      return JERRYPIT2Divider;
644                         return counter2Lo;
645                 }
646                 // Unaligned word reads???
647 #else
648 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
649 #endif
650         }
651 //      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
652 //              return clock_word_read(offset);
653         else if (offset == 0xF10020)
654 //              return jerryIntPending;
655                 return jerryPendingInterrupt;
656 //      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
657 //              return anajoy_word_read(offset);
658         else if (offset == 0xF14000)
659                 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
660         else if ((offset >= 0xF14002) && (offset < 0xF14003))
661                 return JoystickReadWord(offset);
662         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
663                 return EepromReadWord(offset);
664
665 /*if (offset >= 0xF1D000)
666         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
667
668         offset &= 0xFFFF;                               // Prevent crashing...!
669         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
670 }
671
672 //
673 // JERRY byte access (write)
674 //
675 void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
676 {
677 #ifdef JERRY_DEBUG
678         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
679 #endif
680         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
681         {
682                 DSPWriteByte(offset, data, who);
683                 return;
684         }
685         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
686         {
687                 DSPWriteByte(offset, data, who);
688                 return;
689         }
690         // SCLK ($F1A150--8 bits wide)
691 //NOTE: This should be taken care of in DAC...
692         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
693         {
694 //              WriteLog("JERRY: Writing %02X to SCLK...\n", data);
695                 if ((offset & 0x03) == 2)
696                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
697                 else
698                         JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
699
700                 JERRYI2SInterruptTimer = -1;
701 #ifndef NEW_TIMER_SYSTEM
702                 jerry_i2s_exec(0);
703 #else
704                 RemoveCallback(JERRYI2SCallback);
705                 JERRYI2SCallback();
706 #endif
707 //              return;
708         }
709         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
710         else if (offset >= 0xF1A148 && offset <= 0xF1A157)
711         {
712                 DACWriteByte(offset, data, who);
713                 return;
714         }
715         else if (offset >= 0xF10000 && offset <= 0xF10007)
716         {
717 #ifndef NEW_TIMER_SYSTEM
718                 switch (offset & 0x07)
719                 {
720                 case 0:
721                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
722                         JERRYResetPIT1();
723                         break;
724                 case 1:
725                         JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
726                         JERRYResetPIT1();
727                         break;
728                 case 2:
729                         JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
730                         JERRYResetPIT1();
731                         break;
732                 case 3:
733                         JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
734                         JERRYResetPIT1();
735                         break;
736                 case 4:
737                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
738                         JERRYResetPIT2();
739                         break;
740                 case 5:
741                         JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
742                         JERRYResetPIT2();
743                         break;
744                 case 6:
745                         JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
746                         JERRYResetPIT2();
747                         break;
748                 case 7:
749                         JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
750                         JERRYResetPIT2();
751                 }
752 #else
753 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
754 #endif
755                 return;
756         }
757 /*      else if ((offset >= 0xF10010) && (offset <= 0xF10015))
758         {
759                 clock_byte_write(offset, data);
760                 return;
761         }//*/
762         // JERRY -> 68K interrupt enables/latches (need to be handled!)
763         else if (offset >= 0xF10020 && offset <= 0xF10021)//WAS:23)
764         {
765                 if (offset == 0xF10020)
766                 {
767                         // Clear pending interrupts...
768                         jerryPendingInterrupt &= ~data;
769                 }
770                 else if (offset == 0xF10021)
771                         jerryInterruptMask = data;
772 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
773 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
774         }
775 /*      else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
776         {
777                 anajoy_byte_write(offset, data);
778                 return;
779         }*/
780         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
781         {
782                 JoystickWriteByte(offset, data);
783                 EepromWriteByte(offset, data);
784                 return;
785         }
786         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
787         {
788                 EepromWriteByte(offset, data);
789                 return;
790         }
791
792 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
793         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
794                 return;
795
796         jerry_ram_8[offset & 0xFFFF] = data;
797 }
798
799 //
800 // JERRY word access (write)
801 //
802 void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
803 {
804 #ifdef JERRY_DEBUG
805         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
806 #endif
807 #if 1
808 if (offset == 0xF10000)
809         WriteLog("JERRY: JPIT1 word written by %s: %u\n", whoName[who], data);
810 else if (offset == 0xF10002)
811         WriteLog("JERRY: JPIT2 word written by %s: %u\n", whoName[who], data);
812 else if (offset == 0xF10004)
813         WriteLog("JERRY: JPIT3 word written by %s: %u\n", whoName[who], data);
814 else if (offset == 0xF10006)
815         WriteLog("JERRY: JPIT4 word written by %s: %u\n", whoName[who], data);
816 else if (offset == 0xF10010)
817         WriteLog("JERRY: CLK1 word written by %s: %u\n", whoName[who], data);
818 else if (offset == 0xF10012)
819         WriteLog("JERRY: CLK2 word written by %s: %u\n", whoName[who], data);
820 else if (offset == 0xF10014)
821         WriteLog("JERRY: CLK3 word written by %s: %u\n", whoName[who], data);
822 //else if (offset == 0xF10020)
823 //      WriteLog("JERRY: JINTCTRL word written by %s: $%04X\n", whoName[who], data);
824 #endif
825
826         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
827         {
828                 DSPWriteWord(offset, data, who);
829                 return;
830         }
831         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
832         {
833                 DSPWriteWord(offset, data, who);
834                 return;
835         }
836 //NOTE: This should be taken care of in DAC...
837         else if (offset == 0xF1A152)                                    // Bottom half of SCLK ($F1A150)
838         {
839                 WriteLog("JERRY: Writing %04X to SCLK (by %s)...\n", data, whoName[who]);
840 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
841                 JERRYI2SInterruptDivide = (uint8)data;
842                 JERRYI2SInterruptTimer = -1;
843 #ifndef NEW_TIMER_SYSTEM
844                 jerry_i2s_exec(0);
845 #else
846                 RemoveCallback(JERRYI2SCallback);
847                 JERRYI2SCallback();
848 #endif
849
850                 DACWriteWord(offset, data, who);
851                 return;
852         }
853         // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
854         else if (offset >= 0xF1A148 && offset <= 0xF1A156)
855         {
856                 DACWriteWord(offset, data, who);
857                 return;
858         }
859         else if (offset >= 0xF10000 && offset <= 0xF10007)
860         {
861 //#ifndef NEW_TIMER_SYSTEM
862 #if 1
863                 switch(offset & 0x07)
864                 {
865                 case 0:
866                         JERRYPIT1Prescaler = data;
867                         JERRYResetPIT1();
868                         break;
869                 case 2:
870                         JERRYPIT1Divider = data;
871                         JERRYResetPIT1();
872                         break;
873                 case 4:
874                         JERRYPIT2Prescaler = data;
875                         JERRYResetPIT2();
876                         break;
877                 case 6:
878                         JERRYPIT2Divider = data;
879                         JERRYResetPIT2();
880                 }
881                 // Need to handle (unaligned) cases???
882 #else
883 WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
884 #endif
885                 return;
886         }
887 /*      else if (offset >= 0xF10010 && offset < 0xF10016)
888         {
889                 clock_word_write(offset, data);
890                 return;
891         }//*/
892         // JERRY -> 68K interrupt enables/latches (need to be handled!)
893         else if (offset >= 0xF10020 && offset <= 0xF10022)
894         {
895                 jerryInterruptMask = data & 0xFF;
896                 jerryPendingInterrupt &= ~(data >> 8);
897 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
898 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
899                 return;
900         }
901 /*      else if (offset >= 0xF17C00 && offset < 0xF17C02)
902         {
903 //I think this was removed from the Jaguar. If so, then we don't need this...!
904                 anajoy_word_write(offset, data);
905                 return;
906         }*/
907         else if (offset >= 0xF14000 && offset < 0xF14003)
908         {
909                 JoystickWriteWord(offset, data);
910                 EepromWriteWord(offset, data);
911                 return;
912         }
913         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
914         {
915                 EepromWriteWord(offset, data);
916                 return;
917         }
918
919 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
920         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
921                 return;
922
923         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
924         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
925 }