4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
6 // Cleanups/rewrites/fixes by James Hammons
8 // JLH = James Hammons <jlhamm@acm.org>
11 // --- ---------- -----------------------------------------------------------
12 // JLH 11/25/2009 Major rewrite of memory subsystem and handlers
15 // ------------------------------------------------------------
16 // JERRY REGISTERS (Mapped by Aaron Giles)
17 // ------------------------------------------------------------
18 // F10000-F13FFF R/W xxxxxxxx xxxxxxxx Jerry
19 // F10000 W xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
20 // F10002 W xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
21 // F10004 W xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
22 // F10008 W xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
23 // F10010 W ------xx xxxxxxxx CLK1 - processor clock divider
24 // F10012 W ------xx xxxxxxxx CLK2 - video clock divider
25 // F10014 W -------- --xxxxxx CLK3 - chroma clock divider
26 // F10020 R/W ---xxxxx ---xxxxx JINTCTRL - interrupt control register
27 // W ---x---- -------- (J_SYNCLR - clear synchronous serial intf ints)
28 // W ----x--- -------- (J_ASYNCLR - clear asynchronous serial intf ints)
29 // W -----x-- -------- (J_TIM2CLR - clear timer 2 [tempo] interrupts)
30 // W ------x- -------- (J_TIM1CLR - clear timer 1 [sample] interrupts)
31 // W -------x -------- (J_EXTCLR - clear external interrupts)
32 // R/W -------- ---x---- (J_SYNENA - enable synchronous serial intf ints)
33 // R/W -------- ----x--- (J_ASYNENA - enable asynchronous serial intf ints)
34 // R/W -------- -----x-- (J_TIM2ENA - enable timer 2 [tempo] interrupts)
35 // R/W -------- ------x- (J_TIM1ENA - enable timer 1 [sample] interrupts)
36 // R/W -------- -------x (J_EXTENA - enable external interrupts)
37 // F10030 R/W -------- xxxxxxxx ASIDATA - asynchronous serial data
38 // F10032 W -x------ -xxxxxxx ASICTRL - asynchronous serial control
39 // W -x------ -------- (TXBRK - transmit break)
40 // W -------- -x------ (CLRERR - clear error)
41 // W -------- --x----- (RINTEN - enable receiver interrupts)
42 // W -------- ---x---- (TINTEN - enable transmitter interrupts)
43 // W -------- ----x--- (RXIPOL - receiver input polarity)
44 // W -------- -----x-- (TXOPOL - transmitter output polarity)
45 // W -------- ------x- (PAREN - parity enable)
46 // W -------- -------x (ODD - odd parity select)
47 // F10032 R xxx-xxxx x-xxxxxx ASISTAT - asynchronous serial status
48 // R x------- -------- (ERROR - OR of PE,FE,OE)
49 // R -x------ -------- (TXBRK - transmit break)
50 // R --x----- -------- (SERIN - serial input)
51 // R ----x--- -------- (OE - overrun error)
52 // R -----x-- -------- (FE - framing error)
53 // R ------x- -------- (PE - parity error)
54 // R -------x -------- (TBE - transmit buffer empty)
55 // R -------- x------- (RBF - receive buffer full)
56 // R -------- ---x---- (TINTEN - enable transmitter interrupts)
57 // R -------- ----x--- (RXIPOL - receiver input polarity)
58 // R -------- -----x-- (TXOPOL - transmitter output polarity)
59 // R -------- ------x- (PAREN - parity enable)
60 // R -------- -------x (ODD - odd parity)
61 // F10034 R/W xxxxxxxx xxxxxxxx ASICLK - asynchronous serial interface clock
62 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
63 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
64 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
65 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
66 // ------------------------------------------------------------
67 // F14000-F17FFF R/W xxxxxxxx xxxxxxxx Joysticks and GPIO0-5
68 // F14000 R xxxxxxxx xxxxxxxx JOYSTICK - read joystick state
69 // F14000 W x------- xxxxxxxx JOYSTICK - latch joystick output
70 // W x------- -------- (enable joystick outputs)
71 // W -------- xxxxxxxx (joystick output data)
72 // F14002 R xxxxxxxx xxxxxxxx JOYBUTS - button register
73 // F14800-F14FFF R/W xxxxxxxx xxxxxxxx GPI00 - reserved (CD-ROM? no.)
74 // F15000-F15FFF R/W xxxxxxxx xxxxxxxx GPI01 - reserved
75 // F16000-F16FFF R/W xxxxxxxx xxxxxxxx GPI02 - reserved
76 // F17000-F177FF R/W xxxxxxxx xxxxxxxx GPI03 - reserved
77 // F17800-F17BFF R/W xxxxxxxx xxxxxxxx GPI04 - reserved
78 // F17C00-F17FFF R/W xxxxxxxx xxxxxxxx GPI05 - reserved
79 // ------------------------------------------------------------
80 // F18000-F1FFFF R/W xxxxxxxx xxxxxxxx Jerry DSP
81 // F1A100 R/W xxxxxxxx xxxxxxxx D_FLAGS - DSP flags register
82 // R/W x------- -------- (DMAEN - DMA enable)
83 // R/W -x------ -------- (REGPAGE - register page)
84 // W --x----- -------- (D_EXT0CLR - clear external interrupt 0)
85 // W ---x---- -------- (D_TIM2CLR - clear timer 2 interrupt)
86 // W ----x--- -------- (D_TIM1CLR - clear timer 1 interrupt)
87 // W -----x-- -------- (D_I2SCLR - clear I2S interrupt)
88 // W ------x- -------- (D_CPUCLR - clear CPU interrupt)
89 // R/W -------x -------- (D_EXT0ENA - enable external interrupt 0)
90 // R/W -------- x------- (D_TIM2ENA - enable timer 2 interrupt)
91 // R/W -------- -x------ (D_TIM1ENA - enable timer 1 interrupt)
92 // R/W -------- --x----- (D_I2SENA - enable I2S interrupt)
93 // R/W -------- ---x---- (D_CPUENA - enable CPU interrupt)
94 // R/W -------- ----x--- (IMASK - interrupt mask)
95 // R/W -------- -----x-- (NEGA_FLAG - ALU negative)
96 // R/W -------- ------x- (CARRY_FLAG - ALU carry)
97 // R/W -------- -------x (ZERO_FLAG - ALU zero)
98 // F1A102 R/W -------- ------xx D_FLAGS - upper DSP flags
99 // R/W -------- ------x- (D_EXT1ENA - enable external interrupt 1)
100 // R/W -------- -------x (D_EXT1CLR - clear external interrupt 1)
101 // F1A104 W -------- ----xxxx D_MTXC - matrix control register
102 // W -------- ----x--- (MATCOL - column/row major)
103 // W -------- -----xxx (MATRIX3-15 - matrix width)
104 // F1A108 W ----xxxx xxxxxx-- D_MTXA - matrix address register
105 // F1A10C W -------- -----x-x D_END - data organization register
106 // W -------- -----x-- (BIG_INST - big endian instruction fetch)
107 // W -------- -------x (BIG_IO - big endian I/O)
108 // F1A110 R/W xxxxxxxx xxxxxxxx D_PC - DSP program counter
109 // F1A114 R/W xxxxxxxx xx-xxxxx D_CTRL - DSP control/status register
110 // R xxxx---- -------- (VERSION - DSP version code)
111 // R/W ----x--- -------- (BUS_HOG - hog the bus!)
112 // R/W -----x-- -------- (D_EXT0LAT - external interrupt 0 latch)
113 // R/W ------x- -------- (D_TIM2LAT - timer 2 interrupt latch)
114 // R/W -------x -------- (D_TIM1LAT - timer 1 interrupt latch)
115 // R/W -------- x------- (D_I2SLAT - I2S interrupt latch)
116 // R/W -------- -x------ (D_CPULAT - CPU interrupt latch)
117 // R/W -------- ---x---- (SINGLE_GO - single step one instruction)
118 // R/W -------- ----x--- (SINGLE_STEP - single step mode)
119 // R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
120 // R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
121 // R/W -------- -------x (DSPGO - enable DSP execution)
122 // F1A116 R/W -------- -------x D_CTRL - upper DSP control/status register
123 // R/W -------- -------x (D_EXT1LAT - external interrupt 1 latch)
124 // F1A118-F1A11B W xxxxxxxx xxxxxxxx D_MOD - modulo instruction mask
125 // F1A11C-F1A11F R xxxxxxxx xxxxxxxx D_REMAIN - divide unit remainder
126 // F1A11C W -------- -------x D_DIVCTRL - divide unit control
127 // W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
128 // F1A120-F1A123 R xxxxxxxx xxxxxxxx D_MACHI - multiply & accumulate high bits
129 // F1A148 W xxxxxxxx xxxxxxxx R_DAC - right transmit data
130 // F1A14C W xxxxxxxx xxxxxxxx L_DAC - left transmit data
131 // F1A150 W -------- xxxxxxxx SCLK - serial clock frequency
132 // F1A150 R -------- ------xx SSTAT
133 // R -------- ------x- (left - no description)
134 // R -------- -------x (WS - word strobe status)
135 // F1A154 W -------- --xxxx-x SMODE - serial mode
136 // W -------- --x----- (EVERYWORD - interrupt on MSB of every word)
137 // W -------- ---x---- (FALLING - interrupt on falling edge)
138 // W -------- ----x--- (RISING - interrupt of rising edge)
139 // W -------- -----x-- (WSEN - enable word strobes)
140 // W -------- -------x (INTERNAL - enables serial clock)
141 // ------------------------------------------------------------
142 // F1B000-F1CFFF R/W xxxxxxxx xxxxxxxx Local DSP RAM
143 // ------------------------------------------------------------
144 // F1D000 R xxxxxxxx xxxxxxxx ROM_TRI - triangle wave
145 // F1D200 R xxxxxxxx xxxxxxxx ROM_SINE - full sine wave
146 // F1D400 R xxxxxxxx xxxxxxxx ROM_AMSINE - amplitude modulated sine wave
147 // F1D600 R xxxxxxxx xxxxxxxx ROM_12W - sine wave and second order harmonic
148 // F1D800 R xxxxxxxx xxxxxxxx ROM_CHIRP16 - chirp
149 // F1DA00 R xxxxxxxx xxxxxxxx ROM_NTRI - traingle wave with noise
150 // F1DC00 R xxxxxxxx xxxxxxxx ROM_DELTA - spike
151 // F1DE00 R xxxxxxxx xxxxxxxx ROM_NOISE - white noise
152 // ------------------------------------------------------------
156 #include <string.h> // For memcpy
164 #include "joystick.h"
167 #include "settings.h"
169 //#include "memory.h"
170 #include "wavetable.h"
172 //Note that 44100 Hz requires samples every 22.675737 usec.
173 #define NEW_TIMER_SYSTEM
174 //#define JERRY_DEBUG
176 /*static*/ uint8 jerry_ram_8[0x10000];
178 //#define JERRY_CONFIG 0x4002 // ??? What's this ???
180 uint8 analog_x, analog_y;
182 static uint32 JERRYPIT1Prescaler;
183 static uint32 JERRYPIT1Divider;
184 static uint32 JERRYPIT2Prescaler;
185 static uint32 JERRYPIT2Divider;
186 static int32 jerry_timer_1_counter;
187 static int32 jerry_timer_2_counter;
189 uint32 JERRYI2SInterruptDivide = 8;
190 int32 JERRYI2SInterruptTimer = -1;
191 uint32 jerryI2SCycles;
192 uint32 jerryIntPending;
194 static uint16 jerryInterruptMask = 0;
195 static uint16 jerryPendingInterrupt = 0;
196 // Private function prototypes
198 void JERRYResetPIT1(void);
199 void JERRYResetPIT2(void);
200 void JERRYResetI2S(void);
202 void JERRYPIT1Callback(void);
203 void JERRYPIT2Callback(void);
204 void JERRYI2SCallback(void);
206 //This approach is probably wrong, since the timer is continuously counting down, though
207 //it might only be a problem if the # of interrupts generated is greater than 1--the M68K's
208 //timeslice should be running during that phase... (The DSP needs to be aware of this!)
210 //This is only used by the old system, so once the new timer system is working this
211 //should be safe to nuke.
212 void JERRYI2SExec(uint32 cycles)
214 #ifndef NEW_TIMER_SYSTEM
215 #warning "externed var in source--should be in header file. !!! FIX !!!"
216 extern uint16 serialMode; // From DAC.CPP
217 if (serialMode & 0x01) // INTERNAL flag (JERRY is master)
220 // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
221 //Yes, it should. !!! FIX !!!
222 JERRYI2SInterruptDivide &= 0xFF;
224 if (JERRYI2SInterruptTimer == -1)
226 // We don't have to divide the RISC clock rate by this--the reason is a bit
227 // convoluted. Will put explanation here later...
228 // What's needed here is to find the ratio of the frequency to the number of clock cycles
229 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
230 // this: 26590906 / 44100 = 602 cycles.
231 // Which means, every 602 cycles that go by we have to generate an interrupt.
232 jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
235 JERYI2SInterruptTimer -= cycles;
236 if (JERRYI2SInterruptTimer <= 0)
238 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!!
239 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
240 JERRYI2SInterruptTimer += jerryI2SCycles;
242 if (JERRYI2SInterruptTimer < 0)
243 WriteLog("JERRY: Missed generating an interrupt (missed %u)!\n", (-JERRYI2SInterruptTimer / jerryI2SCycles) + 1);
247 else // JERRY is slave to external word clock
249 // This is just a temporary kludge to see if the CD bus mastering works
250 // I.e., this is totally faked...!
251 // The whole interrupt system is pretty much borked and is need of an overhaul.
252 // What we need is a way of handling these interrupts when they happen instead of
253 // scanline boundaries the way it is now.
254 JERRYI2SInterruptTimer -= cycles;
255 if (JERRYI2SInterruptTimer <= 0)
257 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
258 if (ButchIsReadyToSend())//Not sure this is right spot to check...
260 // return GetWordFromButchSSI(offset, who);
261 SetSSIWordsXmittedFromButch();
262 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
264 JERRYI2SInterruptTimer += 602;
268 RemoveCallback(JERRYI2SCallback);
273 //NOTE: This is only used by the old execution core. Safe to nuke once it's stable.
274 void JERRYExecPIT(uint32 cycles)
276 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
277 // if (jerry_timer_1_counter)
278 jerry_timer_1_counter -= cycles;
280 if (jerry_timer_1_counter <= 0)
282 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
283 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE); // This does the 'IRQ enabled' checking...
285 jerry_timer_1_counter += (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
288 //This is wrong too: Counters are *always* spinning! !!! FIX !!! [DONE]
289 // if (jerry_timer_2_counter)
290 jerry_timer_2_counter -= cycles;
292 if (jerry_timer_2_counter <= 0)
294 //Also, it can generate a CPU interrupt as well... !!! FIX !!! or does it? Maybe it goes Timer->GPU->CPU?
295 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE); // This does the 'IRQ enabled' checking...
297 jerry_timer_2_counter += (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
301 void JERRYResetI2S(void)
303 //WriteLog("i2s: reseting\n");
304 //This is really SCLK... !!! FIX !!!
305 JERRYI2SInterruptDivide = 8;
306 JERRYI2SInterruptTimer = -1;
309 void JERRYResetPIT1(void)
311 #ifndef NEW_TIMER_SYSTEM
312 /* if (!JERRYPIT1Prescaler || !JERRYPIT1Divider)
313 jerry_timer_1_counter = 0;
315 //Small problem with this approach: Overflow if both are = $FFFF. !!! FIX !!!
316 jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
318 // if (jerry_timer_1_counter)
319 // WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
322 RemoveCallback(JERRYPIT1Callback);
324 if (JERRYPIT1Prescaler | JERRYPIT1Divider)
326 double usecs = (float)(JERRYPIT1Prescaler + 1) * (float)(JERRYPIT1Divider + 1) * RISC_CYCLE_IN_USEC;
327 SetCallbackTime(JERRYPIT1Callback, usecs);
332 void JERRYResetPIT2(void)
334 #ifndef NEW_TIMER_SYSTEM
335 /* if (!JERRYPIT2Prescaler || !JERRYPIT2Divider)
337 jerry_timer_2_counter = 0;
341 jerry_timer_2_counter = (JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1);
343 // if (jerry_timer_2_counter)
344 // WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
347 RemoveCallback(JERRYPIT2Callback);
349 if (JERRYPIT1Prescaler | JERRYPIT1Divider)
351 double usecs = (float)(JERRYPIT2Prescaler + 1) * (float)(JERRYPIT2Divider + 1) * RISC_CYCLE_IN_USEC;
352 SetCallbackTime(JERRYPIT2Callback, usecs);
357 // This is the cause of the regressions in Cybermorph and Missile Command 3D...
358 // Solution: Probably have to check the DSP enable bit before sending these thru.
359 //#define JERRY_NO_IRQS
360 void JERRYPIT1Callback(void)
362 #ifndef JERRY_NO_IRQS
363 //WriteLog("JERRY: In PIT1 callback, IRQM=$%04X\n", jerryInterruptMask);
364 if (TOMIRQEnabled(IRQ_DSP))
366 if (jerryInterruptMask & IRQ2_TIMER1) // CPU Timer 1 IRQ
368 // Not sure, but I think we don't generate another IRQ if one's already going...
369 // But this seems to work... :-/
370 jerryPendingInterrupt |= IRQ2_TIMER1;
371 m68k_set_irq(2); // Generate 68K IPL 2
376 DSPSetIRQLine(DSPIRQ_TIMER0, ASSERT_LINE); // This does the 'IRQ enabled' checking...
380 void JERRYPIT2Callback(void)
382 #ifndef JERRY_NO_IRQS
383 if (TOMIRQEnabled(IRQ_DSP))
385 //WriteLog("JERRY: In PIT2 callback, IRQM=$%04X\n", jerryInterruptMask);
386 if (jerryInterruptMask & IRQ2_TIMER2) // CPU Timer 2 IRQ
388 jerryPendingInterrupt |= IRQ2_TIMER2;
389 m68k_set_irq(2); // Generate 68K IPL 2
394 DSPSetIRQLine(DSPIRQ_TIMER1, ASSERT_LINE); // This does the 'IRQ enabled' checking...
398 void JERRYI2SCallback(void)
400 // Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP???
401 //Yes, it should. !!! FIX !!!
402 #warning "Why is it called this? Instead of SCLK? Shouldn't this be read from DAC.CPP??? Yes, it should. !!! FIX !!!"
403 JERRYI2SInterruptDivide &= 0xFF;
404 // We don't have to divide the RISC clock rate by this--the reason is a bit
405 // convoluted. Will put explanation here later...
406 // What's needed here is to find the ratio of the frequency to the number of clock cycles
407 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
408 // this: 26590906 / 44100 = 602 cycles.
409 // Which means, every 602 cycles that go by we have to generate an interrupt.
410 jerryI2SCycles = 32 * (2 * (JERRYI2SInterruptDivide + 1));
412 //This should be in this file with an extern reference in the header file so that
413 //DAC.CPP can see it... !!! FIX !!!
414 extern uint16 serialMode; // From DAC.CPP
416 if (serialMode & 0x01) // INTERNAL flag (JERRY is master)
418 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE); // This does the 'IRQ enabled' checking...
419 double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
420 SetCallbackTime(JERRYI2SCallback, usecs);
422 else // JERRY is slave to external word clock
424 //Note that 44100 Hz requires samples every 22.675737 usec.
425 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
426 //sample rate or at a 88.2K sample rate (11.332... usec).
427 /* // This is just a temporary kludge to see if the CD bus mastering works
428 // I.e., this is totally faked...!
429 // The whole interrupt system is pretty much borked and is need of an overhaul.
430 // What we need is a way of handling these interrupts when they happen instead of
431 // scanline boundaries the way it is now.
432 jerry_i2s_interrupt_timer -= cycles;
433 if (jerry_i2s_interrupt_timer <= 0)
435 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
436 if (ButchIsReadyToSend())//Not sure this is right spot to check...
438 // return GetWordFromButchSSI(offset, who);
439 SetSSIWordsXmittedFromButch();
440 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
442 jerry_i2s_interrupt_timer += 602;
445 if (ButchIsReadyToSend())//Not sure this is right spot to check...
447 // return GetWordFromButchSSI(offset, who);
448 SetSSIWordsXmittedFromButch();
449 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
452 SetCallbackTime(JERRYI2SCallback, 22.675737);
461 memcpy(&jerry_ram_8[0xD000], waveTableROM, 0x1000);
463 JERRYPIT1Prescaler = 0xFFFF;
464 JERRYPIT2Prescaler = 0xFFFF;
465 JERRYPIT1Divider = 0xFFFF;
466 JERRYPIT2Divider = 0xFFFF;
467 jerryInterruptMask = 0x0000;
468 jerryPendingInterrupt = 0x0000;
471 void JERRYReset(void)
478 memset(jerry_ram_8, 0x00, 0xD000); // Don't clear out the Wavetable ROM...!
479 JERRYPIT1Prescaler = 0xFFFF;
480 JERRYPIT2Prescaler = 0xFFFF;
481 JERRYPIT1Divider = 0xFFFF;
482 JERRYPIT2Divider = 0xFFFF;
483 jerry_timer_1_counter = 0;
484 jerry_timer_2_counter = 0;
485 jerryInterruptMask = 0x0000;
486 jerryPendingInterrupt = 0x0000;
491 WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8, 0x20));
497 bool JERRYIRQEnabled(int irq)
499 // Read the word @ $F10020
500 // return jerry_ram_8[0x21] & (1 << irq);
501 return jerryInterruptMask & irq;
504 void JERRYSetPendingIRQ(int irq)
506 // This is the shadow of INT (it's a split RO/WO register)
507 // jerryIntPending |= (1 << irq);
508 jerryPendingInterrupt |= irq;
512 // JERRY byte access (read)
514 uint8 JERRYReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
517 WriteLog("JERRY: Reading byte at %06X\n", offset);
519 if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
520 return DSPReadByte(offset, who);
521 else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
522 return DSPReadByte(offset, who);
523 // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
524 else if (offset >= 0xF1A148 && offset <= 0xF1A153)
525 return DACReadByte(offset, who);
526 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
527 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
528 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
529 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
531 // else if (offset >= 0xF10000 && offset <= 0xF10007)
532 //This is still wrong. What needs to be returned here are the values being counted down
533 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
535 //This is probably the problem with the new timer code... This is invalid
536 //under the new system... !!! FIX !!!
537 else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
539 #ifndef NEW_TIMER_SYSTEM
540 // jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
541 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
542 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
543 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
544 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
546 switch(offset & 0x0F)
549 // return JERRYPIT1Prescaler >> 8;
550 return counter1Hi >> 8;
552 // return JERRYPIT1Prescaler & 0xFF;
553 return counter1Hi & 0xFF;
555 // return JERRYPIT1Divider >> 8;
556 return counter1Lo >> 8;
558 // return JERRYPIT1Divider & 0xFF;
559 return counter1Lo & 0xFF;
561 // return JERRYPIT2Prescaler >> 8;
562 return counter2Hi >> 8;
564 // return JERRYPIT2Prescaler & 0xFF;
565 return counter2Hi & 0xFF;
567 // return JERRYPIT2Divider >> 8;
568 return counter2Lo >> 8;
570 // return JERRYPIT2Divider & 0xFF;
571 return counter2Lo & 0xFF;
574 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset);
577 // else if (offset >= 0xF10010 && offset <= 0xF10015)
578 // return clock_byte_read(offset);
579 // else if (offset >= 0xF17C00 && offset <= 0xF17C01)
580 // return anajoy_byte_read(offset);
581 else if (offset >= 0xF14000 && offset <= 0xF14003)
582 return JoystickReadByte(offset) | EepromReadByte(offset);
583 else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
584 return EepromReadByte(offset);
586 return jerry_ram_8[offset & 0xFFFF];
590 // JERRY word access (read)
592 uint16 JERRYReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
595 WriteLog("JERRY: Reading word at %06X\n", offset);
598 if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
599 return DSPReadWord(offset, who);
600 else if (offset >= DSP_WORK_RAM_BASE && offset <= DSP_WORK_RAM_BASE + 0x1FFF)
601 return DSPReadWord(offset, who);
602 // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
603 else if (offset >= 0xF1A148 && offset <= 0xF1A153)
604 return DACReadWord(offset, who);
605 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
606 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
607 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
608 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
610 // else if ((offset >= 0xF10000) && (offset <= 0xF10007))
611 //This is still wrong. What needs to be returned here are the values being counted down
612 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
613 else if ((offset >= 0xF10036) && (offset <= 0xF1003D))
615 #ifndef NEW_TIMER_SYSTEM
616 // jerry_timer_1_counter = (JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1);
617 uint32 counter1Hi = (jerry_timer_1_counter / (JERRYPIT1Divider + 1)) - 1;
618 uint32 counter1Lo = (jerry_timer_1_counter % (JERRYPIT1Divider + 1)) - 1;
619 uint32 counter2Hi = (jerry_timer_2_counter / (JERRYPIT2Divider + 1)) - 1;
620 uint32 counter2Lo = (jerry_timer_2_counter % (JERRYPIT2Divider + 1)) - 1;
622 switch(offset & 0x0F)
625 // return JERRYPIT1Prescaler;
628 // return JERRYPIT1Divider;
631 // return JERRYPIT2Prescaler;
634 // return JERRYPIT2Divider;
637 // Unaligned word reads???
639 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset);
642 // else if ((offset >= 0xF10010) && (offset <= 0xF10015))
643 // return clock_word_read(offset);
644 else if (offset == 0xF10020)
645 // return jerryIntPending;
646 return jerryPendingInterrupt;
647 // else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
648 // return anajoy_word_read(offset);
649 else if (offset == 0xF14000)
650 return (JoystickReadWord(offset) & 0xFFFE) | EepromReadWord(offset);
651 else if ((offset >= 0xF14002) && (offset < 0xF14003))
652 return JoystickReadWord(offset);
653 else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
654 return EepromReadWord(offset);
656 /*if (offset >= 0xF1D000)
657 WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
659 offset &= 0xFFFF; // Prevent crashing...!
660 return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
664 // JERRY byte access (write)
666 void JERRYWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
669 WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
671 if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
673 DSPWriteByte(offset, data, who);
676 else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
678 DSPWriteByte(offset, data, who);
681 // SCLK ($F1A150--8 bits wide)
682 //NOTE: This should be taken care of in DAC...
683 else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
685 // WriteLog("JERRY: Writing %02X to SCLK...\n", data);
686 if ((offset & 0x03) == 2)
687 JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0x00FF) | ((uint32)data << 8);
689 JERRYI2SInterruptDivide = (JERRYI2SInterruptDivide & 0xFF00) | (uint32)data;
691 JERRYI2SInterruptTimer = -1;
692 #ifndef NEW_TIMER_SYSTEM
695 RemoveCallback(JERRYI2SCallback);
700 // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
701 else if (offset >= 0xF1A148 && offset <= 0xF1A157)
703 DACWriteByte(offset, data, who);
706 else if (offset >= 0xF10000 && offset <= 0xF10007)
708 #ifndef NEW_TIMER_SYSTEM
709 switch (offset & 0x07)
712 JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0x00FF) | (data << 8);
716 JERRYPIT1Prescaler = (JERRYPIT1Prescaler & 0xFF00) | data;
720 JERRYPIT1Divider = (JERRYPIT1Divider & 0x00FF) | (data << 8);
724 JERRYPIT1Divider = (JERRYPIT1Divider & 0xFF00) | data;
728 JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0x00FF) | (data << 8);
732 JERRYPIT2Prescaler = (JERRYPIT2Prescaler & 0xFF00) | data;
736 JERRYPIT2Divider = (JERRYPIT2Divider & 0x00FF) | (data << 8);
740 JERRYPIT2Divider = (JERRYPIT2Divider & 0xFF00) | data;
744 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset);
748 /* else if ((offset >= 0xF10010) && (offset <= 0xF10015))
750 clock_byte_write(offset, data);
753 // JERRY -> 68K interrupt enables/latches (need to be handled!)
754 else if (offset >= 0xF10020 && offset <= 0xF10021)//WAS:23)
756 if (offset == 0xF10020)
758 // Clear pending interrupts...
759 jerryPendingInterrupt &= ~data;
761 else if (offset == 0xF10021)
762 jerryInterruptMask = data;
763 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
764 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
766 /* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
768 anajoy_byte_write(offset, data);
771 else if ((offset >= 0xF14000) && (offset <= 0xF14003))
773 JoystickWriteByte(offset, data);
774 EepromWriteByte(offset, data);
777 else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
779 EepromWriteByte(offset, data);
783 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
784 if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
787 jerry_ram_8[offset & 0xFFFF] = data;
791 // JERRY word access (write)
793 void JERRYWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
796 WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
799 if (offset == 0xF10000)
800 WriteLog("JERRY: JPIT1 word written by %s: %u\n", whoName[who], data);
801 else if (offset == 0xF10002)
802 WriteLog("JERRY: JPIT2 word written by %s: %u\n", whoName[who], data);
803 else if (offset == 0xF10004)
804 WriteLog("JERRY: JPIT3 word written by %s: %u\n", whoName[who], data);
805 else if (offset == 0xF10006)
806 WriteLog("JERRY: JPIT4 word written by %s: %u\n", whoName[who], data);
807 else if (offset == 0xF10010)
808 WriteLog("JERRY: CLK1 word written by %s: %u\n", whoName[who], data);
809 else if (offset == 0xF10012)
810 WriteLog("JERRY: CLK2 word written by %s: %u\n", whoName[who], data);
811 else if (offset == 0xF10014)
812 WriteLog("JERRY: CLK3 word written by %s: %u\n", whoName[who], data);
813 //else if (offset == 0xF1A100)
814 // WriteLog("JERRY: D_FLAGS word written by %s: %u\n", whoName[who], data);
815 //else if (offset == 0xF1A102)
816 // WriteLog("JERRY: D_FLAGS+2 word written by %s: %u\n", whoName[who], data);
817 //else if (offset == 0xF10020)
818 // WriteLog("JERRY: JINTCTRL word written by %s: $%04X\n", whoName[who], data);
821 if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
823 DSPWriteWord(offset, data, who);
826 else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
828 DSPWriteWord(offset, data, who);
831 //NOTE: This should be taken care of in DAC...
832 else if (offset == 0xF1A152) // Bottom half of SCLK ($F1A150)
834 WriteLog("JERRY: Writing $%X to SCLK (by %s)...\n", data, whoName[who]);
835 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
836 JERRYI2SInterruptDivide = (uint8)data;
837 JERRYI2SInterruptTimer = -1;
838 #ifndef NEW_TIMER_SYSTEM
841 RemoveCallback(JERRYI2SCallback);
845 DACWriteWord(offset, data, who);
848 // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
849 else if (offset >= 0xF1A148 && offset <= 0xF1A156)
851 DACWriteWord(offset, data, who);
854 else if (offset >= 0xF10000 && offset <= 0xF10007)
856 //#ifndef NEW_TIMER_SYSTEM
858 switch(offset & 0x07)
861 JERRYPIT1Prescaler = data;
865 JERRYPIT1Divider = data;
869 JERRYPIT2Prescaler = data;
873 JERRYPIT2Divider = data;
876 // Need to handle (unaligned) cases???
878 WriteLog("JERRY: Unhandled timer write %04X (WORD) at %08X by %s...\n", data, offset, whoName[who]);
882 /* else if (offset >= 0xF10010 && offset < 0xF10016)
884 clock_word_write(offset, data);
887 // JERRY -> 68K interrupt enables/latches (need to be handled!)
888 else if (offset >= 0xF10020 && offset <= 0xF10022)
890 jerryInterruptMask = data & 0xFF;
891 jerryPendingInterrupt &= ~(data >> 8);
892 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
893 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
896 /* else if (offset >= 0xF17C00 && offset < 0xF17C02)
898 //I think this was removed from the Jaguar. If so, then we don't need this...!
899 anajoy_word_write(offset, data);
902 else if (offset >= 0xF14000 && offset < 0xF14003)
904 JoystickWriteWord(offset, data);
905 EepromWriteWord(offset, data);
908 else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
910 EepromWriteWord(offset, data);
914 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
915 if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
918 jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
919 jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
922 int JERRYGetPIT1Frequency(void)
924 int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
925 return systemClockFrequency / ((JERRYPIT1Prescaler + 1) * (JERRYPIT1Divider + 1));
928 int JERRYGetPIT2Frequency(void)
930 int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
931 return systemClockFrequency / ((JERRYPIT2Prescaler + 1) * (JERRYPIT2Divider + 1));