Shamusworld >> Repos - virtualjaguar/blob - src/jerry.cpp

   1 //
   2 // JERRY Core
   3 //
   4 // by cal2
   5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
   6 // Cleanups by James L. Hammons
   7 //
   8 //      ------------------------------------------------------------
   9 //      JERRY REGISTERS (Mapped by Aaron Giles)
  10 //      ------------------------------------------------------------
  11 //      F10000-F13FFF   R/W   xxxxxxxx xxxxxxxx   Jerry
  12 //      F10000            W   xxxxxxxx xxxxxxxx   JPIT1 - timer 1 pre-scaler
  13 //      F10004            W   xxxxxxxx xxxxxxxx   JPIT2 - timer 1 divider
  14 //      F10008            W   xxxxxxxx xxxxxxxx   JPIT3 - timer 2 pre-scaler
  15 //      F1000C            W   xxxxxxxx xxxxxxxx   JPIT4 - timer 2 divider
  16 //      F10010            W   ------xx xxxxxxxx   CLK1 - processor clock divider
  17 //      F10012            W   ------xx xxxxxxxx   CLK2 - video clock divider
  18 //      F10014            W   -------- --xxxxxx   CLK3 - chroma clock divider
  19 //      F10020          R/W   ---xxxxx ---xxxxx   JINTCTRL - interrupt control register
  20 //                        W   ---x---- --------      (J_SYNCLR - clear synchronous serial intf ints)
  21 //                        W   ----x--- --------      (J_ASYNCLR - clear asynchronous serial intf ints)
  22 //                        W   -----x-- --------      (J_TIM2CLR - clear timer 2 [tempo] interrupts)
  23 //                        W   ------x- --------      (J_TIM1CLR - clear timer 1 [sample] interrupts)
  24 //                        W   -------x --------      (J_EXTCLR - clear external interrupts)
  25 //                      R/W   -------- ---x----      (J_SYNENA - enable synchronous serial intf ints)
  26 //                      R/W   -------- ----x---      (J_ASYNENA - enable asynchronous serial intf ints)
  27 //                      R/W   -------- -----x--      (J_TIM2ENA - enable timer 2 [tempo] interrupts)
  28 //                      R/W   -------- ------x-      (J_TIM1ENA - enable timer 1 [sample] interrupts)
  29 //                      R/W   -------- -------x      (J_EXTENA - enable external interrupts)
  30 //      F10030          R/W   -------- xxxxxxxx   ASIDATA - asynchronous serial data
  31 //      F10032            W   -x------ -xxxxxxx   ASICTRL - asynchronous serial control
  32 //                        W   -x------ --------      (TXBRK - transmit break)
  33 //                        W   -------- -x------      (CLRERR - clear error)
  34 //                        W   -------- --x-----      (RINTEN - enable receiver interrupts)
  35 //                        W   -------- ---x----      (TINTEN - enable transmitter interrupts)
  36 //                        W   -------- ----x---      (RXIPOL - receiver input polarity)
  37 //                        W   -------- -----x--      (TXOPOL - transmitter output polarity)
  38 //                        W   -------- ------x-      (PAREN - parity enable)
  39 //                        W   -------- -------x      (ODD - odd parity select)
  40 //      F10032          R     xxx-xxxx x-xxxxxx   ASISTAT - asynchronous serial status
  41 //                      R     x------- --------      (ERROR - OR of PE,FE,OE)
  42 //                      R     -x------ --------      (TXBRK - transmit break)
  43 //                      R     --x----- --------      (SERIN - serial input)
  44 //                      R     ----x--- --------      (OE - overrun error)
  45 //                      R     -----x-- --------      (FE - framing error)
  46 //                      R     ------x- --------      (PE - parity error)
  47 //                      R     -------x --------      (TBE - transmit buffer empty)
  48 //                      R     -------- x-------      (RBF - receive buffer full)
  49 //                      R     -------- ---x----      (TINTEN - enable transmitter interrupts)
  50 //                      R     -------- ----x---      (RXIPOL - receiver input polarity)
  51 //                      R     -------- -----x--      (TXOPOL - transmitter output polarity)
  52 //                      R     -------- ------x-      (PAREN - parity enable)
  53 //                      R     -------- -------x      (ODD - odd parity)
  54 //      F10034          R/W   xxxxxxxx xxxxxxxx   ASICLK - asynchronous serial interface clock
  55 //      ------------------------------------------------------------
  56 //      F14000-F17FFF   R/W   xxxxxxxx xxxxxxxx   Joysticks and GPIO0-5
  57 //      F14000          R     xxxxxxxx xxxxxxxx   JOYSTICK - read joystick state
  58 //      F14000            W   x------- xxxxxxxx   JOYSTICK - latch joystick output
  59 //                        W   x------- --------      (enable joystick outputs)
  60 //                        W   -------- xxxxxxxx      (joystick output data)
  61 //      F14002          R     xxxxxxxx xxxxxxxx   JOYBUTS - button register
  62 //      F14800-F14FFF   R/W   xxxxxxxx xxxxxxxx   GPI00 - reserved
  63 //      F15000-F15FFF   R/W   xxxxxxxx xxxxxxxx   GPI01 - reserved
  64 //      F16000-F16FFF   R/W   xxxxxxxx xxxxxxxx   GPI02 - reserved
  65 //      F17000-F177FF   R/W   xxxxxxxx xxxxxxxx   GPI03 - reserved
  66 //      F17800-F17BFF   R/W   xxxxxxxx xxxxxxxx   GPI04 - reserved
  67 //      F17C00-F17FFF   R/W   xxxxxxxx xxxxxxxx   GPI05 - reserved
  68 //      ------------------------------------------------------------
  69 //      F18000-F1FFFF   R/W   xxxxxxxx xxxxxxxx   Jerry DSP
  70 //      F1A100          R/W   xxxxxxxx xxxxxxxx   D_FLAGS - DSP flags register
  71 //                      R/W   x------- --------      (DMAEN - DMA enable)
  72 //                      R/W   -x------ --------      (REGPAGE - register page)
  73 //                        W   --x----- --------      (D_EXT0CLR - clear external interrupt 0)
  74 //                        W   ---x---- --------      (D_TIM2CLR - clear timer 2 interrupt)
  75 //                        W   ----x--- --------      (D_TIM1CLR - clear timer 1 interrupt)
  76 //                        W   -----x-- --------      (D_I2SCLR - clear I2S interrupt)
  77 //                        W   ------x- --------      (D_CPUCLR - clear CPU interrupt)
  78 //                      R/W   -------x --------      (D_EXT0ENA - enable external interrupt 0)
  79 //                      R/W   -------- x-------      (D_TIM2ENA - enable timer 2 interrupt)
  80 //                      R/W   -------- -x------      (D_TIM1ENA - enable timer 1 interrupt)
  81 //                      R/W   -------- --x-----      (D_I2SENA - enable I2S interrupt)
  82 //                      R/W   -------- ---x----      (D_CPUENA - enable CPU interrupt)
  83 //                      R/W   -------- ----x---      (IMASK - interrupt mask)
  84 //                      R/W   -------- -----x--      (NEGA_FLAG - ALU negative)
  85 //                      R/W   -------- ------x-      (CARRY_FLAG - ALU carry)
  86 //                      R/W   -------- -------x      (ZERO_FLAG - ALU zero)
  87 //      F1A102          R/W   -------- ------xx   D_FLAGS - upper DSP flags
  88 //                      R/W   -------- ------x-      (D_EXT1ENA - enable external interrupt 1)
  89 //                      R/W   -------- -------x      (D_EXT1CLR - clear external interrupt 1)
  90 //      F1A104            W   -------- ----xxxx   D_MTXC - matrix control register
  91 //                        W   -------- ----x---      (MATCOL - column/row major)
  92 //                        W   -------- -----xxx      (MATRIX3-15 - matrix width)
  93 //      F1A108            W   ----xxxx xxxxxx--   D_MTXA - matrix address register
  94 //      F1A10C            W   -------- -----x-x   D_END - data organization register
  95 //                        W   -------- -----x--      (BIG_INST - big endian instruction fetch)
  96 //                        W   -------- -------x      (BIG_IO - big endian I/O)
  97 //      F1A110          R/W   xxxxxxxx xxxxxxxx   D_PC - DSP program counter
  98 //      F1A114          R/W   xxxxxxxx xx-xxxxx   D_CTRL - DSP control/status register
  99 //                      R     xxxx---- --------      (VERSION - DSP version code)
 100 //                      R/W   ----x--- --------      (BUS_HOG - hog the bus!)
 101 //                      R/W   -----x-- --------      (D_EXT0LAT - external interrupt 0 latch)
 102 //                      R/W   ------x- --------      (D_TIM2LAT - timer 2 interrupt latch)
 103 //                      R/W   -------x --------      (D_TIM1LAT - timer 1 interrupt latch)
 104 //                      R/W   -------- x-------      (D_I2SLAT - I2S interrupt latch)
 105 //                      R/W   -------- -x------      (D_CPULAT - CPU interrupt latch)
 106 //                      R/W   -------- ---x----      (SINGLE_GO - single step one instruction)
 107 //                      R/W   -------- ----x---      (SINGLE_STEP - single step mode)
 108 //                      R/W   -------- -----x--      (FORCEINT0 - cause interrupt 0 on GPU)
 109 //                      R/W   -------- ------x-      (CPUINT - send GPU interrupt to CPU)
 110 //                      R/W   -------- -------x      (DSPGO - enable DSP execution)
 111 //      F1A116          R/W   -------- -------x   D_CTRL - upper DSP control/status register
 112 //                      R/W   -------- -------x      (D_EXT1LAT - external interrupt 1 latch)
 113 //      F1A118-F1A11B     W   xxxxxxxx xxxxxxxx   D_MOD - modulo instruction mask
 114 //      F1A11C-F1A11F   R     xxxxxxxx xxxxxxxx   D_REMAIN - divide unit remainder
 115 //      F1A11C            W   -------- -------x   D_DIVCTRL - divide unit control
 116 //                        W   -------- -------x      (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
 117 //      F1A120-F1A123   R     xxxxxxxx xxxxxxxx   D_MACHI - multiply & accumulate high bits
 118 //      F1A148            W   xxxxxxxx xxxxxxxx   R_DAC - right transmit data
 119 //      F1A14C            W   xxxxxxxx xxxxxxxx   L_DAC - left transmit data
 120 //      F1A150            W   -------- xxxxxxxx   SCLK - serial clock frequency
 121 //      F1A150          R     -------- ------xx   SSTAT
 122 //                      R     -------- ------x-      (left - no description)
 123 //                      R     -------- -------x      (WS - word strobe status)
 124 //      F1A154            W   -------- --xxxx-x   SMODE - serial mode
 125 //                        W   -------- --x-----      (EVERYWORD - interrupt on MSB of every word)
 126 //                        W   -------- ---x----      (FALLING - interrupt on falling edge)
 127 //                        W   -------- ----x---      (RISING - interrupt of rising edge)
 128 //                        W   -------- -----x--      (WSEN - enable word strobes)
 129 //                        W   -------- -------x      (INTERNAL - enables serial clock)
 130 //      ------------------------------------------------------------
 131 //      F1B000-F1CFFF   R/W   xxxxxxxx xxxxxxxx   Local DSP RAM
 132 //      ------------------------------------------------------------
 133 //      F1D000          R     xxxxxxxx xxxxxxxx   ROM_TRI - triangle wave
 134 //      F1D200          R     xxxxxxxx xxxxxxxx   ROM_SINE - full sine wave
 135 //      F1D400          R     xxxxxxxx xxxxxxxx   ROM_AMSINE - amplitude modulated sine wave
 136 //      F1D600          R     xxxxxxxx xxxxxxxx   ROM_12W - sine wave and second order harmonic
 137 //      F1D800          R     xxxxxxxx xxxxxxxx   ROM_CHIRP16 - chirp
 138 //      F1DA00          R     xxxxxxxx xxxxxxxx   ROM_NTRI - traingle wave with noise
 139 //      F1DC00          R     xxxxxxxx xxxxxxxx   ROM_DELTA - spike
 140 //      F1DE00          R     xxxxxxxx xxxxxxxx   ROM_NOISE - white noise
 141 //      ------------------------------------------------------------
 142
 143 #include "jerry.h"
 144 #include "wavetable.h"
 145 #include <math.h>
 146
 147 //#define JERRY_DEBUG
 148
 149 static uint8 * jerry_ram_8;
 150
 151 #define JERRY_CONFIG    0x4002
 152
 153 uint8 analog_x, analog_y;
 154
 155 static uint32 jerry_timer_1_prescaler;
 156 static uint32 jerry_timer_2_prescaler;
 157 static uint32 jerry_timer_1_divider;
 158 static uint32 jerry_timer_2_divider;
 159 static int32 jerry_timer_1_counter;
 160 static int32 jerry_timer_2_counter;
 161
 162 static uint32 jerry_i2s_interrupt_divide = 8;
 163 static int32  jerry_i2s_interrupt_timer = -1;
 164 static int32  jerry_i2s_interrupt_cycles_per_scanline = 0;
 165
 166
 167 void jerry_i2s_exec(uint32 cycles)
 168 {
 169         jerry_i2s_interrupt_divide &= 0xFF;
 170
 171         if (jerry_i2s_interrupt_timer == -1)
 172         {
 173                 uint32 jerry_i2s_int_freq = (26591000 / 64) / (jerry_i2s_interrupt_divide + 1);
 174                 jerry_i2s_interrupt_cycles_per_scanline = 13300000 / jerry_i2s_int_freq;
 175                 jerry_i2s_interrupt_timer = jerry_i2s_interrupt_cycles_per_scanline;
 176                 //WriteLog("jerry: i2s interrupt rate set to %i hz (every %i cpu clock cycles) jerry_i2s_interrupt_divide=%i\n",jerry_i2s_int_freq,jerry_i2s_interrupt_cycles_per_scanline,jerry_i2s_interrupt_divide);
 177                 pcm_set_sample_rate(jerry_i2s_int_freq);
 178         }
 179         jerry_i2s_interrupt_timer -= cycles;
 180         // note : commented since the sound doesn't work properly else
 181         if (1)//jerry_i2s_interrupt_timer<=0)
 182         {
 183                 // i2s interrupt
 184                 dsp_check_if_i2s_interrupt_needed();
 185                 //WriteLog("jerry_i2s_interrupt_timer=%i, generating an i2s interrupt\n",jerry_i2s_interrupt_timer);
 186                 jerry_i2s_interrupt_timer += jerry_i2s_interrupt_cycles_per_scanline;
 187         }
 188 }
 189
 190 void jerry_reset_i2s_timer(void)
 191 {
 192         //WriteLog("i2s: reseting\n");
 193         jerry_i2s_interrupt_divide = 8;
 194         jerry_i2s_interrupt_timer = -1;
 195 }
 196
 197 void jerry_reset_timer_1(void)
 198 {
 199         if (!jerry_timer_1_prescaler || !jerry_timer_1_divider)
 200                 jerry_timer_1_counter = 0;
 201         else
 202                 jerry_timer_1_counter = (1 + jerry_timer_1_prescaler) * (1 + jerry_timer_1_divider);
 203
 204 //      if (jerry_timer_1_counter)
 205 //              WriteLog("jerry: reseting timer 1 to 0x%.8x (%i)\n",jerry_timer_1_counter,jerry_timer_1_counter);
 206 }
 207
 208 void jerry_reset_timer_2(void)
 209 {
 210         if (!jerry_timer_2_prescaler || !jerry_timer_2_divider)
 211         {
 212                 jerry_timer_2_counter = 0;
 213                 return;
 214         }
 215         else
 216                 jerry_timer_2_counter = ((1 + jerry_timer_2_prescaler) * (1 + jerry_timer_2_divider));
 217
 218 //      if (jerry_timer_2_counter)
 219 //              WriteLog("jerry: reseting timer 2 to 0x%.8x (%i)\n",jerry_timer_2_counter,jerry_timer_2_counter);
 220 }
 221
 222 void jerry_pit_exec(uint32 cycles)
 223 {
 224         if (jerry_timer_1_counter)
 225                 jerry_timer_1_counter -= cycles;
 226
 227         if (jerry_timer_1_counter <= 0)
 228         {
 229                 dsp_set_irq_line(2, 1);
 230                 jerry_reset_timer_1();
 231         }
 232
 233         if (jerry_timer_2_counter)
 234                 jerry_timer_2_counter -= cycles;
 235
 236         if (jerry_timer_2_counter <= 0)
 237         {
 238                 dsp_set_irq_line(3, 1);
 239                 jerry_reset_timer_2();
 240         }
 241 }
 242
 243 void jerry_init(void)
 244 {
 245         clock_init();
 246         anajoy_init();
 247         joystick_init();
 248 //This should be handled with the cart initialization...
 249 //      eeprom_init();
 250         memory_malloc_secure((void **)&jerry_ram_8, 0x10000, "JERRY RAM/ROM");
 251         memcpy(&jerry_ram_8[0xD000], wave_table, 0x1000);
 252
 253 /*for(int i=0; i<0x1000; i++)
 254         WriteLog("WT byte, JERRY byte: %02X, %02X\n", wave_table[i], jerry_ram_8[0xD000+i]);//*/
 255 }
 256
 257 void jerry_reset(void)
 258 {
 259         //WriteLog("jerry_reset()\n");
 260         clock_reset();
 261         anajoy_reset();
 262         joystick_reset();
 263         eeprom_reset();
 264         jerry_reset_i2s_timer();
 265
 266         memset(jerry_ram_8, 0x00, 0xD000);              // Don't clear out the Wavetable ROM...!
 267         jerry_ram_8[JERRY_CONFIG+1] |= 0x10;    // NTSC (bit 4)
 268         jerry_timer_1_prescaler = 0xFFFF;
 269         jerry_timer_2_prescaler = 0xFFFF;
 270         jerry_timer_1_divider = 0xFFFF;
 271         jerry_timer_2_divider = 0xFFFF;
 272         jerry_timer_1_counter = 0;
 273         jerry_timer_2_counter = 0;
 274
 275 }
 276
 277 void jerry_done(void)
 278 {
 279         //WriteLog("jerry_done()\n");
 280         memory_free(jerry_ram_8);
 281         clock_done();
 282         anajoy_done();
 283         joystick_done();
 284         eeprom_done();
 285 }
 286
 287 //
 288 // JERRY byte access (read)
 289 //
 290
 291 unsigned jerry_byte_read(unsigned int offset)
 292 {
 293 #ifdef JERRY_DEBUG
 294         WriteLog("JERRY: Reading byte at %06X\n", offset);
 295 #endif
 296         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 297                 return dsp_byte_read(offset);
 298         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 299                 return dsp_byte_read(offset);
 300         else if (offset >= 0xF10000 && offset <= 0xF10007)
 301         {
 302                 switch(offset & 0x07)
 303                 {
 304                 case 0:
 305                         return jerry_timer_1_prescaler >> 8;
 306                 case 1:
 307                         return jerry_timer_1_prescaler & 0xFF;
 308                 case 2:
 309                         return jerry_timer_1_divider >> 8;
 310                 case 3:
 311                         return jerry_timer_1_divider & 0xFF;
 312                 case 4:
 313                         return jerry_timer_2_prescaler >> 8;
 314                 case 5:
 315                         return jerry_timer_2_prescaler & 0xFF;
 316                 case 6:
 317                         return jerry_timer_2_divider >> 8;
 318                 case 7:
 319                         return jerry_timer_2_divider & 0xFF;
 320                 }
 321         }
 322         else if (offset >= 0xF10010 && offset <= 0xf10015)
 323                 return clock_byte_read(offset);
 324         else if (offset >= 0xF17C00 && offset <= 0xF17C01)
 325                 return anajoy_byte_read(offset);
 326         else if (offset >= 0xF14000 && offset <= 0xF14003)
 327         {
 328                 return joystick_byte_read(offset) | eeprom_byte_read(offset);
 329         }
 330         else if (offset >= 0xF14000 && offset <= 0xF1A0FF)
 331                 return eeprom_byte_read(offset);
 332
 333         return jerry_ram_8[offset & 0xFFFF];
 334 }
 335
 336 //
 337 // JERRY word access (read)
 338 //
 339
 340 unsigned jerry_word_read(unsigned int offset)
 341 {
 342 #ifdef JERRY_DEBUG
 343         WriteLog("JERRY: Reading word at %06X\n", offset);
 344 #endif
 345
 346         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 347                 return dsp_word_read(offset);
 348         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 349                 return dsp_word_read(offset);
 350         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 351         {
 352                 switch(offset & 0x07)
 353                 {
 354                 case 0:
 355                         return jerry_timer_1_prescaler;
 356                 case 2:
 357                         return jerry_timer_1_divider;
 358                 case 4:
 359                         return jerry_timer_2_prescaler;
 360                 case 6:
 361                         return jerry_timer_2_divider;
 362                 }
 363                 // Unaligned word reads???
 364         }
 365         else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 366                 return clock_word_read(offset);
 367         else if (offset == 0xF10020)
 368                 return 0x00;
 369         else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 370                 return anajoy_word_read(offset);
 371         else if (offset == 0xF14000)
 372         {
 373                 //WriteLog("reading 0x%.4x from 0xf14000\n");
 374                 return (joystick_word_read(offset) & 0xFFFE) | eeprom_word_read(offset);
 375         }
 376         else if ((offset >= 0xF14002) && (offset < 0xF14003))
 377                 return joystick_word_read(offset);
 378         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 379                 return eeprom_word_read(offset);
 380
 381 // This is never executed!
 382 /*      offset &= 0xFFFF;
 383         if (offset==0x4002)
 384                 return(0xffff);*/
 385
 386 /*if (offset >= 0xF1D000)
 387         WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
 388
 389         offset &= 0xFFFF;                               // Prevent crashing...!
 390         return ((uint16)jerry_ram_8[offset+0] << 8) | jerry_ram_8[offset+1];
 391 }
 392
 393 //
 394 // JERRY byte access (write)
 395 //
 396
 397 void jerry_byte_write(unsigned offset, unsigned data)
 398 {
 399 #ifdef JERRY_DEBUG
 400         WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data,offset);
 401 #endif
 402         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 403         {
 404                 dsp_byte_write(offset, data);
 405                 return;
 406         }
 407         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 408         {
 409                 dsp_byte_write(offset, data);
 410                 return;
 411         }
 412         else if ((offset >= 0xF1A152) && (offset <= 0xF1A153))
 413         {
 414 //              WriteLog("i2s: writing 0x%.2x to SCLK\n",data);
 415                 if ((offset & 0x03) == 2)
 416                         jerry_i2s_interrupt_divide = (jerry_i2s_interrupt_divide & 0x00FF) | ((uint32)data << 8);
 417                 else
 418                         jerry_i2s_interrupt_divide = (jerry_i2s_interrupt_divide & 0xFF00) | (uint32)data;
 419
 420                 jerry_i2s_interrupt_timer = -1;
 421                 jerry_i2s_exec(0);
 422                 return;
 423         }
 424         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 425         {
 426                 switch(offset & 0x07)
 427                 {
 428                 case 0:
 429                         jerry_timer_1_prescaler = (jerry_timer_1_prescaler & 0x00FF) | (data << 8);
 430                         jerry_reset_timer_1();
 431                         break;
 432                 case 1: { jerry_timer_1_prescaler=(jerry_timer_1_prescaler&0xff00)|(data);              jerry_reset_timer_1(); return; }
 433                 case 2: { jerry_timer_1_divider=(jerry_timer_1_divider&0x00ff)|(data<<8);               jerry_reset_timer_1(); return; }
 434                 case 3: { jerry_timer_1_divider=(jerry_timer_1_divider&0xff00)|(data);                  jerry_reset_timer_1(); return; }
 435                 case 4: { jerry_timer_2_prescaler=(jerry_timer_2_prescaler&0x00ff)|(data<<8);   jerry_reset_timer_2(); return; }
 436                 case 5: { jerry_timer_2_prescaler=(jerry_timer_2_prescaler&0xff00)|(data);              jerry_reset_timer_2(); return; }
 437                 case 6: { jerry_timer_2_divider=(jerry_timer_2_divider&0x00ff)|(data<<8);               jerry_reset_timer_2(); return; }
 438                 case 7: { jerry_timer_2_divider=(jerry_timer_2_divider&0xff00)|(data);                  jerry_reset_timer_2(); return; }
 439                 }
 440                 return;
 441         }
 442         else if ((offset >= 0xF10010) && (offset <= 0xF10015))
 443         {
 444                 clock_byte_write(offset, data);
 445                 return;
 446         }
 447         else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
 448         {
 449                 anajoy_byte_write(offset, data);
 450                 return;
 451         }
 452         else if ((offset >= 0xF14000) && (offset <= 0xF14003))
 453         {
 454                 joystick_byte_write(offset, data);
 455                 eeprom_byte_write(offset, data);
 456                 return;
 457         }
 458         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 459         {
 460                 eeprom_byte_write(offset, data);
 461                 return;
 462         }
 463
 464 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 465         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 466                 return;
 467
 468         jerry_ram_8[offset & 0xFFFF] = data;
 469 }
 470
 471 //
 472 // JERRY word access (write)
 473 //
 474
 475 void jerry_word_write(unsigned offset, unsigned data)
 476 {
 477 #ifdef JERRY_DEBUG
 478         WriteLog( "JERRY: Writing word %04X at %06X\n", data, offset);
 479 #endif
 480
 481         if ((offset >= DSP_CONTROL_RAM_BASE) && (offset < DSP_CONTROL_RAM_BASE+0x20))
 482         {
 483                 dsp_word_write(offset, data);
 484                 return;
 485         }
 486         else if ((offset >= DSP_WORK_RAM_BASE) && (offset < DSP_WORK_RAM_BASE+0x2000))
 487         {
 488                 dsp_word_write(offset, data);
 489                 return;
 490         }
 491         else if (offset == 0xF1A152)
 492         {
 493 //              WriteLog("i2s: writing 0x%.4x to SCLK\n",data);
 494                 jerry_i2s_interrupt_divide = data & 0xFF;
 495                 jerry_i2s_interrupt_timer = -1;
 496                 jerry_i2s_exec(0);
 497         }
 498         else if ((offset >= 0xF10000) && (offset <= 0xF10007))
 499         {
 500                 switch(offset & 0x07)
 501                 {
 502                 case 0:
 503                         jerry_timer_1_prescaler = data;
 504                         jerry_reset_timer_1();
 505                         break;
 506                 case 2:
 507                         jerry_timer_1_divider = data;
 508                         jerry_reset_timer_1();
 509                         break;
 510                 case 4:
 511                         jerry_timer_2_prescaler = data;
 512                         jerry_reset_timer_2();
 513                         break;
 514                 case 6:
 515                         jerry_timer_2_divider = data;
 516                         jerry_reset_timer_2();
 517                 }
 518                 // Need to handle (unaligned) cases???
 519                 return;
 520         }
 521         else if ((offset >= 0xF1A148) && (offset < 0xF1A150))
 522         {
 523                 pcm_word_write(offset - 0xF1A148, data);
 524                 return;
 525         }
 526         else if ((offset >= 0xF10010) && (offset < 0xF10016))
 527         {
 528                 clock_word_write(offset, data);
 529                 return;
 530         }
 531         else if ((offset >= 0xF17C00) && (offset < 0xF17C02))
 532         {
 533                 anajoy_word_write(offset, data);
 534                 return;
 535         }
 536         else if ((offset >= 0xF14000) && (offset < 0xF14003))
 537         {
 538                 joystick_word_write(offset, data);
 539                 eeprom_word_write(offset, data);
 540                 return;
 541         }
 542         else if ((offset >= 0xF14000) && (offset <= 0xF1A0FF))
 543         {
 544                 eeprom_word_write(offset, data);
 545                 return;
 546         }
 547
 548 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
 549         if (offset >= 0xF1D000 && offset <= 0xF1DFFF)
 550                 return;
 551
 552         jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
 553         jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
 554 }