2 // DAC (really, Synchronous Serial Interface) Handler
4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Rewritten by James Hammons
7 // (C) 2010 Underground Software
9 // JLH = James Hammons <jlhamm@acm.org>
12 // --- ---------- -------------------------------------------------------------
13 // JLH 01/16/2010 Created this log ;-)
14 // JLH 04/30/2012 Changed SDL audio handler to run JERRY
17 // Need to set up defaults that the BIOS sets for the SSI here in DACInit()... !!! FIX !!!
18 // or something like that... Seems like it already does, but it doesn't seem to
19 // work correctly...! Perhaps just need to set up SSI stuff so BUTCH doesn't get
22 // ALSO: Need to implement some form of proper locking to replace the clusterfuck
23 // that is the current spinlock implementation. Since the DSP is a separate
24 // entity, could we get away with running it in the sound IRQ?
26 // After testing on a real Jaguar, it seems clear that the I2S interrupt drives
27 // the audio subsystem. So while you can drive the audio at a *slower* rate than
28 // set by SCLK, you can't drive it any *faster*. Also note, that if the I2S
29 // interrupt is not enabled/running on the DSP, then there is no audio. Also,
30 // audio can be muted by clearing bit 8 of JOYSTICK (JOY1).
32 // Approach: We can run the DSP in the host system's audio IRQ, by running the
33 // DSP for the alloted time (depending on the host buffer size & sample rate)
34 // by simply reading the L/R_I2S (L/RTXD) registers at regular intervals. We
35 // would also have to time the I2S/TIMER0/TIMER1 interrupts in the DSP as well.
36 // This way, we can run the host audio IRQ at, say, 48 KHz and not have to care
37 // so much about SCLK and running a separate buffer and all the attendant
38 // garbage that comes with that awful approach.
40 // There would still be potential gotchas, as the SCLK can theoretically drive
41 // the I2S at 26590906 / 2 (for SCLK == 0) = 13.3 MHz which corresponds to an
42 // audio rate 416 KHz (dividing the I2S rate by 32, for 16-bit stereo). It
43 // seems doubtful that anything useful could come of such a high rate, and we
44 // can probably safely ignore any such ridiculously high audio rates. It won't
45 // sound the same as on a real Jaguar, but who cares? :-)
56 #include "m68000/m68kinterface.h"
63 #define BUFFER_SIZE 0x10000 // Make the DAC buffers 64K x 16 bits
64 #define DAC_AUDIO_RATE 48000 // Set the audio rate to 48 KHz
66 // Jaguar memory locations
73 #define SMODE 0xF1A154
77 // These are defined in memory.h/cpp
78 //uint16 lrxd, rrxd; // I2S ports (into Jaguar)
82 static SDL_AudioSpec desired;
83 static bool SDLSoundInitialized;
84 static uint8 SCLKFrequencyDivider = 19; // Default is roughly 22 KHz (20774 Hz in NTSC mode)
85 /*static*/ uint16 serialMode = 0;
87 // Private function prototypes
89 void SDLSoundCallback(void * userdata, Uint8 * buffer, int length);
90 void DSPSampleCallback(void);
94 // Initialize the SDL sound system
98 SDLSoundInitialized = false;
100 // if (!vjs.audioEnabled)
103 WriteLog("DAC: DSP/host audio playback disabled.\n");
107 desired.freq = DAC_AUDIO_RATE;
108 desired.format = AUDIO_S16SYS;
109 desired.channels = 2;
110 desired.samples = 2048; // 2K buffer = audio delay of 42.67 ms (@ 48 KHz)
111 desired.callback = SDLSoundCallback;
113 if (SDL_OpenAudio(&desired, NULL) < 0) // NULL means SDL guarantees what we want
114 WriteLog("DAC: Failed to initialize SDL sound...\n");
117 SDLSoundInitialized = true;
119 SDL_PauseAudio(false); // Start playback!
120 WriteLog("DAC: Successfully initialized. Sample rate: %u\n", desired.freq);
123 ltxd = lrxd = desired.silence;
125 uint32_t riscClockRate = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
126 uint32_t cyclesPerSample = riscClockRate / DAC_AUDIO_RATE;
127 WriteLog("DAC: RISC clock = %u, cyclesPerSample = %u\n", riscClockRate, cyclesPerSample);
132 // Reset the sound buffer FIFOs
136 // LeftFIFOHeadPtr = LeftFIFOTailPtr = 0, RightFIFOHeadPtr = RightFIFOTailPtr = 1;
137 ltxd = lrxd = desired.silence;
142 // Close down the SDL sound subsystem
146 if (SDLSoundInitialized)
148 SDL_PauseAudio(true);
152 WriteLog("DAC: Done.\n");
156 // Approach: Run the DSP for however many cycles needed to correspond to whatever sample rate
157 // we've set the audio to run at. So, e.g., if we run it at 48 KHz, then we would run the DSP
158 // for however much time it takes to fill the buffer. So with a 2K buffer, this would correspond
159 // to running the DSP for 0.042666... seconds. At 26590906 Hz, this would correspond to
160 // running the DSP for 1134545 cycles. You would then sample the L/RTXD registers every
161 // 1134545 / 2048 = 554 cycles to fill the buffer. You would also have to manage interrupt
162 // timing as well (generating them at the proper times), but that shouldn't be too difficult...
163 // If the DSP isn't running, then fill the buffer with L/RTXD and exit.
166 // SDL callback routine to fill audio buffer
168 // Note: The samples are packed in the buffer in 16 bit left/16 bit right pairs.
169 // Also, length is the length of the buffer in BYTES
171 static Uint8 * sampleBuffer;
172 static int bufferIndex = 0;
173 static int numberOfSamples = 0;
174 static bool bufferDone = false;
175 void SDLSoundCallback(void * userdata, Uint8 * buffer, int length)
177 // 1st, check to see if the DSP is running. If not, fill the buffer with L/RXTD and exit.
181 for(int i=0; i<(length/2); i+=2)
183 ((uint16_t *)buffer)[i + 0] = ltxd;
184 ((uint16_t *)buffer)[i + 1] = rtxd;
190 // The length of time we're dealing with here is 1/48000 s, so we multiply this
191 // by the number of cycles per second to get the number of cycles for one sample.
192 uint32_t riscClockRate = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
193 uint32_t cyclesPerSample = riscClockRate / DAC_AUDIO_RATE;
194 // This is the length of time
195 // timePerSample = (1000000.0 / (double)riscClockRate) * ();
197 // Now, run the DSP for that length of time for each sample we need to make
200 sampleBuffer = buffer;
201 numberOfSamples = length / 2;
204 SetCallbackTime(DSPSampleCallback, 1000000.0 / (double)DAC_AUDIO_RATE, EVENT_JERRY);
206 // These timings are tied to NTSC, need to fix that in event.cpp/h!
209 double timeToNextEvent = GetTimeToNextEvent(EVENT_JERRY);
213 if (vjs.usePipelinedDSP)
214 DSPExecP2(USEC_TO_RISC_CYCLES(timeToNextEvent));
216 DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
219 HandleNextEvent(EVENT_JERRY);
225 void DSPSampleCallback(void)
227 ((uint16_t *)sampleBuffer)[bufferIndex + 0] = ltxd;
228 ((uint16_t *)sampleBuffer)[bufferIndex + 1] = rtxd;
231 if (bufferIndex == numberOfSamples)
237 SetCallbackTime(DSPSampleCallback, 1000000.0 / (double)DAC_AUDIO_RATE, EVENT_JERRY);
243 // Calculate the frequency of SCLK * 32 using the divider
245 int GetCalculatedFrequency(void)
247 int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
249 // We divide by 32 here in order to find the frequency of 32 SCLKs in a row (transferring
250 // 16 bits of left data + 16 bits of right data = 32 bits, 1 SCLK = 1 bit transferred).
251 return systemClockFrequency / (32 * (2 * (SCLKFrequencyDivider + 1)));
257 // LTXD/RTXD/SCLK/SMODE ($F1A148/4C/50/54)
259 void DACWriteByte(uint32 offset, uint8 data, uint32 who/*= UNKNOWN*/)
261 WriteLog("DAC: %s writing BYTE %02X at %08X\n", whoName[who], data, offset);
262 if (offset == SCLK + 3)
263 DACWriteWord(offset - 3, (uint16)data);
267 void DACWriteWord(uint32 offset, uint16 data, uint32 who/*= UNKNOWN*/)
269 if (offset == LTXD + 2)
273 else if (offset == RTXD + 2)
277 else if (offset == SCLK + 2) // Sample rate
279 WriteLog("DAC: Writing %u to SCLK...\n", data);
281 if ((uint8)data != SCLKFrequencyDivider)
282 SCLKFrequencyDivider = (uint8)data;
284 else if (offset == SMODE + 2)
287 WriteLog("DAC: %s writing to SMODE. Bits: %s%s%s%s%s%s [68K PC=%08X]\n", whoName[who],
288 (data & 0x01 ? "INTERNAL " : ""), (data & 0x02 ? "MODE " : ""),
289 (data & 0x04 ? "WSEN " : ""), (data & 0x08 ? "RISING " : ""),
290 (data & 0x10 ? "FALLING " : ""), (data & 0x20 ? "EVERYWORD" : ""),
291 m68k_get_reg(NULL, M68K_REG_PC));
297 // LRXD/RRXD/SSTAT ($F1A148/4C/50)
299 uint8 DACReadByte(uint32 offset, uint32 who/*= UNKNOWN*/)
301 // WriteLog("DAC: %s reading byte from %08X\n", whoName[who], offset);
306 //static uint16 fakeWord = 0;
307 uint16 DACReadWord(uint32 offset, uint32 who/*= UNKNOWN*/)
309 // WriteLog("DAC: %s reading word from %08X\n", whoName[who], offset);
311 // WriteLog("DAC: %s reading WORD %04X from %08X\n", whoName[who], fakeWord, offset);
312 // return fakeWord++;
313 //NOTE: This only works if a bunch of things are set in BUTCH which we currently don't
314 // check for. !!! FIX !!!
315 // Partially fixed: We check for I2SCNTRL in the JERRY I2S routine...
316 // return GetWordFromButchSSI(offset, who);
317 if (offset == LRXD || offset == RRXD)
319 else if (offset == LRXD + 2)
321 else if (offset == RRXD + 2)
324 return 0xFFFF; // May need SSTAT as well... (but may be a Jaguar II only feature)