4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Extensive rewrites/cleanups/fixes by James L. Hammons
11 #include <string.h> // For memset, etc.
12 #include "jaguar.h" // For GET32/SET32 macros
14 #include "cdintf.h" // System agnostic CD interface functions
18 //#define CDROM_LOG // For CDROM logging, obviously
21 BUTCH equ $DFFF00 ; base of Butch=interrupt control register, R/W
22 DSCNTRL equ BUTCH+4 ; DSA control register, R/W
23 DS_DATA equ BUTCH+$A ; DSA TX/RX data, R/W
24 I2CNTRL equ BUTCH+$10 ; i2s bus control register, R/W
25 SBCNTRL equ BUTCH+$14 ; CD subcode control register, R/W
26 SUBDATA equ BUTCH+$18 ; Subcode data register A
27 SUBDATB equ BUTCH+$1C ; Subcode data register B
28 SB_TIME equ BUTCH+$20 ; Subcode time and compare enable (D24)
29 FIFO_DATA equ BUTCH+$24 ; i2s FIFO data
30 I2SDAT1 equ BUTCH+$24 ; i2s FIFO data
31 I2SDAT2 equ BUTCH+$28 ; i2s FIFO data
35 ; Butch's hardware registers
37 ;BUTCH equ $DFFF00 ;base of Butch=interrupt control register, R/W
39 ; When written (Long):
41 ; bit0 - set to enable interrupts
42 ; bit1 - enable CD data FIFO half full interrupt
43 ; bit2 - enable CD subcode frame-time interrupt (@ 2x spped = 7ms.)
44 ; bit3 - enable pre-set subcode time-match found interrupt
45 ; bit4 - CD module command transmit buffer empty interrupt
46 ; bit5 - CD module command receive buffer full
47 ; bit6 - CIRC failure interrupt
49 ; bit7-31 reserved, set to 0
55 ; bit9 - CD data FIFO half-full flag pending
56 ; bit10 - Frame pending
57 ; bit11 - Subcode data pending
58 ; bit12 - Command to CD drive pending (trans buffer empty if 1)
59 ; bit13 - Response from CD drive pending (rec buffer full if 1)
60 ; bit14 - CD uncorrectable data error pending
64 O_DSCNTRL equ 4 ; DSA control register, R/W
65 O_DS_DATA equ $A ; DSA TX/RX data, R/W
67 O_I2CNTRL equ $10 ; i2s bus control register, R/W
71 ; b0 - I2S data from drive is ON if 1
72 ; b1 - I2S path to Jerry is ON if 1
74 ; b3 - host bus width is 16 if 1, else 32
75 ; b4 - FIFO state is not empty if 1
77 O_SBCNTRL equ $14 ; CD subcode control register, R/W
78 O_SUBDATA equ $18 ; Subcode data register A
79 O_SUBDATB equ $1C ; Subcode data register B
80 O_SB_TIME equ $20 ; Subcode time and compare enable (D24)
81 O_FIFODAT equ $24 ; i2s FIFO data
82 O_I2SDAT2 equ $28 ; i2s FIFO data (old)
86 Commands sent through DS_DATA:
88 $01nn - ? Play track nn ? Seek to track nn ?
90 $03nn - Read session nn TOC (short)
96 $14nn - Read session nn TOC (full)
98 $18nn - Spin up CD to session nn
100 $5100 - Mute CD (audio mode only)
101 $51FF - Unmute CD (audio mode only)
102 $5400 - Read # of sessions on CD
103 $70nn - Set oversampling mode
105 Commands send through serial bus:
107 $100 - ? Acknowledge ?
108 $130 - ? (Seems to always prefix the $14n commands)
109 $140 - Returns ACK (1) (Write to NVRAM?)
110 $141 - Returns ACK (1)
111 $142 - Returns ACK (1)
112 $143 - Returns ACK (1)
113 $144 - Returns ACK (1)
114 $145 - Returns ACK (1)
115 $180 - Returns 16-bit value (NVRAM?)
116 $181 - Returns 16-bit value
117 $182 - Returns 16-bit value
118 $183 - Returns 16-bit value
119 $184 - Returns 16-bit value
120 $185 - Returns 16-bit value
123 // Private function prototypes
125 static void CDROMBusWrite(uint16);
126 static uint16 CDROMBusRead(void);
128 #define BUTCH 0x00 // base of Butch == interrupt control register, R/W
129 #define DSCNTRL BUTCH + 0x04 // DSA control register, R/W
130 #define DS_DATA BUTCH + 0x0A // DSA TX/RX data, R/W
131 #define I2CNTRL BUTCH + 0x10 // i2s bus control register, R/W
132 #define SBCNTRL BUTCH + 0x14 // CD subcode control register, R/W
133 #define SUBDATA BUTCH + 0x18 // Subcode data register A
134 #define SUBDATB BUTCH + 0x1C // Subcode data register B
135 #define SB_TIME BUTCH + 0x20 // Subcode time and compare enable (D24)
136 #define FIFO_DATA BUTCH + 0x24 // i2s FIFO data
137 #define I2SDAT2 BUTCH + 0x28 // i2s FIFO data (old)
138 #define UNKNOWN BUTCH + 0x2C // Seems to be some sort of I2S interface
140 const char * BReg[12] = { "BUTCH", "DSCNTRL", "DS_DATA", "???", "I2CNTRL", "SBCNTRL", "SUBDATA", "SUBDATB",
141 "SB_TIME", "FIFO_DATA", "I2SDAT2", "UNKNOWN" };
142 //extern const char * whoName[9];
145 static uint8 cdRam[0x100];
146 static uint16 cdCmd = 0, cdPtr = 0;
147 static bool haveCDGoodness;
148 static uint32 min, sec, frm, block;
149 static uint8 cdBuf[2352 + 96];
150 static uint32 cdBufPtr = 2352;
151 //Also need to set up (save/restore) the CD's NVRAM
154 //extern bool GetRawTOC(void);
157 haveCDGoodness = CDIntfInit();
161 uint32 sec = 18667 - 150;
162 memset(buf, 0, 2448);
163 if (!CDIntfReadBlock(sec, buf))
165 WriteLog("CDROM: Attempt to read with subchannel data failed!\n");
171 WriteLog("\nCDROM: Read sector %u...\n\n", sec);
172 for(int i=0; i<98; i++)
174 WriteLog("%04X: ", i*24);
175 for(int j=0; j<24; j++)
177 WriteLog("%02X ", buf[j + (i*24)]);
181 WriteLog("\nRaw P-W subchannel data:\n\n");
182 for(int i=0; i<6; i++)
184 WriteLog("%02X: ", i*16);
185 for(int j=0; j<16; j++)
187 WriteLog("%02X ", buf[2352 + j + (i*16)]);
191 WriteLog("\nP subchannel data: ");
192 for(int i=0; i<96; i+=8)
195 for(int j=0; j<8; j++)
196 b |= ((buf[2352 + i + j] & 0x80) >> 7) << (7 - j);
198 WriteLog("%02X ", b);
200 WriteLog("\nQ subchannel data: ");
201 for(int i=0; i<96; i+=8)
204 for(int j=0; j<8; j++)
205 b |= ((buf[2352 + i + j] & 0x40) >> 6) << (7 - j);
207 WriteLog("%02X ", b);
209 WriteLog("\n\n");//*/
212 void CDROMReset(void)
214 memset(cdRam, 0x00, 0x100);
225 // This approach is probably wrong, but let's do it for now.
226 // What's needed is a complete overhaul of the interrupt system so that
227 // interrupts are handled as they're generated--instead of the current
228 // scheme where they're handled on scanline boundaries.
230 void BUTCHExec(uint32 cycles)
233 // We're chickening out for now...
236 // extern uint8 * jerry_ram_8; // Hmm.
238 // For now, we just do the FIFO interrupt. Timing is also likely to be WRONG as well.
239 uint32 cdState = GET32(cdRam, BUTCH);
241 if (!(cdState & 0x01)) // No BUTCH interrupts enabled
244 if (!(cdState & 0x22))
245 return; // For now, we only handle FIFO/buffer full interrupts...
247 // From what I can make out, it seems that each FIFO is 32 bytes long
249 // DSPSetIRQLine(DSPIRQ_EXT, ASSERT_LINE);
250 //I'm *sure* this is wrong--prolly need to generate DSP IRQs as well!
251 if (jerry_ram_8[0x23] & 0x3F) // Only generate an IRQ if enabled!
252 GPUSetIRQLine(GPUIRQ_DSP, ASSERT_LINE);
258 // CD-ROM memory access functions
261 uint8 CDROMReadByte(uint32 offset, uint32 who/*=UNKNOWN*/)
264 if ((offset & 0xFF) < 12 * 4)
265 WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
266 WriteLog("CDROM: %s reading byte $%02X from $%08X [68K PC=$%08X]\n", whoName[who], offset, cdRam[offset & 0xFF], m68k_get_reg(NULL, M68K_REG_PC));
268 return cdRam[offset & 0xFF];
271 static uint8 trackNum = 1, minTrack, maxTrack;
272 //static uint8 minutes[16] = { 0, 0, 2, 5, 7, 10, 12, 15, 17, 20, 22, 25, 27, 30, 32, 35 };
273 //static uint8 seconds[16] = { 0, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0, 30, 0 };
274 //static uint8 frames[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
275 //static uint16 sd = 0;
276 uint16 CDROMReadWord(uint32 offset, uint32 who/*=UNKNOWN*/)
280 uint16 data = 0x0000;
284 else if (offset == BUTCH + 2)
285 // We need to fix this so it's not as brain-dead as it is now--i.e., make it so that when
286 // a command is sent to the CDROM, we control here whether or not it succeeded or whether
287 // the command is still being carried out, etc.
289 // bit12 - Command to CD drive pending (trans buffer empty if 1)
290 // bit13 - Response from CD drive pending (rec buffer full if 1)
291 // data = (haveCDGoodness ? 0x3000 : 0x0000); // DSA RX Interrupt pending bit (0 = pending)
292 //This only returns ACKs for interrupts that are set:
293 //This doesn't work for the initial code that writes $180000 to BUTCH. !!! FIX !!!
294 data = (haveCDGoodness ? cdRam[BUTCH + 3] << 8 : 0x0000);
295 // else if (offset == SUBDATA + 2)
296 // data = sd++ | 0x0010; // Have no idea what this is...
297 else if (offset == DS_DATA && haveCDGoodness)
299 if ((cdCmd & 0xFF00) == 0x0100) // ???
301 //Not sure how to acknowledge the ???...
302 // data = 0x0400;//?? 0x0200;
321 WriteLog("CDROM: Reading DS_DATA (???), cdCmd=$%04X\n", cdCmd);
323 else if ((cdCmd & 0xFF00) == 0x0200) // Stop CD
325 //Not sure how to acknowledge the stop...
326 data = 0x0400;//?? 0x0200;
345 WriteLog("CDROM: Reading DS_DATA (stop), cdCmd=$%04X\n", cdCmd);
347 else if ((cdCmd & 0xFF00) == 0x0300) // Read session TOC (overview?)
351 TOC: [Sess] [adrCtl] [?] [point] [?] [?] [?] [?] [pmin] [psec] [pframe]
352 TOC: 1 10 00 a0 00:00:00 00 01:00:00
353 TOC: 1 10 00 a1 00:00:00 00 01:00:00
354 TOC: 1 10 00 a2 00:00:00 00 03:42:42
355 TOC: 1 10 00 1 00:00:00 00 00:02:00 <-- Track #1
356 TOC: 1 50 00 b0 06:12:42 02 79:59:74
357 TOC: 1 50 00 c0 128:00:32 00 97:18:06
358 TOC: 2 10 00 a0 00:00:00 00 02:00:00
359 TOC: 2 10 00 a1 00:00:00 00 11:00:00
360 TOC: 2 10 00 a2 00:00:00 00 54:32:18
361 TOC: 2 10 00 2 00:00:00 00 06:14:42 <-- Track #2
362 TOC: 2 10 00 3 00:00:00 00 06:24:42 <-- Track #3
363 TOC: 2 10 00 4 00:00:00 00 17:42:00 <-- Track #4
364 TOC: 2 10 00 5 00:00:00 00 22:26:15 <-- Track #5
365 TOC: 2 10 00 6 00:00:00 00 29:50:16 <-- Track #6
366 TOC: 2 10 00 7 00:00:00 00 36:01:49 <-- Track #7
367 TOC: 2 10 00 8 00:00:00 00 40:37:59 <-- Track #8
368 TOC: 2 10 00 9 00:00:00 00 45:13:70 <-- Track #9
369 TOC: 2 10 00 a 00:00:00 00 49:50:06 <-- Track #10
370 TOC: 2 10 00 b 00:00:00 00 54:26:17 <-- Track #11
373 //Should do something like so:
374 // data = GetSessionInfo(cdCmd & 0xFF, cdPtr);
375 data = CDIntfGetSessionInfo(cdCmd & 0xFF, cdPtr);
376 if (data == 0xFF) // Failed...
379 WriteLog("CDROM: Requested invalid session #%u (or failed to load TOC, or bad cdPtr value)\n", cdCmd & 0xFF);
383 data |= (0x20 | cdPtr++) << 8;
384 WriteLog("CDROM: Reading DS_DATA (session #%u TOC byte #%u): $%04X\n", cdCmd & 0xFF, cdPtr, data);
387 /* bool isValidSession = ((cdCmd & 0xFF) == 0 ? true : false);//Hardcoded... !!! FIX !!!
388 //NOTE: This should return error condition if the requested session doesn't exist! ($0400?)
395 data = 0x2001; // Min track for this session?
398 data = 0x210A; // Max track for this session?
401 data = 0x2219; // Max lead-out time, absolute minutes
404 data = 0x2319; // Max lead-out time, absolute seconds
407 data = 0x2419; // Max lead-out time, absolute frames
412 //; +0 - unused, reserved (0)
413 //; +1 - unused, reserved (0)
414 //; +2 - minimum track number
415 //; +3 - maximum track number
416 //; +4 - total number of sessions
417 //; +5 - start of last lead-out time, absolute minutes
418 //; +6 - start of last lead-out time, absolute seconds
419 //; +7 - start of last lead-out time, absolute frames
422 WriteLog("CDROM: Reading DS_DATA (session #%u TOC byte #%u): $%04X\n", cdCmd & 0xFF, cdPtr, data);
427 WriteLog("CDROM: Requested invalid session #%u\n", cdCmd & 0xFF);
430 // Seek to m, s, or f position
431 else if ((cdCmd & 0xFF00) == 0x1000 || (cdCmd & 0xFF00) == 0x1100 || (cdCmd & 0xFF00) == 0x1200)
432 data = 0x0100; // Success, though this doesn't take error handling into account.
433 // Ideally, we would also set the bits in BUTCH to let the processor know that
434 // this is ready to be read... !!! FIX !!!
435 else if ((cdCmd & 0xFF00) == 0x1400) // Read "full" session TOC
437 //Need to be a bit more tricky here, since it's reading the "session" TOC instead of the
438 //full TOC--so we need to check for the min/max tracks for each session here... [DONE]
440 if (trackNum > maxTrack)
443 WriteLog("CDROM: Requested invalid track #%u for session #%u\n", trackNum, cdCmd & 0xFF);
448 data = (cdPtr << 8) | trackNum;
449 else if (cdPtr < 0x65)
450 data = (cdPtr << 8) | CDIntfGetTrackInfo(trackNum, (cdPtr - 2) & 0x0F);
452 WriteLog("CDROM: Reading DS_DATA (session #%u, full TOC byte #%u): $%04X\n", cdCmd & 0xFF, (cdPtr+1) & 0x0F, data);
456 cdPtr = 0x60, trackNum++;
459 // Note that it seems to return track info in sets of 4 (or is it 5?)
461 ; +0 - track # (must be non-zero)
462 ; +1 - absolute minutes (0..99), start of track
463 ; +2 - absolute seconds (0..59), start of track
464 ; +3 - absolute frames, (0..74), start of track
465 ; +4 - session # (0..99)
466 ; +5 - track duration minutes
467 ; +6 - track duration seconds
468 ; +7 - track duration frames
470 // Seems to be the following format: $60xx -> Track #xx
471 // $61xx -> min? (trk?)
472 // $62xx -> sec? (min?)
473 // $63xx -> frame? (sec?)
474 // $64xx -> ? (frame?)
479 data = 0x6000 | trackNum; // Track #
482 data = 0x6100 | trackNum; // Track # (again?)
485 data = 0x6200 | minutes[trackNum]; // Minutes
488 data = 0x6300 | seconds[trackNum]; // Seconds
491 data = 0x6400 | frames[trackNum]; // Frames
496 else if ((cdCmd & 0xFF00) == 0x1500) // Read CD mode
498 data = cdCmd | 0x0200; // ?? not sure ?? [Seems OK]
499 WriteLog("CDROM: Reading DS_DATA (mode), cdCmd=$%04X\n", cdCmd);
501 else if ((cdCmd & 0xFF00) == 0x1800) // Spin up session #
504 WriteLog("CDROM: Reading DS_DATA (spin up session), cdCmd=$%04X\n", cdCmd);
506 else if ((cdCmd & 0xFF00) == 0x5400) // Read # of sessions
508 data = cdCmd | 0x00; // !!! Hardcoded !!! FIX !!!
509 WriteLog("CDROM: Reading DS_DATA (# of sessions), cdCmd=$%04X\n", cdCmd);
511 else if ((cdCmd & 0xFF00) == 0x7000) // Read oversampling
513 //NOTE: This setting will probably affect the # of DSP interrupts that need to happen. !!! FIX !!!
515 WriteLog("CDROM: Reading DS_DATA (oversampling), cdCmd=$%04X\n", cdCmd);
520 WriteLog("CDROM: Reading DS_DATA, unhandled cdCmd=$%04X\n", cdCmd);
523 else if (offset == DS_DATA && !haveCDGoodness)
524 data = 0x0400; // No CD interface present, so return error
525 else if (offset >= FIFO_DATA && offset <= FIFO_DATA + 3)
528 else if (offset >= FIFO_DATA + 4 && offset <= FIFO_DATA + 7)
532 data = GET16(cdRam, offset);
534 //Returning $00000008 seems to cause it to use the starfield. Dunno why.
535 // It looks like it's getting the CD_mode this way...
536 //Temp, for testing...
537 //Very interesting...! Seems to control sumthin' or other...
538 /*if (offset == 0x2C || offset == 0x2E)
540 /*if (offset == 0x2C)
543 data = 0;//0x0008;//*/
544 if (offset == UNKNOWN + 2)
545 data = CDROMBusRead();
548 if ((offset & 0xFF) < 11 * 4)
549 WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
550 if (offset != UNKNOWN && offset != UNKNOWN + 2)
551 WriteLog("CDROM: %s reading word $%04X from $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
556 void CDROMWriteByte(uint32 offset, uint8 data, uint32 who/*=UNKNOWN*/)
559 cdRam[offset] = data;
562 if ((offset & 0xFF) < 12 * 4)
563 WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
564 WriteLog("CDROM: %s writing byte $%02X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
568 void CDROMWriteWord(uint32 offset, uint16 data, uint32 who/*=UNKNOWN*/)
571 SET16(cdRam, offset, data);
574 //Lesse what this does... Seems to work OK...!
575 if (offset == DS_DATA)
578 if ((data & 0xFF00) == 0x0200) // Stop CD
581 WriteLog("CDROM: Stopping CD\n", data & 0xFF);
583 else if ((data & 0xFF00) == 0x0300) // Read session TOC (short? overview?)
586 WriteLog("CDROM: Reading TOC for session #%u\n", data & 0xFF);
588 //Not sure how these three acknowledge...
589 else if ((data & 0xFF00) == 0x1000) // Seek to minute position
593 else if ((data & 0xFF00) == 0x1100) // Seek to second position
597 else if ((data & 0xFF00) == 0x1200) // Seek to frame position
600 block = (((min * 60) + sec) * 75) + frm;
601 cdBufPtr = 2352; // Ensure that SSI read will do so immediately
602 WriteLog("CDROM: Seeking to %u:%02u:%02u [block #%u]\n", min, sec, frm, block);
604 else if ((data & 0xFF00) == 0x1400) // Read "full" TOC for session
607 minTrack = CDIntfGetSessionInfo(data & 0xFF, 0),
608 maxTrack = CDIntfGetSessionInfo(data & 0xFF, 1);
610 WriteLog("CDROM: Reading \"full\" TOC for session #%u (min=%u, max=%u)\n", data & 0xFF, minTrack, maxTrack);
612 else if ((data & 0xFF00) == 0x1500) // Set CDROM mode
614 // Mode setting is as follows: bit 0 set -> single speed, bit 1 set -> double,
615 // bit 3 set -> multisession CD, bit 3 unset -> audio CD
616 WriteLog("CDROM: Setting mode $%02X\n", data & 0xFF);
618 else if ((data & 0xFF00) == 0x1800) // Spin up session #
620 WriteLog("CDROM: Spinning up session #%u\n", data & 0xFF);
622 else if ((data & 0xFF00) == 0x5400) // Read # of sessions
624 WriteLog("CDROM: Reading # of sessions\n", data & 0xFF);
626 else if ((data & 0xFF00) == 0x7000) // Set oversampling rate
628 // 1 = none, 2 = 2x, 3 = 4x, 4 = 8x
629 uint32 rates[5] = { 0, 1, 2, 4, 8 };
630 WriteLog("CDROM: Setting oversample rate to %uX\n", rates[(data & 0xFF)]);
633 WriteLog("CDROM: Unknown command $%04X\n", data);
636 if (offset == UNKNOWN + 2)
640 if ((offset & 0xFF) < 11 * 4)
641 WriteLog("[%s] ", BReg[(offset & 0xFF) / 4]);
642 if (offset != UNKNOWN && offset != UNKNOWN + 2)
643 WriteLog("CDROM: %s writing word $%04X at $%08X [68K PC=$%08X]\n", whoName[who], data, offset, m68k_get_reg(NULL, M68K_REG_PC));
648 // State machine for sending/receiving data along a serial bus
651 enum ButchState { ST_INIT, ST_RISING, ST_FALLING };
652 static ButchState currentState = ST_INIT;
653 static uint16 counter = 0;
654 static bool cmdTx = false;
655 static uint16 busCmd;
656 static uint16 rxData, txData;
657 static uint16 rxDataBit;
658 static bool firstTime = false;
660 static void CDROMBusWrite(uint16 data)
662 //This is kinda lame. What we should do is check for a 0->1 transition on either bits 0 or 1...
667 WriteLog("CDROM: BusWrite write on unknown line: $%04X\n", data);
670 switch (currentState)
673 currentState = ST_RISING;
676 if (data & 0x0001) // Command coming
686 busCmd <<= 1; // Make room for next bit
687 busCmd |= (data & 0x04); // & put it in
692 busCmd >>= 2; // Because we ORed bit 2, we need to shift right by 2
695 //What it looks like:
696 //It seems that the $18x series reads from NVRAM while the
697 //$130, $14x, $100 series writes values to NVRAM...
699 rxData = 0x0024;//1234;
700 else if (busCmd == 0x181)
701 rxData = 0x0004;//5678;
702 else if (busCmd == 0x182)
703 rxData = 0x0071;//9ABC;
704 else if (busCmd == 0x183)
705 rxData = 0xFF67;//DEF0;
706 else if (busCmd == 0x184)
707 rxData = 0xFFFF;//892F;
708 else if (busCmd == 0x185)
709 rxData = 0xFFFF;//8000;
712 // rxData = 0x8349;//8000;//0F67;
718 WriteLog("CDROM: *** BusWrite got command $%04X\n", busCmd);
724 txData = (txData << 1) | ((data & 0x04) >> 2);
725 //WriteLog("[%s]", data & 0x04 ? "1" : "0");
727 rxDataBit = (rxData & 0x8000) >> 12;
732 WriteLog("CDROM: *** BusWrite got extra command $%04X\n", txData);
737 currentState = ST_FALLING;
740 currentState = ST_INIT;
745 static uint16 CDROMBusRead(void)
747 // It seems the counter == 0 simply waits for a single bit acknowledge-- !!! FIX !!!
748 // Or does it? Hmm. It still "pumps" 16 bits through above, so how is this special?
749 // Seems to be because it sits and looks at it as if it will change. Dunno!
751 if ((counter & 0x0F) == 0)
753 if (counter == 0 && rxDataBit == 0)
762 WriteLog("%s\n", rxDataBit ? "1" : "0");
765 WriteLog("%s", rxDataBit ? "1" : "0");
772 // This simulates a read from BUTCH over the SSI to JERRY. Uses real reading!
774 //temp, until I can fix my CD image... Argh!
775 static uint8 cdBuf2[2532 + 96], cdBuf3[2532 + 96];
776 uint16 GetWordFromButchSSI(uint32 offset, uint32 who/*= UNKNOWN*/)
778 bool go = ((offset & 0x0F) == 0x0A || (offset & 0x0F) == 0x0E ? true : false);
783 // The problem comes in here. Really, we should generate the IRQ once we've stuffed
784 // our values into the DAC L/RRXD ports...
785 // But then again, the whole IRQ system needs an overhaul in order to make it more
786 // cycle accurate WRT to the various CPUs. Right now, it's catch-as-catch-can, which
787 // means that IRQs get serviced on scanline boundaries instead of when they occur.
790 if (cdBufPtr >= 2352)
792 WriteLog("CDROM: %s reading block #%u...\n", whoName[who], block);
793 //No error checking. !!! FIX !!!
794 //NOTE: We have to subtract out the 1st track start as well (in cdintf_foo.cpp)!
795 // CDIntfReadBlock(block - 150, cdBuf);
797 //Crappy kludge for shitty shit. Lesse if it works!
798 CDIntfReadBlock(block - 150, cdBuf2);
799 CDIntfReadBlock(block - 149, cdBuf3);
800 for(int i=0; i<2352-4; i+=4)
802 cdBuf[i+0] = cdBuf2[i+4];
803 cdBuf[i+1] = cdBuf2[i+5];
804 cdBuf[i+2] = cdBuf2[i+2];
805 cdBuf[i+3] = cdBuf2[i+3];
807 cdBuf[2348] = cdBuf3[0];
808 cdBuf[2349] = cdBuf3[1];
809 cdBuf[2350] = cdBuf2[2350];
810 cdBuf[2351] = cdBuf2[2351];//*/
812 block++, cdBufPtr = 0;
815 /*extern bool doDSPDis;
819 WriteLog("[%04X:%01X]", GET16(cdBuf, cdBufPtr), offset & 0x0F);
820 if (cdBufPtr % 32 == 30)
823 // return GET16(cdBuf, cdBufPtr);
824 //This probably isn't endian safe...
825 // But then again... It seems that even though the data on the CD is organized as
826 // LL LH RL RH the way it expects to see the data is RH RL LH LL.
827 // D'oh! It doesn't matter *how* the data comes in, since it puts each sample into
828 // its own left or right side queue, i.e. it reads them 32 bits at a time and puts
829 // them into their L/R channel queues. It does seem, though, that it expects the
830 // right channel to be the upper 16 bits and the left to be the lower 16.
831 return (cdBuf[cdBufPtr + 1] << 8) | cdBuf[cdBufPtr + 0];
834 bool ButchIsReadyToSend(void)
836 WriteLog("Butch is%s ready to send...\n", cdRam[I2CNTRL + 3] & 0x02 ? "" : " not");
838 return (cdRam[I2CNTRL + 3] & 0x02 ? true : false);
842 // This simulates a read from BUTCH over the SSI to JERRY. Uses real reading!
844 void SetSSIWordsXmittedFromButch(void)
847 // The problem comes in here. Really, we should generate the IRQ once we've stuffed
848 // our values into the DAC L/RRXD ports...
849 // But then again, the whole IRQ system needs an overhaul in order to make it more
850 // cycle accurate WRT to the various CPUs. Right now, it's catch-as-catch-can, which
851 // means that IRQs get serviced on scanline boundaries instead of when they occur.
853 // NOTE: The CD BIOS uses the following SMODE:
854 // DAC: M68K writing to SMODE. Bits: WSEN FALLING [68K PC=00050D8C]
857 if (cdBufPtr >= 2352)
859 WriteLog("CDROM: Reading block #%u...\n", block);
860 //No error checking. !!! FIX !!!
861 //NOTE: We have to subtract out the 1st track start as well (in cdintf_foo.cpp)!
862 // CDIntfReadBlock(block - 150, cdBuf);
864 //Crappy kludge for shitty shit. Lesse if it works!
865 //It does! That means my CD is WRONG! FUCK!
867 // But, then again, according to Belboz at AA the two zeroes in front *ARE* necessary...
868 // So that means my CD is OK, just this method is wrong!
869 // It all depends on whether or not the interrupt occurs on the RISING or FALLING edge
870 // of the word strobe... !!! FIX !!!
872 // When WS rises, left channel was done transmitting. When WS falls, right channel is done.
873 // CDIntfReadBlock(block - 150, cdBuf2);
874 // CDIntfReadBlock(block - 149, cdBuf3);
875 CDIntfReadBlock(block, cdBuf2);
876 CDIntfReadBlock(block + 1, cdBuf3);
877 memcpy(cdBuf, cdBuf2 + 2, 2350);
878 cdBuf[2350] = cdBuf3[0];
879 cdBuf[2351] = cdBuf3[1];//*/
881 block++, cdBufPtr = 0;
883 /*extern bool doDSPDis;
888 WriteLog("\n***** foo = %u, block = %u *****\n\n", foo, block);
895 WriteLog("[%02X%02X %02X%02X]", cdBuf[cdBufPtr+1], cdBuf[cdBufPtr+0], cdBuf[cdBufPtr+3], cdBuf[cdBufPtr+2]);
896 if (cdBufPtr % 32 == 28)
899 //This probably isn't endian safe...
900 // But then again... It seems that even though the data on the CD is organized as
901 // LL LH RL RH the way it expects to see the data is RH RL LH LL.
902 // D'oh! It doesn't matter *how* the data comes in, since it puts each sample into
903 // its own left or right side queue, i.e. it reads them 32 bits at a time and puts
904 // them into their L/R channel queues. It does seem, though, that it expects the
905 // right channel to be the upper 16 bits and the left to be the lower 16.
907 // This behavior is strictly a function of *where* the WS creates an IRQ. If the data
908 // is shifted by two zeroes (00 00 in front of the data file) then this *is* the
909 // correct behavior, since the left channel will be xmitted followed by the right
911 // Now we have definitive proof: The MYST CD shows a word offset. So that means we have
912 // to figure out how to make that work here *without* having to load 2 sectors, offset, etc.
914 lrxd = (cdBuf[cdBufPtr + 3] << 8) | cdBuf[cdBufPtr + 2],
915 rrxd = (cdBuf[cdBufPtr + 1] << 8) | cdBuf[cdBufPtr + 0];
923 # of sessions: 2, # of tracks: 10
925 1: min track= 1, max track= 1, lead out= 1:36:67
926 2: min track= 2, max track=10, lead out=55:24:71
939 CDROM: Read sector 18517 (18667 - 150)...
941 0000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
942 0018: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
943 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
944 0048: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
945 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
946 0078: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
947 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
948 00A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
949 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
950 00D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
951 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
952 0108: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
953 0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
954 0138: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
955 0150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
956 0168: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
957 0180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
958 0198: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
959 01B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
960 01C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
961 01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
962 01F8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
963 0210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
964 0228: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
965 0240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
966 0258: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
967 0270: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
968 0288: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
969 02A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
970 02B8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
971 02D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
972 02E8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
973 0300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
974 0318: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
975 0330: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
976 0348: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
977 0360: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
978 0378: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
979 0390: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
980 03A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
981 03C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
982 03D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
983 03F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
984 0408: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
985 0420: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
986 0438: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
987 0450: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
988 0468: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
989 0480: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
990 0498: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
991 04B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
992 04C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
993 04E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
994 04F8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
995 0510: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
996 0528: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
997 0540: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
998 0558: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
999 0570: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1000 0588: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1001 05A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1002 05B8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1003 05D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1004 05E8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1005 0600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1006 0618: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1007 0630: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1008 0648: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1009 0660: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1010 0678: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1011 0690: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1012 06A8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1013 06C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1014 06D8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1015 06F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1016 0708: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1017 0720: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1018 0738: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1019 0750: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1020 0768: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1021 0780: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1022 0798: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1023 07B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
1024 07C8: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00[54 41 49 52]54 41
1025 07E0: 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41
1026 07F8: 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41 49 52 54 41
1027 0810: 49 52 54 41 49 52[54 41 49 52]54 41 52 41 20 49 50 41 52 50 56 4F 44 45
1028 0828: 44 20 54 41 20 41 45 48 44 41 52 45 41 20 52 54 20 49[00 00 00 50]01 00
1029 0840: 80 83 FC 23 07 00 07 00 F0 00 0C 21 FC 23 07 00 07 00 F1 00 0C A1 FC 33
1030 0858: FF FF F0 00 4E 00 7C 2E 1F 00 FC FF 00 61 08 00 F9 4E 00 00 00 51 E7 48
1031 0870: 00 FE 39 30 F1 00 02 40 40 02 10 00 00 67 1C 00 79 42 01 00 8C D3 3C 34
1032 0888: 37 03 3C 30 81 05 3C 3C 0A 01 3C 38 F1 00 00 60 1A 00 FC 33 01 00 01 00
1033 08A0: 8C D3 3C 34 4B 03 3C 30 65 05 3C 3C 42 01 3C 38 1F 01 C0 33 01 00 88 D3
1034 08B8: C4 33 01 00 8A D3 00 32 41 E2 41 94 7C D4 04 00 7C 92 01 00 41 00 00 04
1035 08D0: C1 33 01 00 82 D3 C1 33 F0 00 3C 00 C2 33 01 00 80 D3 C2 33 F0 00 38 00
1036 08E8: C2 33 F0 00 3A 00 06 3A 44 9A C5 33 01 00 84 D3 44 DC C6 33 01 00 86 D3
1037 0900: F9 33 01 00 84 D3 F0 00 46 00 FC 33 FF FF F0 00 48 00 FC 23 00 00 00 00
1038 0918: F0 00 2A 00 FC 33 00 00 F0 00 58 00 DF 4C 7F 00 75 4E 00 00 00 00 00 00
1040 Raw P-W subchannel data:
1042 00: 80 80 C0 80 80 80 80 C0 80 80 80 80 80 80 C0 80
1043 10: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80
1044 20: 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 C0
1045 30: 80 80 80 80 80 80 80 80 80 80 80 80 80 C0 80 80
1046 40: 80 80 80 80 C0 80 80 80 80 C0 C0 80 80 C0 C0 80
1047 50: C0 80 80 C0 C0 C0 80 80 C0 80 80 80 C0 80 80 80
1049 P subchannel data: FF FF FF FF FF FF FF FF FF FF FF FF
1050 Q subchannel data: 21 02 00 00 00 01 00 04 08 66 9C 88
1052 Run address: $5000, Length: $18380
1057 CD_read function from the CD BIOS: Note that it seems to direct the EXT1 interrupt
1058 to the GPU--so that would mean *any* interrupt that BUTCH generates would be routed
1064 subq.l #4,a0 ; Make up for ISR pre-increment
1068 move.l d0,BUTCH ; NO INTERRUPTS!!!!!!!!!!!
1075 move.l I2CNTRL,d1 ;Read I2S Control Register
1076 bclr #2,d1 ; Stop data
1092 or.l #$089a3c1a,d2 ; These instructions include the bclr
1098 or.l #$3c1a1838,d2 ; These instructions include the bclr
1106 move.w DS_DATA,d1 ; Clear any pending DSARX states
1107 move.l I2CNTRL,d1 ; Clear any pending errors
1109 ; Drain the FIFO so that we don't get overloaded
1120 or.l #%000100001,d1 ;Enable DSARX interrupt
1122 ; move.l #%000100001,BUTCH ;Enable DSARX interrupt
1126 .play: move.l d0,d1 ; mess with copy in d1
1127 lsr.l #8,d1 ; shift the byte over
1129 or.w #$1000,d1 ; format it for goto
1130 move.w d1,DS_DATA ; DSA tx
1133 move.l d0,d1 ; mess with copy in d1
1135 or.w #$1100,d1 ; format it for goto
1136 move.w d1,DS_DATA ; DSA tx
1139 move.l d0,d1 ; mess with copy in d1
1140 and.w #$00FF,d1 ; mask for minutes
1141 or.w #$1200,d1 ; format it for goto
1142 move.w d1,DS_DATA ; DSA tx
1148 ****************************
1149 * Here's the GPU interrupt *
1150 ****************************
1154 load (r30),r29 ;read the flags
1160 movei #(make_ptr-PTRPOS),TEMP
1165 movei #(EXIT_ISR-HERE),r27
1168 ; Is this a DSARX interrupt?
1170 load (r24),r27 ;check for DSARX int pending
1172 jr z,fifo_read ; This should ALWAYS fall thru the first time
1174 ; Set the match bit, to allow data
1175 ; moveq #3,r26 ; enable FIFO only
1176 ; Don't just jam a value
1177 ; Clear the DSARX and set FIFO
1184 store r27,(r24) ; Disable SUBCODE match
1186 ; Now we clear the DSARX interrupt in Butch
1188 subq #12,r24 ; does what the above says
1189 load (r24),r26 ;Clears DSA pending interrupt
1191 loadw (r24),r27 ; Read DSA response
1192 btst #10,r27 ; Check for error
1199 ; Check for ERROR!!!!!!!!!!!!!!!!!!!!!
1213 load (Ptrloc),Dataptr ;get pointer
1215 ; Check to see if we should stop
1226 movei #FIFO_DATA,CDdata
1239 store TEMP,(Dataptr)
1255 store Dataptr,(Ptrloc)
1258 movei #J_INT,r24 ; Acknowledge in Jerry
1307 ;r29 already has flags
1309 bset #10,r29 ;Clear DSP int bit in TOM
1311 load (r31),r28 ;Load return address
1314 addq #2,r28 ;Fix it up
1317 store r29,(r30) ;Restore broken flags