2 // RMAC - Renamed Macro Assembler for the Atari Jaguar Console System
3 // AMODE.C - DSP 56001 Addressing Modes
4 // Copyright (C) 199x Landon Dyer, 2011-2021 Reboot and Friends
5 // RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
6 // Source utilised with the kind permission of Landon Dyer
9 #include "dsp56k_amode.h"
23 // Address-mode information
24 int dsp_am0; // Addressing mode
25 int dsp_a0reg; // Register
26 TOKEN dsp_a0expr[EXPRSIZE]; // Expression
27 uint64_t dsp_a0exval; // Expression's value
28 WORD dsp_a0exattr; // Expression's attribute
29 LONG dsp_a0memspace; // Addressing mode's memory space (P, X, Y)
30 SYM * dsp_a0esym; // External symbol involved in expr
32 int dsp_am1; // Addressing mode
33 int dsp_a1reg; // Register
34 TOKEN dsp_a1expr[EXPRSIZE]; // Expression
35 uint64_t dsp_a1exval; // Expression's value
36 WORD dsp_a1exattr; // Expression's attribute
37 LONG dsp_a1memspace; // Addressing mode's memory space (P, X, Y)
38 SYM * dsp_a1esym; // External symbol involved in expr
40 int dsp_am2; // Addressing mode
41 int dsp_a2reg; // Register
42 TOKEN dsp_a2expr[EXPRSIZE]; // Expression
43 uint64_t dsp_a2exval; // Expression's value
44 WORD dsp_a2exattr; // Expression's attribute
45 SYM * dsp_a2esym; // External symbol involved in expr
47 int dsp_am3; // Addressing mode
48 int dsp_a3reg; // Register
49 TOKEN dsp_a3expr[EXPRSIZE]; // Expression
50 uint64_t dsp_a3exval; // Expression's value
51 WORD dsp_a3exattr; // Expression's attribute
52 SYM * dsp_a3esym; // External symbol involved in expr
54 TOKEN dspImmedEXPR[EXPRSIZE]; // Expression
55 uint64_t dspImmedEXVAL; // Expression's value
56 WORD dspImmedEXATTR; // Expression's attribute
57 SYM * dspImmedESYM; // External symbol involved in expr
58 int deposit_extra_ea; // Optional effective address extension
59 TOKEN dspaaEXPR[EXPRSIZE]; // Expression
60 uint64_t dspaaEXVAL; // Expression's value
61 WORD dspaaEXATTR; // Expression's attribute
62 SYM * dspaaESYM; // External symbol involved in expr
64 LONG dsp_a0perspace; // Peripheral space (X, Y - used in movep)
65 LONG dsp_a1perspace; // Peripheral space (X, Y - used in movep)
67 int dsp_k; // Multiplications sign
69 static inline LONG checkea(const uint32_t termchar, const int strings);
71 // ea checking error strings put into a table because I'm not sure there's an
72 // easy way to do otherwise (the messages start getting differerent in many
73 // places so it will get awkward to code those in) (I'd rather burn some RAM
74 // in order to have more helpful error messages than the other way round)
81 const char *ea_errors[][12] = {
84 "unrecognised X: parallel move syntax: expected '(' after 'X:-'", // 0
85 "unrecognised X: parallel move syntax: expected ')' after 'X:-(Rn'", // 1
86 "unrecognised X: parallel move syntax: expected R0-R7 after 'X:-('", // 2
87 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn+'", // 3
88 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn+Nn)'", // 4
89 "unrecognised X: parallel move syntax: expected ')' after 'X:(Rn+Nn'", // 5
90 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn)+Nn'", // 6
91 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn)+'", // 7
92 "unrecognised X: parallel move syntax: expected same register number in Rn and Nn for 'X:(Rn)-Nn'", // 8
93 "unrecognised X: parallel move syntax: expected N0-N7 after 'X:(Rn)-'", // 9
94 "unrecognised X: parallel move syntax: expected '+', '-' or ',' after 'X:(Rn)'", // 10
95 "unrecognised X: parallel move syntax: expected '+' or ')' after 'X:(Rn'", // 11
99 "unrecognised Y: parallel move syntax: expected '(' after 'Y:-'", // 0
100 "unrecognised Y: parallel move syntax: expected ')' after 'Y:-(Rn'", // 1
101 "unrecognised Y: parallel move syntax: expected R0-R7 after 'Y:-('", // 2
102 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn+'", // 3
103 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn+Nn)'", // 4
104 "unrecognised Y: parallel move syntax: expected ')' after 'Y:(Rn+Nn'", // 5
105 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn)+Nn'", // 6
106 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn)+'", // 7
107 "unrecognised Y: parallel move syntax: expected same register number in Rn and Nn for 'Y:(Rn)-Nn'", // 8
108 "unrecognised Y: parallel move syntax: expected N0-N7 after 'Y:(Rn)-'", // 9
109 "unrecognised Y: parallel move syntax: expected '+', '-' or ',' after 'Y:(Rn)'", // 10
110 "unrecognised Y: parallel move syntax: expected '+' or ')' after 'Y:(Rn'", // 11
114 "unrecognised L: parallel move syntax: expected '(' after 'L:-'", // 0
115 "unrecognised L: parallel move syntax: expected ')' after 'L:-(Rn'", // 1
116 "unrecognised L: parallel move syntax: expected R0-R7 after 'L:-('", // 2
117 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn+'", // 3
118 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn+Nn)'", // 4
119 "unrecognised L: parallel move syntax: expected ')' after 'L:(Rn+Nn'", // 5
120 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn)+Nn'", // 6
121 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn)+'", // 7
122 "unrecognised L: parallel move syntax: expected same register number in Rn and Nn for 'L:(Rn)-Nn'", // 8
123 "unrecognised L: parallel move syntax: expected N0-N7 after 'L:(Rn)-'", // 9
124 "unrecognised L: parallel move syntax: expected '+', '-' or ',' after 'L:(Rn)'", // 10
125 "unrecognised L: parallel move syntax: expected '+' or ')' after 'L:(Rn'", // 11
129 "unrecognised P: effective address syntax: expected '(' after 'P:-'", // 0
130 "unrecognised P: effective address syntax: expected ')' after 'P:-(Rn'", // 1
131 "unrecognised P: effective address syntax: expected R0-R7 after 'P:-('", // 2
132 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn+'", // 3
133 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn+Nn)'", // 4
134 "unrecognised P: effective address syntax: expected ')' after 'P:(Rn+Nn'", // 5
135 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn)+Nn'", // 6
136 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn)+'", // 7
137 "unrecognised P: effective address syntax: expected same register number in Rn and Nn for 'P:(Rn)-Nn'", // 8
138 "unrecognised P: effective address syntax: expected N0-N7 after 'P:(Rn)-'", // 9
139 "unrecognised P: effective address syntax: expected '+', '-' or ',' after 'P:(Rn)'", // 10
140 "unrecognised P: effective address syntax: expected '+' or ')' after 'P:(Rn'", // 11
153 // Parse a single addressing mode
155 static inline int dsp_parmode(int *am, int *areg, TOKEN * AnEXPR, uint64_t * AnEXVAL, WORD * AnEXATTR, SYM ** AnESYM, LONG *memspace, LONG *perspace, const int operand)
157 if (*tok == KW_A || *tok == KW_B)
163 else if (*tok == '#')
169 // Immediate Short Addressing Mode Force Operator
171 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
174 if (*AnEXVAL > 0xFFF && *AnEXVAL < -4096)
175 return error("immediate short addressing mode forced but address is bigger than $FFF");
177 if ((int32_t)*AnEXVAL <= 0xFF && (int32_t)*AnEXVAL > -0x100)
186 else if (*tok == '>')
188 // Immediate Long Addressing Mode Force Operator
191 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
194 if ((int32_t)*AnEXVAL > 0xFFFFFF || (int32_t)*AnEXVAL < -0xFFFFFF)
195 return error("long immediate is bigger than $FFFFFF");
201 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
204 if (*AnEXATTR & DEFINED)
206 if ((int32_t)*AnEXVAL < 0x100 && (int32_t)*AnEXVAL >= -0x100)
211 else if (*AnEXVAL < 0x1000)
218 // We have no clue what size our immediate will be
219 // so we have to assume the worst
225 else if (*tok >= KW_X0 && *tok <= KW_Y1)
231 else if (*tok == KW_X && *(tok + 1) == ':')
235 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
237 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
240 if (*AnEXATTR & DEFINED)
242 if (*AnEXVAL > 0xFFFFFF)
243 return error("long address is bigger than $FFFFFF");
245 *memspace = 0 << 6; // Mark we're on X memory space
247 // Check if value is between $FFC0 and $FFFF, AKA X:pp
248 uint32_t temp = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
250 if ((temp >= 0xFFFFFFC0 /* Check for 32bit sign extended number */
251 && ((int32_t)*AnEXVAL < 0)) /* Check if 32bit signed number is negative*/
252 || (*AnEXVAL < 0xFFFF && *AnEXVAL >= 0x8000)) /* Check if 16bit number is negative*/
256 *memspace = 0 << 6; // Mark we're on X memory space
257 *perspace = 0 << 16; // Mark we're on X peripheral space
258 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
262 // If the symbol/expression is defined then check for valid range.
263 // Otherwise the value had better fit or Fixups will bark!
277 *memspace = 0 << 6; // Mark we're on X memory space
284 else if (*tok == '<')
287 // Short Addressing Mode Force Operator in the case of '<'
290 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
293 // If the symbol/expression is defined then check for valid range.
294 // Otherwise the value had better fit or Fixups will bark!
295 if (*AnEXATTR & DEFINED)
298 return error("short addressing mode forced but address is bigger than $3F");
302 // Mark it as a fixup
303 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
307 *memspace = 0 << 6; // Mark we're on X memory space
308 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
311 else if (*tok == '>')
313 // Long Addressing Mode Force Operator
316 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
318 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
321 if (*AnEXATTR&DEFINED)
323 if (*AnEXVAL > 0xFFFFFF)
324 return error("long address is bigger than $FFFFFF");
326 *memspace = 0 << 6; // Mark we're on X memory space
333 *memspace = 0 << 6; // Mark we're on X memory space
340 else if (*tok == SHL) // '<<'
342 // I/O Short Addressing Mode Force Operator
346 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
349 // If the symbol/expression is defined then check for valid range.
350 // Otherwise the value had better fit or Fixups will bark!
351 if (*AnEXATTR & DEFINED)
353 *AnEXVAL = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
355 if (*AnEXVAL < 0xFFFFFFC0)
356 return error("I/O Short Addressing Mode addresses must be between $FFC0 and $FFFF");
360 *memspace = 0 << 6; // Mark we're on X memory space
361 *perspace = 0 << 16; // Mark we're on X peripheral space
362 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
366 if ((*areg = checkea(0, X_ERRORS)) != ERROR)
368 // TODO: what if we need M_DSPAA here????
369 *memspace = 0 << 6; // Mark we're on X memory space
376 else if (*tok == KW_Y && *(tok + 1) == ':')
380 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
382 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
385 if (*AnEXVAL > 0xFFFFFF)
386 return error("long address is bigger than $FFFFFF");
388 *memspace = 1 << 6; // Mark we're on Y memory space
390 // Check if value is between $ffc0 and $ffff, AKA Y:pp
391 uint32_t temp = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
393 if ((temp >= 0xFFFFFFC0 /* Check for 32bit sign extended number */
394 && ((int32_t)*AnEXVAL < 0)) /* Check if 32bit signed number is negative*/
395 || (*AnEXVAL < 0xFFFF && *AnEXVAL >= 0x8000)) /* Check if 16bit number is negative*/
399 *perspace = 1 << 16; // Mark we're on X peripheral space
400 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
404 // If the symbol/expression is defined then check for valid range.
405 // Otherwise the value had better fit or Fixups will bark!
406 if (*AnEXATTR & DEFINED)
426 else if (*tok == '<')
429 // Short Addressing Mode Force Operator in the case of '<'
432 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
435 // If the symbol/expression is defined then check for valid range.
436 // Otherwise the value had better fit or Fixups will bark!
437 if (*AnEXATTR & DEFINED)
442 warn("short addressing mode forced but address is bigger than $3F - switching to long");
445 *memspace = 1 << 6; // Mark we're on Y memory space
452 // Mark it as a fixup
453 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
457 *memspace = 1 << 6; // Mark we're on Y memory space
458 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
461 else if (*tok == '>')
463 // Long Addressing Mode Force Operator
466 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
468 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
471 if (*AnEXATTR&DEFINED)
473 if (*AnEXVAL > 0xFFFFFF)
474 return error("long address is bigger than $FFFFFF");
476 *memspace = 1 << 6; // Mark we're on Y memory space
484 *memspace = 1 << 6; // Mark we're on Y memory space
491 else if (*tok == SHL) // '<<'
493 // I/O Short Addressing Mode Force Operator
497 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
500 // If the symbol/expression is defined then check for valid range.
501 // Otherwise the value had better fit or Fixups will bark!
502 if (*AnEXATTR & DEFINED)
504 *AnEXVAL = (LONG)(((int32_t)(((uint32_t)*AnEXVAL) << (32 - 6))) >> (32 - 6)); // Sign extend 6 to 32 bits
506 if (*AnEXVAL < 0xFFFFFFC0)
507 return error("I/O Short Addressing Mode addresses must be between $FFE0 and $1F");
511 *memspace = 1 << 6; // Mark we're on Y memory space
512 *perspace = 1 << 16; // Mark we're on Y peripheral space
513 *areg = *AnEXVAL & 0x3F; // Since this is only going to get used in dsp_ea_imm5...
517 if ((*areg = checkea(0, X_ERRORS)) != ERROR)
519 *memspace = 1 << 6; // Mark we're on Y memory space
525 // TODO: add absolute address checks
527 else if ((*tok >= KW_X) && (*tok <= KW_Y))
533 else if ((*tok >= KW_M0) && (*tok <= KW_M7))
536 *areg = (*tok++) & 7;
539 else if ((*tok >= KW_R0) && (*tok <= KW_R7))
542 *areg = (*tok++) - KW_R0;
545 else if ((*tok >= KW_N0) && (*tok <= KW_N7))
548 *areg = (*tok++) & 7;
551 else if ((*tok == KW_A0) || (*tok == KW_A1) || (*tok == KW_B0)
558 else if ((*tok == KW_A2) || (*tok == KW_B2))
564 else if ((*tok == '-') && (*(tok + 1) == KW_X0 || *(tok + 1) == KW_X1 || *(tok + 1) == KW_Y0 || *(tok + 1) == KW_Y1))
566 // '-X0', '-Y0', '-X1' or '-Y1', used in multiplications
569 // Check to see if this is the first operand
571 return error("-x0/-x1/-y0/-y1 only allowed in the first operand");
578 else if (*tok == '+' && (*(tok + 1) == KW_X0 || *(tok + 1) == KW_X1 || *(tok + 1) == KW_Y0 || *(tok + 1) == KW_Y1))
580 // '+X0', '+Y0', '+X1' or '+Y1', used in multiplications
583 // Check to see if this is the first operand
585 return error("+x0/+x1/+y0/+y1 only allowed in the first operand");
592 else if (*tok == '(' || *tok == '-')
594 // Could be either an expression or ea mode
595 if (*tok + 1 == SYMBOL)
599 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
606 if ((*areg = checkea(0, P_ERRORS)) != ERROR)
614 // TODO: add absolute address checks
615 return error("internal assembler error: parmode checking for '(' and '-' does not have absolute address checks yet!");
617 else if (*tok == KW_P && *(tok + 1) == ':')
621 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
624 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
627 if (*AnEXVAL > 0xFFFFFF)
628 return error("long address is bigger than $FFFFFF");
637 *areg = (int)*AnEXVAL; // Lame, but what the hell
643 else if (*tok == '<')
646 // Short Addressing Mode Force Operator in the case of '<'
649 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
653 return error("short addressing mode forced but address is bigger than $3F");
656 *areg = (int)*AnEXVAL; // Since this is only going to get used in dsp_ea_imm5...
659 else if (*tok == '>')
661 // Long Addressing Mode Force Operator
664 // Immediate Short Addressing Mode Force Operator
665 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
668 if (*AnEXATTR & DEFINED)
670 if (*AnEXVAL > 0xFFFFFF)
671 return error("long address is bigger than $FFFFFF");
679 if ((*areg = checkea(0, P_ERRORS)) != ERROR)
687 else if (*tok == SHL)
689 // I/O Short Addressing Mode Force Operator
692 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
695 if (*AnEXVAL > 0xFFF)
696 return error("I/O short addressing mode forced but address is bigger than $FFF");
701 else if (*tok == '<')
703 // Short Addressing Mode Force Operator
706 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
709 if (*AnEXATTR & DEFINED)
711 if (*AnEXVAL > 0xFFF)
712 return error("short addressing mode forced but address is bigger than $FFF");
718 else if (*tok == '>')
720 // Long Addressing Mode Force Operator
723 // Immediate Short Addressing Mode Force Operator
724 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
727 if (*AnEXATTR & DEFINED)
729 if (*AnEXVAL > 0xFFFFFF)
730 return error("long address is bigger than $FFFFFF");
737 else if (*tok == KW_PC || *tok == KW_CCR || *tok == KW_SR || *tok == KW_SP || (*tok >= KW_MR&&*tok <= KW_SS))
746 if (expr(AnEXPR, AnEXVAL, AnEXATTR, AnESYM) != OK)
749 // We'll store M_DSPEA_ABS in areg and if we have
750 // any extra info, it'll go in am
751 if (*AnEXATTR & DEFINED)
755 if (*AnEXVAL < 0x1000)
757 else if (*AnEXVAL < 0x10000)
759 else if (*AnEXVAL < 0x1000000)
762 return error("address must be smaller than $1000000");
768 // Well, we have no opinion on the expression's size, so let's assume the worst
775 return error("internal assembler error: Please report this error message: 'reached the end of dsp_parmode' with the line of code that caused it. Thanks, and sorry for the inconvenience"); // Something bad happened
780 // Parse all addressing modes except parallel moves
782 int dsp_amode(int maxea)
785 // Initialize global return values
786 nmodes = dsp_a0reg = dsp_a1reg = 0;
787 dsp_am0 = dsp_am1 = M_AM_NONE;
788 dsp_a0expr[0] = dsp_a1expr[0] = ENDEXPR;
791 dsp_a0exattr = dsp_a1exattr = 0;
792 dsp_a0esym = dsp_a1esym = (SYM *)NULL;
793 dsp_a0memspace = dsp_a1memspace = -1;
794 dsp_a0perspace = dsp_a1perspace = -1;
797 // If at EOL, then no addr modes at all
801 if (dsp_parmode(&dsp_am0, &dsp_a0reg, dsp_a0expr, &dsp_a0exval, &dsp_a0exattr, &dsp_a0esym, &dsp_a0memspace, &dsp_a0perspace, 0) == ERROR)
805 // If caller wants only one mode, return just one (ignore comma);
806 // If there is no second addressing mode (no comma), then return just one anyway.
812 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
820 // Parse second addressing mode
821 if (dsp_parmode(&dsp_am1, &dsp_a1reg, dsp_a1expr, &dsp_a1exval, &dsp_a1exattr, &dsp_a1esym, &dsp_a1memspace, &dsp_a1perspace, 1) == ERROR)
824 if (maxea == 2 || *tok == EOL)
827 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
835 // Only MAC-like or jsset/clr/tst/chg instructions here
837 if (dsp_parmode(&dsp_am2, &dsp_a2reg, dsp_a2expr, &dsp_a2exval, &dsp_a2exattr, &dsp_a2esym, &dummy, &dummy, 2) == ERROR)
842 return error(extra_stuff);
848 // Only Tcc instructions here, and then only those that accept 4 operands
850 if (dsp_parmode(&dsp_am2, &dsp_a2reg, dsp_a2expr, &dsp_a2exval, &dsp_a2exattr, &dsp_a2esym, &dummy, &dummy, 2) == ERROR)
854 return error("expected 4 parameters");
856 if (dsp_parmode(&dsp_am3, &dsp_a3reg, dsp_a3expr, &dsp_a3exval, &dsp_a3exattr, &dsp_a3esym, &dummy, &dummy, 3) == ERROR)
862 return error("-x0/-x1/-y0/-y1 only allowed in multiply operations");
869 // Tcc instructions do not support parallel moves, so any remaining tokens are garbage
870 return error(extra_stuff);
873 return error("internal assembler error: Please report this error message: 'reached the end of dsp_amode' with the line of code that caused it. Thanks, and sorry for the inconvenience"); //Something bad happened
878 // Helper function which gives us the encoding of a DSP register
880 static inline int SDreg(int reg)
882 if (reg >= KW_X0 && reg <= KW_N7)
884 else if (reg >= KW_A0&® <= KW_A2)
885 return (8 >> (reg & 7)) | 8;
886 else //if (reg>=KW_R0&®<=KW_R7)
887 return reg - KW_R0 + 16;
888 // Handy map for the above:
889 // (values are of course taken from keytab)
890 // Register | Value | Return value
923 // Check for X:Y: parallel mode syntax
925 static inline LONG check_x_y(LONG ea1, LONG S1)
928 LONG eax_temp, eay_temp;
929 LONG D1, D2, S2, ea2;
931 LONG w = 1 << 7; // S1=0, D1=1<<14
933 if ((ea1 & 0x38) == DSP_EA_POSTINC || (ea1 & 0x38) == DSP_EA_POSTINC1 ||
934 (ea1 & 0x38) == DSP_EA_POSTDEC1 || (ea1 & 0x38) == DSP_EA_NOUPD)
938 case DSP_EA_POSTINC: ea1 = (ea1 & (~0x38)) | 0x8; break;
939 case DSP_EA_POSTINC1: ea1 = (ea1 & (~0x38)) | 0x18; break;
940 case DSP_EA_POSTDEC1: ea1 = (ea1 & (~0x38)) | 0x10; break;
941 case DSP_EA_NOUPD: ea1 = (ea1 & (~0x38)) | 0x00; break;
946 // 'X:eax,D1 Y:eay,D2', 'X:eax,D1 S2,Y:eay'
948 switch (K_D1 = *tok++)
950 case KW_X0: D1 = 0 << 10; break;
951 case KW_X1: D1 = 1 << 10; break;
952 case KW_A: D1 = 2 << 10; break;
953 case KW_B: D1 = 3 << 10; break;
954 default: return error("unrecognised X:Y: parallel move syntax: expected x0, x1, a or b after 'X:eax,'");
959 // 'S1,X:eax Y:eay,D2' 'S1,X:eax S2,Y:eay'
964 case 4: D1 = 0 << 10; break;
965 case 5: D1 = 1 << 10; break;
966 case 14: D1 = 2 << 10; break;
967 case 15: D1 = 3 << 10; break;
968 default: return error("unrecognised X:Y: parallel move syntax: S1 can only be x0, x1, a or b in 'S1,X:eax'");
975 // 'X:eax,D1 Y:eay,D2' 'S1,X:eax Y:eay,D2'
977 return error("unrecognised X:Y: parallel move syntax: expected ':' after 'X:ea,D1/S1,X:ea Y'");
981 if (*tok >= KW_R0 && *tok <= KW_R7)
983 ea2 = (*tok++ - KW_R0);
985 if (((ea1 & 7) < 4 && ea2 < 4) || ((ea1 & 7) >= 4 && ea2 > 4))
986 return error("unrecognised X:Y: parallel move syntax: eax and eay register banks must be different in 'X:ea,D1/S1,X:ea Y:eay,D2'");
989 return error("unrecognised X:Y: parallel move syntax: expected 'Rn' after 'X:ea,D1/S1,X:ea Y:('");
991 // If eax register is r0-r3 then eay register is r4-r7.
992 // Encode that to 2 bits (i.e. eay value is 0-3)
993 eax_temp = (ea2 & 3) << 5; // Store register temporarily
996 return error("unrecognised X:Y: parallel move syntax: expected ')' after 'X:ea,D1/S1,X:ea Y:(Rn'");
1008 else if (*tok >= KW_N0 && *tok <= KW_N7)
1011 if ((*tok++ & 7) != ea2)
1012 return error("unrecognised X:Y: parallel move syntax(Same register number expected for Rn, Nn in 'X:ea,D1/S1,X:ea Y:(Rn)+Nn,D')");
1017 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:(Rn)+Nn'");
1020 return error("unrecognised X:Y: parallel move syntax: expected ',' or 'Nn' after 'X:ea,D1/S1,X:ea Y:(Rn)+'");
1023 else if (*tok == '-')
1030 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:(Rn)-'");
1032 else if (*tok++ == ',')
1038 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea Y:eay'");
1040 ea2 |= eax_temp; // OR eay back from temp
1042 switch (K_D2 = *tok++)
1044 case KW_Y0: D2 = 0 << 8; break;
1045 case KW_Y1: D2 = 1 << 8; break;
1046 case KW_A: D2 = 2 << 8; break;
1047 case KW_B: D2 = 3 << 8; break;
1048 default: return error("unrecognised X:Y: parallel move syntax: expected y0, y1, a or b after 'X:ea,D1/S1,X:ea Y:eay,'");
1052 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea Y:eay,D'");
1056 return error("unrecognised X:Y: parallel move syntax: D1 and D2 cannot be the same in 'X:ea,D1 Y:eay,D2'");
1058 inst = B16(11000000, 00000000) | w;
1059 inst |= ea1 | D1 | ea2 | D2;
1063 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' after 'X:ea,D1/S1,X:ea Y:'");
1065 else if (*tok == KW_Y0 || *tok == KW_Y1 || *tok == KW_A || *tok == KW_B)
1067 // 'X:eax,D1 S2,Y:eay' 'S1,X:eax1 S2,Y:eay'
1070 case KW_Y0: S2 = 0 << 8; break;
1071 case KW_Y1: S2 = 1 << 8; break;
1072 case KW_A: S2 = 2 << 8; break;
1073 case KW_B: S2 = 3 << 8; break;
1074 default: return error("unrecognised X:Y: parallel move syntax: expected y0, y1, a or b after 'X:ea,D1/S1,X:ea Y:eay,'");
1078 return error("unrecognised X:Y: parallel move syntax: expected ',' after 'X:ea,D1/S1,X:ea S2'");
1082 // 'X:eax,D1 Y:eay,D2' 'S1,X:eax Y:eay,D2'
1084 return error("unrecognised X:Y: parallel move syntax: expected ':' after 'X:ea,D1/S1,X:ea Y'");
1088 if (*tok >= KW_R0 && *tok <= KW_R7)
1090 ea2 = (*tok++ - KW_R0);
1092 if (((ea1 & 7) < 4 && ea2 < 4) || ((ea1 & 7) >= 4 && ea2 > 4))
1093 return error("unrecognised X:Y: parallel move syntax: eax and eay register banks must be different in 'X:ea,D1/S1,X:ea S2,Y:eay'");
1096 return error("unrecognised X:Y: parallel move syntax: expected 'Rn' after 'X:ea,D1/S1,X:ea S2,Y:('");
1097 // If eax register is r0-r3 then eay register is r4-r7.
1098 // Encode that to 2 bits (i.e. eay value is 0-3)
1099 eay_temp = (ea2 & 3) << 5; //Store register temporarily
1102 return error("unrecognised X:Y: parallel move syntax: expected ')' after 'X:ea,D1/S1,X:ea S2,Y:(Rn'");
1111 else if (*tok >= KW_N0 && *tok <= KW_N7)
1114 if ((*tok++ & 7) != ea2)
1115 return error("unrecognised X:Y: parallel move syntax(Same register number expected for Rn, Nn in 'X:ea,D1/S1,X:ea S2,Y:(Rn)+Nn')");
1120 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:(Rn)+Nn'");
1123 return error("unrecognised X:Y: parallel move syntax: expected ',' or 'Nn' after 'X:ea,D1/S1,X:ea S2,Y:(Rn)+'");
1126 else if (*tok == '-')
1132 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:(Rn)-'");
1134 else if (*tok == EOL)
1140 return error("unrecognised X:Y: parallel move syntax: expected end-of-line after 'X:ea,D1/S1,X:ea S2,Y:eay'");
1142 ea2 |= eay_temp; //OR eay back from temp
1144 inst = B16(10000000, 00000000) | w;
1145 inst |= (ea1 & 0x1f) | D1 | S2 | ea2;
1149 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' after 'X:ea,D1/S1,X:ea Y:'");
1152 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' in 'X:ea,D1/S1,X:ea'");
1155 return error("unrecognised X:Y: or X:R parallel move syntax: expected Y:, A or B after 'X:ea,D1/S1,X:ea S2,'");
1158 return error("unrecognised X:Y: parallel move syntax: expected '(Rn)', '(Rn)+', '(Rn)-', '(Rn)+Nn' in 'X:ea,D1/S1,X:ea'");
1162 // Parse X: addressing space parallel moves
1164 static inline LONG parse_x(const int W, LONG inst, const LONG S1, const int check_for_x_y)
1166 int immreg; // Immediate register destination
1167 LONG S2, D1, D2; // Source and Destinations
1168 LONG ea1; // ea bitfields
1169 uint32_t termchar = ','; // Termination character for ea checks
1170 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1171 ea1 = -1; // initialise e1 (useful for some code paths)
1178 if (tok[1] == CONST || tok[1] == FCONST)
1181 dspImmedEXVAL = *tok++;
1185 // This could be either -(Rn), -aa or -ea. Check for immediate first
1186 if (tok[1] == SYMBOL)
1188 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1193 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B', 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1194 if (*tok == KW_X0 && tok[1] == ',' && tok[2] == KW_A)
1197 if (ea1 == DSP_EA_ABS)
1198 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1201 return error("unrecognised X:R parallel move syntax: S1 can only be a in 'a,X:ea x0,a'");
1204 return error("unrecognised X:R parallel move syntax: absolute address not allowed in 'a,X:ea x0,a'");
1206 if (ea1 == B8(00110100))
1207 return error("unrecognised X:R parallel move syntax: immediate data not allowed in 'a,X:ea x0,a'");
1209 inst = B16(00001000, 00000000) | ea1 | (0 << 8);
1212 else if (*tok == KW_X0 && tok[1] == ',' && tok[2] == KW_B)
1215 if (ea1 == DSP_EA_ABS)
1216 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1219 return error("unrecognised X:R parallel move syntax: S1 can only be b in 'b,X:ea x0,b'");
1222 return error("unrecognised X:R parallel move syntax: absolute address not allowed in 'b,X:ea x0,b'");
1224 if (ea1 == B8(00110100))
1225 return error("unrecognised X:R parallel move syntax: immediate data not allowed in 'b,X:ea x0,b'");
1227 inst = B16(00001001, 00000000) | ea1 | (1 << 8);
1230 else if (*tok == KW_A || *tok == KW_B)
1232 // 'S1,X:ea S2,D2', 'S1,X:eax S2,Y:eay'
1235 case 4: D1 = 0 << 10; break;
1236 case 5: D1 = 1 << 10; break;
1237 case 14: D1 = 2 << 10; break;
1238 case 15: D1 = 3 << 10; break;
1239 default: return error("unrecognised X:R parallel move syntax: S1 can only be x0, x1, a or b in 'S1,X:ea S2,D2'");
1242 if (tok[1] == ',' && tok[2] == KW_Y)
1244 // 'S1,X:eax S2,Y:eay'
1245 return check_x_y(ea1, S1);
1249 if (ea1 == DSP_EA_ABS)
1250 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1254 case KW_A: S2 = 0 << 9; break;
1255 case KW_B: S2 = 1 << 9; break;
1256 default: return error("unrecognised X:R parallel move syntax: expected a or b after 'S1,X:eax'");
1260 return error("unrecognised X:R parallel move syntax: expected ',' after 'S1,X:eax S2'");
1262 if (*tok == KW_Y0 || *tok == KW_Y1)
1264 if (*tok++ == KW_Y0)
1270 return error("unrecognised X:R parallel move syntax: unexpected text after 'X:eax,D1 S2,S2'");
1272 inst = B16(00010000, 00000000) | (0 << 7);
1273 inst |= ea1 | D1 | S2 | D2;
1277 return error("unrecognised X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1 S2,'");
1279 else if (*tok == KW_Y)
1281 // 'S1,X:eax Y:eay,D2'
1282 return check_x_y(ea1, S1);
1284 else if (*tok == KW_Y0 || *tok == KW_Y1)
1286 // 'S1,X:eax S2,Y:eay'
1287 return check_x_y(ea1, S1);
1290 return error("unrecognised X:Y or X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1/X:ea,D1");
1294 // Only check for aa if we have a defined number in our hands or we've
1295 // been asked to use a short number format. The former case we'll just test
1296 // it to see if it's small enough. The later - it's the programmer's call
1297 // so he'd better have a small address or the fixups will bite him/her in the arse!
1298 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1301 // It's an immediate, so ea or eax is probably an absolute address
1302 // (unless it's aa if the immediate is small enough)
1303 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
1305 // Check for aa (which is 6 bits zero extended)
1306 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1310 // It might be X:aa but we're not 100% sure yet.
1311 // If it is, the only possible syntax here is 'X:aa,D'.
1312 // So check ahead to see if EOL follows D, then we're good to go.
1313 if (*tok == ',' && ((*(tok + 1) >= KW_X0 && *(tok + 1) <= KW_N7) || (*(tok + 1) >= KW_R0 && *(tok + 1) <= KW_R7) || (*(tok + 1) >= KW_A0 && *(tok + 1) <= KW_A2)) && *(tok + 2) == EOL)
1315 // Yup, we're good to go - 'X:aa,D' it is
1317 immreg = SDreg(*tok++);
1318 inst = inst | (uint32_t)dspImmedEXVAL;
1319 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
1320 inst |= 1 << 7; // W
1329 inst = inst | (uint32_t)dspImmedEXVAL;
1330 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1335 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B',
1336 // 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1338 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1339 goto x_checkea_right;
1345 // Well, that settles it - we do have an ea in our hands
1348 // 'X:ea,D' [... S2,d2]
1350 return error("unrecognised X: parallel move syntax: expected ',' after 'X:ea'");
1352 if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
1359 inst = inst | B8(01000000) | (1 << 7);
1360 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1363 if (ea1 == DSP_EA_ABS)
1364 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1371 if (*tok == KW_A || *tok == KW_B)
1376 return error("unrecognised X:R parallel move syntax: expected comma after X:ea,D1 S2");
1378 if (*tok == KW_Y0 || *tok == KW_Y1)
1383 return error("unrecognised X:R parallel move syntax: expected EOL after X:ea,D1 S2,D2");
1385 inst = B16(00010000, 00000000) | (1 << 7);
1386 inst |= ((D1 & 0x8) << (12 - 4)) + ((D1 & 1) << 10);
1387 inst |= (S2 & 1) << 9;
1388 inst |= (D2 & 1) << 8;
1393 return error("unrecognised X:R parallel move syntax: expected y0,y1 after X:ea,D1 S2,");
1396 return error("unrecognised X:R parallel move syntax: expected a,b after X:ea,D1");
1400 return error("unrecognised X: parallel move syntax: expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after 'X:ea,'");
1407 inst = inst | B8(01000000) | (0 << 7);
1408 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1411 if (ea1 == DSP_EA_ABS)
1412 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1418 // 'S1,X:ea S2,D2', 'A,X:ea X0,A', 'B,X:ea X0,B',
1419 // 'S1,X:eax Y:eay,D2', 'S1,X:eax S2,Y:eay'
1420 goto x_checkea_right;
1429 // It's not an immediate, check for '-(Rn)'
1430 ea1 = checkea(termchar, X_ERRORS);
1439 else if (*tok == '#')
1443 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1446 // Okay so we have immediate data - mark it down
1448 // Now, proceed to the main code for this branch
1451 else if (*tok == '(')
1453 // Maybe we got an expression here, check for it
1454 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
1456 // Evaluate the expression and go to immediate code path
1457 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
1461 // Nope, let's check for ea then
1462 ea1 = checkea(termchar, X_ERRORS);
1471 return error("Comma expected after 'X:(Rn)')");
1473 // It might be 'X:(Rn..)..,D' but we're not 100% sure yet.
1474 // If it is, the only possible syntax here is 'X:ea,D'.
1475 // So check ahead to see if EOL follows D, then we're good to go.
1476 if (((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)) && *(tok + 1) == EOL)
1481 inst = inst | B8(01000000) | (1 << 7);
1483 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1492 inst = inst | B8(01000000) | (0 << 7);
1494 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1499 goto x_checkea_right;
1503 // 'X:eax,D1 Y:eay,D2', 'X:eax,D1 S2,Y:eay' or 'X:ea,D1 S2,D2'
1504 // Check ahead for S2,D2 - if that's true then we have 'X:ea,D1 S2,D2'
1505 if ((*tok == KW_X0 || *tok == KW_X1 || *tok == KW_A || *tok == KW_B) && (*(tok + 1) == KW_A || *(tok + 1) == KW_B) && (*(tok + 2) == ',') && (*(tok + 3) == KW_Y0 || (*(tok + 3) == KW_Y1)))
1508 // Check if D1 is x0, x1, a or b
1511 case KW_X0: D1 = 0 << 10; break;
1512 case KW_X1: D1 = 1 << 10; break;
1513 case KW_A: D1 = 2 << 10; break;
1514 case KW_B: D1 = 3 << 10; break;
1515 default: return error("unrecognised X:R parallel move syntax: expected x0, x1, a or b after 'X:eax,'");
1520 case KW_A: S2 = 0 << 9; break;
1521 case KW_B: S2 = 1 << 9; break;
1522 default: return error("unrecognised X:R parallel move syntax: expected a or b after 'X:eax,D1 '");
1526 return error("unrecognised X:R parallel move syntax: expected ',' after 'X:eax,D1 S2'");
1528 if (*tok == KW_Y0 || *tok == KW_Y1)
1530 if (*tok++ == KW_Y0)
1536 return error("unrecognised X:R parallel move syntax: unexpected text after 'X:eax,D1 S2,S2'");
1538 inst = B16(00010000, 00000000) | (W << 7);
1539 inst |= ea1 | D1 | S2 | D2;
1543 return error("unrecognised X:R parallel move syntax: expected y0 or y1 after 'X:eax,D1 S2,'");
1546 // Check to see if we got eax (which is a subset of ea)
1549 if ((inst = check_x_y(ea1, 0)) != 0)
1553 // Rewind pointer as it might be an expression and check for it
1556 if (expr(dspaaEXPR, &dspaaEXVAL, &dspaaEXATTR, &dspaaESYM) != OK)
1559 // Yes, we have an expression, so we now check for
1560 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
1565 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
1567 // Check for immediate address
1568 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1571 // We set ea1 here - if it's aa instead of ea
1572 // then it won't be used anyway
1575 if (!(dspImmedEXATTR&DEFINED))
1577 force_imm = NUM_FORCE_LONG;
1578 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1583 else if (*tok == '>')
1585 // Check for immediate address forced long
1588 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1591 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFFFFF))
1592 return error("long address is bigger than $FFFFFF");
1594 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1596 force_imm = NUM_FORCE_LONG;
1600 else if (*tok == '<')
1602 // Check for immediate address forced short
1605 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1608 force_imm = NUM_FORCE_SHORT;
1610 if (dspImmedEXATTR & DEFINED)
1612 if (dspImmedEXVAL > 0x3F)
1614 if (optim_warn_flag)
1615 warn("short addressing mode forced but address is bigger than $3F - switching to long");
1617 force_imm = NUM_FORCE_LONG;
1618 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1624 // This might end up as something like 'move Y:<adr,register'
1625 // so let's mark it as an extra aa fixup here.
1626 // Note: we are branching to x_check_immed without a
1627 // defined dspImmed so it's going to be 0. It probably
1628 // doesn't harm anything.
1629 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
1635 return error("unknown x: addressing mode");
1640 // Parse Y: addressing space parallel moves
1642 static inline LONG parse_y(LONG inst, LONG S1, LONG D1, LONG S2)
1644 int immreg; // Immediate register destination
1645 LONG D2; // Destination
1646 LONG ea1; // ea bitfields
1647 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1650 if (tok[1] == CONST || tok[1] == FCONST)
1653 dspImmedEXVAL = *tok++;
1656 // This could be either -(Rn), -aa or -ea. Check for immediate first
1657 if (*tok == SYMBOL || tok[1] == SYMBOL)
1659 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1661 // Only check for aa if we have a defined number in our hands or we've
1662 // been asked to use a short number format. The former case we'll just test
1663 // it to see if it's small enough. The later - it's the programmer's call
1664 // so he'd better have a small address or the fixups will bite him/her in the arse!
1665 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1667 // It's an immediate, so ea is probably an absolute address
1668 // (unless it's aa if the immediate is small enough)
1669 // 'Y:ea,D', 'Y:aa,D', 'S,Y:ea' or 'S,Y:aa'
1671 // Check for aa (which is 6 bits zero extended)
1672 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1674 // It might be Y:aa but we're not 100% sure yet.
1675 // If it is, the only possible syntax here is 'Y:aa,D'/'S,Y:aa'.
1676 // So check ahead to see if EOL follows D, then we're good to go.
1677 if (*tok == EOL && S1 != 0)
1680 inst = B16(01001000, 00000000);
1681 inst |= dspImmedEXVAL;
1682 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1686 if (*tok == ',' && ((*(tok + 1) >= KW_X0 && *(tok + 1) <= KW_N7) || (*(tok + 1) >= KW_R0 && *(tok + 1) <= KW_R7) || (*(tok + 1) >= KW_A0 && *(tok + 1) <= KW_A2)) && *(tok + 2) == EOL)
1688 // Yup, we're good to go - 'Y:aa,D' it is
1690 immreg = SDreg(*tok++);
1691 inst |= dspImmedEXVAL;
1692 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
1697 // Well, that settles it - we do have a ea in our hands
1698 if (*tok == EOL && S1 != 0)
1701 inst = B16(01001000, 01110000);
1703 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1704 if (ea1 == DSP_EA_ABS)
1705 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1710 return error("unrecognised Y: parallel move syntax: expected ',' after 'Y:ea'");
1712 if (D1 == 0 && S1 == 0)
1715 if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
1720 return error("unrecognised Y: parallel move syntax: expected EOL after 'Y:ea,D'");
1722 inst |= B16(00000000, 01110000);
1724 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1725 if (ea1 == DSP_EA_ABS)
1726 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1730 return error("unrecognised Y: parallel move syntax: expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after 'Y:ea,'");
1735 if (*tok == KW_A || *tok == KW_B || *tok == KW_Y0 || *tok == KW_Y1)
1740 inst |= (S1 & 1) << 11;
1741 inst |= (D1 & 1) << 10;
1742 inst |= (D2 & 8) << (9 - 3);
1743 inst |= (D2 & 1) << 8;
1747 return error("unrecognised R:Y: parallel move syntax: expected a,b after 'S1,D1 Y:ea,'");
1755 // It's not an immediate, check for '-(Rn)'
1756 ea1 = checkea(',', Y_ERRORS);
1765 else if (*tok == '#')
1769 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1772 // Okay so we have immediate data - mark it down
1774 // Now, proceed to the main code for this branch
1777 else if (*tok == '(')
1779 // Maybe we got an expression here, check for it
1780 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
1782 // Evaluate the expression and go to immediate code path
1783 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
1787 // Nope, let's check for ea then
1788 if (S1 == 0 || (S1 != 0 && D1 != 0))
1789 ea1 = checkea(',', Y_ERRORS);
1791 ea1 = checkea(EOL, Y_ERRORS);
1797 if (S1 != 0 && *tok == EOL)
1800 inst = B16(01001000, 01000000);
1802 inst |= ((S1 & 0x18) << (12 - 3)) + ((S1 & 7) << 8);
1805 else if (S1 != 0 && D1 != 0 && S2 == 0)
1810 case 14: S1 = 0 << 11; break; // A
1811 case 15: S1 = 1 << 11; break; // B
1812 default: return error("unrecognised R:Y parallel move syntax: S1 can only be A or B in 'S1,D1 Y:ea,D2'"); break;
1817 case 4: D1 = 0 << 10; break; // X0
1818 case 5: D1 = 1 << 10; break; // X1
1819 default: return error("unrecognised R:Y parallel move syntax: D1 can only be x0 or x1 in 'S1,D1 Y:ea,D2'");break;
1823 return error("unrecognised R:Y parallel move syntax: expected ',' after 'S1,D1 Y:ea'");
1827 case KW_Y0: D2 = 0 << 8; break;
1828 case KW_Y1: D2 = 1 << 8; break;
1829 case KW_A: D2 = 2 << 8; break;
1830 case KW_B: D2 = 3 << 8; break;
1831 default: return error("unrecognised R:Y parallel move syntax: D2 can only be y0, y1, a or b after 'S1,D1 Y:ea'");
1834 inst = B16(00010000, 11000000);
1835 inst |= S1 | D1 | D2;
1841 return error("Comma expected after 'Y:(Rn)')");
1843 // It might be 'Y:(Rn..)..,D' but we're not 100% sure yet.
1844 // If it is, the only possible syntax here is 'Y:ea,D'.
1845 // So check ahead to see if EOL follows D, then we're good to go.
1846 if (((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)) && *(tok + 1) == EOL)
1850 inst |= B16(00000000, 01000000);
1852 inst |= ((D1 & 0x18) << (12 - 3)) + ((D1 & 7) << 8);
1856 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
1858 // Check for immediate address
1859 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1862 // Yes, we have an expression, so we now check for
1863 // 'Y:ea,D' or 'Y:aa,D'
1864 ea1 = DSP_EA_ABS; // Reluctant - but it's probably correct
1866 if (!(dspImmedEXATTR&DEFINED))
1868 force_imm = NUM_FORCE_LONG;
1869 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1874 else if (*tok == '>')
1876 // Check for immediate address forced long
1879 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1882 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFFFFF))
1883 return error("long address is bigger than $FFFFFF");
1885 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1887 force_imm = NUM_FORCE_LONG;
1891 else if (*tok == '<')
1895 if (S1 != 0 && D1 != 0)
1897 // We're in 'S1,D1 Y:ea,D2' or 'S1,D1 S1,Y:ea'
1898 // there's no Y:aa mode here, so we'll force long
1899 if (optim_warn_flag)
1900 warn("forced short addressing in R:Y mode is not allowed - switching to long");
1902 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1907 force_imm = NUM_FORCE_LONG;
1908 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1913 // Check for immediate address forced short
1914 ea1 = DSP_EA_ABS; // Reluctant - but it's probably correct
1916 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
1919 force_imm = NUM_FORCE_SHORT;
1921 if (dspImmedEXATTR & DEFINED)
1923 if (dspImmedEXVAL > 0xFFF)
1925 if (optim_warn_flag)
1926 warn("short addressing mode forced but address is bigger than $FFF - switching to long");
1929 force_imm = NUM_FORCE_LONG;
1930 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
1935 // This might end up as something like 'move Y:<adr,register'
1936 // so let's mark it as an extra aa fixup here.
1937 // Note: we are branching to y_check_immed without a
1938 // defined dspImmed so it's going to be 0. It probably
1939 // doesn't harm anything.
1940 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
1947 return error("unrecognised Y: parallel move syntax");
1952 // Parse L: addressing space parallel moves
1954 static inline LONG parse_l(const int W, LONG inst, LONG S1)
1956 int immreg; // Immediate register destination
1957 LONG D1; // Source and Destinations
1958 LONG ea1; // ea bitfields
1959 int force_imm = NUM_NORMAL; // Holds forced immediate value (i.e. '<' or '>')
1963 if (*tok == CONST || tok[1] == FCONST)
1966 dspImmedEXVAL = *tok++;
1970 // This could be either -(Rn), -aa or -ea. Check for immediate first
1971 // Maybe we got an expression here, check for it
1972 if (*tok == SYMBOL || tok[1] == SYMBOL)
1974 // Evaluate the expression and go to immediate code path
1975 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) == OK)
1977 // Only check for aa if we have a defined number in our hands
1978 // or we've been asked to use a short number format. The
1979 // former case we'll just test it to see if it's small enough.
1980 // The later - it's the programmer's call so he'd better have
1981 // a small address or the fixups will bite him/her in the arse!
1982 if (dspImmedEXATTR&DEFINED || force_imm == NUM_FORCE_SHORT)
1984 // It's an immediate, so ea is probably an absolute address
1985 // (unless it's aa if the immediate is small enough)
1986 // 'L:ea,D' or 'L:aa,D'
1988 // Check for aa (which is 6 bits zero extended)
1992 if (dspImmedEXVAL < 0x40 && force_imm != NUM_FORCE_LONG)
1997 else if (S1 == KW_B)
2002 inst = B16(01000000, 00000000);
2003 inst |= dspImmedEXVAL;
2004 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
2012 else if (S1 == KW_B)
2017 if (ea1 == DSP_EA_ABS)
2018 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2020 inst |= B16(01000000, 01110000);
2021 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
2029 return error("unrecognised L: parallel move syntax: expected ',' after 'L:ea/L:aa'");
2031 // Check for allowed registers for D (a0, b0, x, y, a, b, ab or ba)
2032 if (!((*tok >= KW_A10 && *(tok + 1) <= KW_BA) || (*tok >= KW_A && *tok <= KW_B)))
2033 return error("unrecognised L: parallel move syntax: expected a0, b0, x, y, a, b, ab or ba after 'L:ea/L:aa'");
2035 if (dspImmedEXVAL < (1 << 6) && (dspImmedEXATTR&DEFINED))
2043 else if (immreg == KW_B)
2049 return error("unrecognised L: parallel move syntax: expected End-Of-Line after L:aa,D");
2051 inst &= B16(11111111, 10111111);
2052 inst |= dspImmedEXVAL;
2053 inst |= ((immreg & 0x4) << (11 - 2)) + ((immreg & 3) << 8);
2058 if (deposit_extra_ea == DEPOSIT_EXTRA_FIXUP)
2060 // Hang on, we've got a L:<aa here, let's do that instead
2064 // Well, that settles it - we do have a ea in our hands
2070 else if (D1 == KW_B)
2076 return error("unrecognised L: parallel move syntax: expected End-Of-Line after L:ea,D");
2078 inst |= B16(00000000, 00110000);
2079 inst |= ((D1 & 0x4) << (11 - 2)) + ((D1 & 3) << 8);
2085 //It's not an immediate, check for '-(Rn)'
2086 ea1 = checkea(',', L_ERRORS);
2095 else if (*tok == '(')
2097 // Maybe we got an expression here, check for it
2098 if (tok[1] == CONST || tok[1] == FCONST || tok[1] == SUNARY || tok[1] == SYMBOL || tok[1] == STRING)
2100 // Evaluate the expression and go to immediate code path
2101 expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM);
2105 //Nope, let's check for ea then
2107 ea1 = checkea(',', L_ERRORS);
2109 ea1 = checkea(EOL, L_ERRORS);
2118 inst = B16(01000000, 01000000);
2122 else if (S1 == KW_B)
2128 inst |= ((S1 & 0x4) << (11 - 2)) + ((S1 & 3) << 8);
2131 else if (*tok++ != ',')
2132 return error("Comma expected after 'L:(Rn)')");
2134 // It might be 'L:(Rn..)..,D' but we're not 100% sure yet.
2135 // If it is, the only possible syntax here is 'L:ea,D'.
2136 // So check ahead to see if EOL follows D, then we're good to go.
2137 if (((*tok >= KW_A10 && *tok <= KW_BA) || (*tok >= KW_A && *tok <= KW_B)) && *(tok + 1) == EOL)
2144 else if (D1 == KW_B)
2150 inst |= ((D1 & 0x4) << (11 - 2)) + ((D1 & 3) << 8);
2154 else if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
2156 // Check for immediate address
2157 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2160 // We set ea1 here - if it's aa instead of ea
2161 // then it won't be used anyway
2164 if (!(dspImmedEXATTR & DEFINED))
2166 force_imm = NUM_FORCE_LONG;
2167 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2169 else if (dspImmedEXVAL > 0x3f)
2171 // Definitely no aa material, so it's going to be a long
2172 // Mark that we need to deposit an extra word
2173 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2176 // Yes, we have an expression, so we now check for
2177 // 'L:ea,D' or 'L:aa,D'
2180 else if (*tok == '>')
2182 // Check for immediate address forced long
2185 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2188 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFFFFF))
2189 return error("long address is bigger than $FFFFFF");
2191 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2193 force_imm = NUM_FORCE_LONG;
2196 else if (*tok == '<')
2198 // Check for immediate address forced short
2201 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2204 if (dspImmedEXATTR & DEFINED)
2206 if (dspImmedEXVAL > 0xFFF)
2207 return error("short addressing mode forced but address is bigger than $FFF");
2211 // This might end up as something like 'move Y:<adr,register'
2212 // so let's mark it as an extra aa fixup here.
2213 // Note: we are branching to l_check_immed without a
2214 // defined dspImmed so it's going to be 0. It probably
2215 // doesn't harm anything.
2216 deposit_extra_ea = DEPOSIT_EXTRA_FIXUP;
2219 force_imm = NUM_FORCE_SHORT;
2223 return error("internal assembler error: Please report this error message: 'reached the end of parse_l' with the line of code that caused it. Thanks, and sorry for the inconvenience");
2228 // Checks for all ea cases where indexed addressing is concenred
2230 static inline LONG checkea(const uint32_t termchar, const int strings)
2240 return error(ea_errors[strings][0]);
2242 if (*tok >= KW_R0 && *tok <= KW_R7)
2244 // We got '-(Rn' so mark it down
2245 ea = DSP_EA_PREDEC1 | (*tok++ - KW_R0);
2248 return error(ea_errors[strings][1]);
2250 // Now, proceed to the main code for this branch
2254 return error(ea_errors[strings][2]);
2256 else if (*tok == '(')
2258 // Checking for ea of type (Rn)
2261 if (*tok >= KW_R0 && *tok <= KW_R7)
2263 // We're in 'X:(Rn..)..,D', 'X:(Rn..)..,D1 Y:eay,D2', 'X:(Rn..)..,D1 S2,Y:eay'
2264 ea = *tok++ - KW_R0;
2271 if (*tok < KW_N0 || *tok > KW_N7)
2272 return error(ea_errors[strings][3]);
2274 if ((*tok++ & 7) != ea)
2275 return error(ea_errors[strings][4]);
2280 return error(ea_errors[strings][5]);
2284 else if (*tok == ')')
2286 // Check to see if we have '(Rn)+', '(Rn)-', '(Rn)-Nn', '(Rn)+Nn' or '(Rn)'
2293 if (termchar == ',')
2298 ea |= DSP_EA_POSTINC1;
2301 else if (*tok >= KW_N0 && *tok <= KW_N7)
2304 if ((*tok++ & 7) != ea)
2305 return error(ea_errors[strings][6]);
2307 ea |= DSP_EA_POSTINC;
2311 return error(ea_errors[strings][7]);
2315 if (*tok >= KW_N0 && *tok <= KW_N7)
2318 if ((*tok++ & 7) != ea)
2319 return error(ea_errors[strings][6]);
2321 ea |= DSP_EA_POSTINC;
2327 ea |= DSP_EA_POSTINC1;
2332 else if (*tok == '-')
2336 if (termchar == ',')
2341 ea |= DSP_EA_POSTDEC1;
2344 else if (*tok >= KW_N0 && *tok <= KW_N7)
2347 if ((*tok++ & 7) != ea)
2348 return error(ea_errors[strings][8]);
2350 ea |= DSP_EA_POSTDEC;
2354 return error(ea_errors[strings][9]);
2358 if (*tok >= KW_N0 && *tok <= KW_N7)
2361 if ((*tok++ & 7) != ea)
2362 return error(ea_errors[strings][8]);
2364 ea |= DSP_EA_POSTDEC;
2370 ea |= DSP_EA_POSTDEC1;
2375 else if (termchar == ',')
2384 return error(ea_errors[strings][10]);
2394 return error(ea_errors[strings][11]);
2398 return error("internal assembler error: Please report this error message: 'reached the end of checkea' with the line of code that caused it. Thanks, and sorry for the inconvenience");
2403 // Checks for all ea cases, i.e. all addressing modes that checkea handles
2404 // plus immediate addresses included forced short/long ones.
2405 // In other words this is a superset of checkea (and in fact calls checkea).
2407 LONG checkea_full(const uint32_t termchar, const int strings)
2411 if (*tok == CONST || *tok == FCONST || *tok == SYMBOL)
2413 // Check for immediate address
2414 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2417 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2419 // Yes, we have an expression
2422 else if (*tok == '>')
2424 // Check for immediate address forced long
2427 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2430 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFFFFF))
2431 return error("long address is bigger than $FFFFFF");
2433 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2435 // Yes, we have an expression
2438 else if (*tok == '<')
2440 // Check for immediate address forced short
2443 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2446 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFF))
2447 return error("short addressing mode forced but address is bigger than $FFF");
2449 // Yes, we have an expression
2454 ea1 = checkea(termchar, strings);
2466 // Main routine to check parallel move modes.
2467 // It's quite complex so it's split into a few procedures (in fact most of the
2468 // above ones). A big effort was made so this can be managable and not too
2469 // hacky, however one look at the 56001 manual regarding parallel moves and
2470 // you'll know that this is not an easy // problem to deal with!
2471 // dest=destination register from the main opcode. This must not be the same
2472 // as D1 or D2 and that even goes for stuff like dest=A, D1=A0/1/2!!!
2474 LONG parmoves(WORD dest)
2476 int force_imm; // Addressing mode force operator
2477 int immreg; // Immediate register destination
2478 LONG inst; // 16 bit bitfield that has the parallel move opcode
2479 LONG S1, S2, D1, D2; // Source and Destinations
2480 LONG ea1; // ea bitfields
2485 return B16(00100000, 00000000);
2490 // '#xxxxxx,D', '#xx,D'
2492 force_imm = NUM_NORMAL;
2496 force_imm = NUM_FORCE_LONG;
2499 else if (*tok == '<')
2501 force_imm = NUM_FORCE_SHORT;
2505 if (expr(dspImmedEXPR, &dspImmedEXVAL, &dspImmedEXATTR, &dspImmedESYM) != OK)
2509 return error("expected comma");
2511 if (!((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2)))
2512 return error("expected x0,x1,y0,y1,a0,b0,a2,b2,a1,b1,a,b,r0-r7,n0-n7 after immediate");
2514 immreg = SDreg(*tok++);
2518 if (!(dspImmedEXATTR & FLOAT))
2520 if (dspImmedEXATTR & DEFINED)
2522 // From I parallel move:
2523 // "If the destination register D is X0, X1, Y0, Y1, A, or
2524 // B, the 8-bit immediate short operand is interpreted as
2525 // a signed fraction and is stored in the specified
2526 // destination register. That is, the 8 - bit data is
2527 // stored in the eight MS bits of the destination operand,
2528 // and the remaining bits of the destination operand D are
2530 // The funny bit is that Motorola assembler can parse
2531 // something like 'move #$FF0000,b' into an I (immediate
2532 // short move) - so let's do that as well then...
2533 if (((immreg >= 4 && immreg <= 7) || immreg == 14 || immreg == 15) && force_imm != NUM_FORCE_LONG)
2535 if ((dspImmedEXVAL & 0xFFFF) == 0)
2537 dspImmedEXVAL >>= 16;
2541 if (force_imm == NUM_FORCE_SHORT)
2543 if (dspImmedEXVAL < 0xFF && (int32_t)dspImmedEXVAL > -0x100)
2546 // value fits in 8 bits - immediate move
2547 inst = B16(00100000, 00000000) + (immreg << 8) + (uint32_t)dspImmedEXVAL;
2552 if (optim_warn_flag)
2553 warn("forced short immediate value doesn't fit in 8 bits - switching to long");
2554 force_imm = NUM_FORCE_LONG;
2558 if (force_imm == NUM_FORCE_LONG)
2562 // X or Y Data move. I don't think it matters much
2563 // which of the two it will be, so let's use X.
2564 deposit_immediate_long_with_register:
2565 inst = B16(01000000, 11110100);
2566 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
2567 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2571 if (((int32_t)dspImmedEXVAL < 0x100) && ((int32_t)dspImmedEXVAL >= -0x100))
2573 // value fits in 8 bits - immediate move
2574 deposit_immediate_short_with_register:
2575 inst = B16(00100000, 00000000) + (immreg << 8) + (uint32_t)dspImmedEXVAL;
2580 // value doesn't fit in 8 bits, so it can either be
2581 // X or Y Data move. I don't think it matters much
2582 // which of the two it will be, so let's use X:.
2583 // TODO: if we're just goto'ing perhaps the logic can be simplified
2584 goto deposit_immediate_long_with_register;
2589 if (force_imm != NUM_FORCE_SHORT)
2592 // TODO: if we're just goto'ing perhaps the logic can be simplified
2593 goto deposit_immediate_long_with_register;
2598 // No visibility of the number so let's add a fixup for this
2599 AddFixup(FU_DSPIMM8, sloc, dspImmedEXPR);
2600 inst = B16(00100000, 00000000);
2601 inst |= ((immreg & 0x18) << (11 - 3)) + ((immreg & 7) << 8);
2609 if (dspImmedEXATTR & DEFINED)
2611 double f = *(double *)&dspImmedEXVAL;
2612 // Check direct.c for ossom comments regarding conversion!
2613 //N.B.: This is bogus, we need to fix this so it does this the right way... !!! FIX !!!
2614 dspImmedEXVAL = ((uint32_t)(int32_t)round(f * (1 << 23))) & 0xFFFFFF;
2619 if ((dspImmedEXVAL & 0xFFFF) == 0)
2621 // Value's 16 lower bits are not set so the value can
2622 // fit in a single byte (check parallel I move quoted
2624 if (optim_warn_flag)
2625 warn("Immediate value fits inside 8 bits, so using instruction short format");
2627 dspImmedEXVAL >>= 16;
2628 goto deposit_immediate_short_with_register;
2631 if (force_imm == NUM_FORCE_SHORT)
2633 if ((dspImmedEXVAL & 0xFFFF) != 0)
2635 if (optim_warn_flag)
2636 warn("Immediate value short format forced but value does not fit inside 8 bits - switching to long format");
2638 goto deposit_immediate_long_with_register;
2641 return error("internal assembler error: we haven't implemented floating point constants in parallel mode parser yet!");
2644 // If we reach here we either have NUM_FORCE_LONG or nothing, so we might as well store a long.
2645 goto deposit_immediate_long_with_register;
2649 if (force_imm == NUM_FORCE_SHORT)
2651 goto deposit_immediate_short_with_register;
2655 // Just deposit a float fixup
2656 AddFixup(FU_DSPIMMFL8, sloc, dspImmedEXPR);
2657 inst = B16(00100000, 00000000);
2658 inst |= ((immreg & 0x18) << (12 - 3)) + ((immreg & 7) << 8);
2666 // At this point we can only have '#xxxxxx,D1 S2,D2' (X:R Class I)
2669 case 4: D1 = 0 << 10;break; // X0
2670 case 5: D1 = 1 << 10;break; // X1
2671 case 14: D1 = 2 << 10;break; // A
2672 case 15: D1 = 3 << 10;break; // B
2673 default: return error("unrecognised X:R parallel move syntax: D1 can only be x0,x1,a,b in '#xxxxxx,D1 S2,D2'"); break;
2678 case KW_A: S2 = 0 << 9; break;
2679 case KW_B: S2 = 1 << 9; break;
2680 default: return error("unrecognised X:R parallel move syntax: S2 can only be A or B in '#xxxxxx,D1 S2,D2'"); break;
2684 return error("unrecognised X:R parallel move syntax: expected comma after '#xxxxxx,D1 S2'");
2688 case KW_Y0: D2 = 0 << 8; break;
2689 case KW_Y1: D2 = 1 << 8; break;
2690 default: return error("unrecognised X:R parallel move syntax: D2 can only be Y0 or Y1 in '#xxxxxx,D1 S2,D2'"); break;
2694 return error("unrecognised X:R parallel move syntax: expected end-of-line after '#xxxxxx,D1 S2,D2'");
2696 inst = B16(00010000, 10110100) | D1 | S2 | D2;
2697 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2701 else if (*tok == KW_X)
2704 // Hey look, it's just the register X and not the addressing mode - fall through to general case
2705 goto parse_everything_else;
2710 return error("expected ':' after 'X' in parallel move (i.e. X:)");
2712 // 'X:ea,D' or 'X:aa,D' or 'X:ea,D1 S2,D2' or 'X:eax,D1 Y:eay,D2' or 'X:eax,D1 S2,Y:eay'
2713 return parse_x(1, B16(01000000, 00000000), 0, 1);
2715 else if (*tok == KW_Y)
2718 // Hey look, it's just the register y and not the addressing mode - fall through to general case
2719 goto parse_everything_else;
2724 return error("expected ':' after 'Y' in parallel move (i.e. Y:)");
2726 // 'Y:ea,D' or 'Y:aa,D'
2727 return parse_y(B16(01001000, 10000000), 0, 0, 0);
2729 else if (*tok == KW_L)
2731 // 'L:ea,D' or 'L:aa,D'
2734 return error("expected ':' after 'L' in parallel move (i.e. L:)");
2736 return parse_l(1, B16(01000000, 11000000), 0);
2738 else if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2) || (*tok >= KW_A10 && *tok <= KW_BA))
2740 // Everything else - brace for impact!
2742 // X: 'S,X:ea' 'S,X:aa'
2743 // X:R 'S,X:ea S2,D2' 'A,X:ea X0,A' 'B,X:ea X0,B'
2744 // Y: 'S,Y:ea' 'S,Y:aa'
2745 // R:Y: 'S1,D1 Y:ea,D2' 'S1,D1 S2,Y:ea' 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' 'S1,D1 #xxxxxx,D2' 'Y0,A A,Y:ea' 'Y0,B B,Y:ea'
2746 // L: 'S,L:ea' 'S,L:aa'
2748 parse_everything_else:
2753 return error("Comma expected after 'S')");
2757 // 'S,X:ea' 'S,X:aa' 'S,X:ea S2,D2' 'S1,X:eax Y:eay,D2' 'S1,X:eax S2,Y:eay'
2758 // 'A,X:ea X0,A' 'B,X:ea X0,B'
2762 return error("unrecognised X: parallel move syntax: expected ':' after 'S,X'");
2764 return parse_x(0, B16(01000000, 00000000), S1, 1);
2766 else if (*tok == KW_Y)
2768 // 'S,Y:ea' 'S,Y:aa'
2772 return error("unrecognised Y: parallel move syntax: expected ':' after 'S,Y'");
2774 return parse_y(B16(0000000, 00000000), S1, 0, 0);
2776 else if (*tok == KW_L)
2778 // 'S,L:ea' 'S,L:aa'
2782 return error("unrecognised L: parallel move syntax: expected ':' after 'S,L'");
2784 return parse_l(1, B16(00000000, 00000000), L_S1);
2786 else if ((*tok >= KW_X0 && *tok <= KW_N7) || (*tok >= KW_R0 && *tok <= KW_R7) || (*tok >= KW_A0 && *tok <= KW_A2))
2789 // 'S1,D1 Y:ea,D2' 'S1,D1 S2,Y:ea' 'S1,D1 #xxxxxx,D2'
2790 // 'Y0,A A,Y:ea' 'Y0,B B,Y:ea'
2796 inst = B16(00100000, 00000000);
2797 inst |= (S1 << 5) | (D1);
2800 else if (*tok == KW_Y)
2805 return error("expected ':' after 'Y' in parallel move (i.e. Y:)");
2806 return parse_y(B16(00010000, 01000000), S1, D1, 0);
2809 else if (*tok == KW_A || *tok == KW_B || *tok == KW_Y0 || *tok == KW_Y1)
2811 // 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' 'S1,D1 S2,Y:ea'
2814 if (S1 == 6 && D1 == 14 && S2 == 14)
2818 return error("unrecognised Y: parallel move syntax: expected ',' after Y0,A A");
2821 return error("unrecognised Y: parallel move syntax: expected 'Y' after Y0,A A,");
2824 return error("unrecognised Y: parallel move syntax: expected ':' after Y0,A A,Y");
2826 ea1 = checkea_full(EOL, Y_ERRORS);
2831 inst = B16(00001000, 10000000);
2836 else if (S1 == 6 && D1 == 15 && S2 == 15)
2840 return error("unrecognised Y: parallel move syntax: expected ',' after Y0,B B");
2843 return error("unrecognised Y: parallel move syntax: expected 'Y' after Y0,B B,");
2846 return error("unrecognised Y: parallel move syntax: expected ':' after Y0,B B,Y");
2848 ea1 = checkea_full(EOL, Y_ERRORS);
2853 inst = B16(00001000, 10000000);
2858 else if ((S1 == 14 || S1 == 15) && (D1 == 4 || D1 == 5) && (S2 == 6 || S2 == 7 || S2 == 14 || S2 == 15))
2862 return error("unrecognised Y: parallel move syntax: expected ',' after S1,D1 S2");
2865 return error("unrecognised Y: parallel move syntax: expected 'Y' after S1,D1 S2,");
2868 return error("unrecognised Y: parallel move syntax: expected ':' after S1,D1 S2,Y");
2870 ea1 = checkea_full(EOL, Y_ERRORS);
2875 inst = B16(00010000, 01000000);
2876 inst |= (S1 & 1) << 11;
2877 inst |= (D1 & 1) << 10;
2878 inst |= ((S2 & 8) << (10 - 4)) | ((S2 & 1) << 8);
2883 return error("unrecognised Y: parallel move syntax: only 'Y0,A A,Y:ea' 'Y0,B B,Y:ea' allowed'");
2886 else if (*tok == '#')
2888 // R:Y: 'S1,D1 #xxxxxx,D2'
2893 // Well, forcing an immediate to be 24 bits is legal here
2894 // but then it's the only available option so my guess is that this
2895 // is simply superfluous. So let's just eat the character
2899 if (expr(dspaaEXPR, &dspaaEXVAL, &dspaaEXATTR, &dspaaESYM) != OK)
2902 if ((dspImmedEXATTR & DEFINED) && (dspImmedEXVAL > 0xFFFFFF))
2903 return error("immediate is bigger than $FFFFFF");
2905 deposit_extra_ea = DEPOSIT_EXTRA_WORD;
2908 return error("Comma expected after 'S1,D1 #xxxxxx')");
2910 // S1 is a or b, D1 is x0 or x1 and d2 is y0, y1, a or b
2913 case KW_Y0: D2 = 0 << 8; break;
2914 case KW_Y1: D2 = 1 << 8; break;
2915 case KW_A: D2 = 2 << 8; break;
2916 case KW_B: D2 = 3 << 8; break;
2917 default: return error("unrecognised R:Y: parallel move syntax: D2 must be y0, y1, a or b in 'S1,D1 #xxxxxx,D2'");
2920 if (S1 == 14 || S1 == 15)
2922 if (D1 == 4 || D1 == 5)
2924 inst = B16(00010000, 11110100);
2925 inst |= (S1 & 1) << 11;
2926 inst |= (D1 & 1) << 10;
2928 dspImmedEXVAL = dspaaEXVAL;
2932 return error("unrecognised R:Y: parallel move syntax: D1 must be x0 or x1 in 'S1,D1 #xxxxxx,D2'");
2935 return error("unrecognised R:Y: parallel move syntax: S1 must be a or b in 'S1,D1 #xxxxxx,D2'");
2938 return error("unrecognised R:Y: parallel move syntax: Unexpected text after S,D in 'S1,D1 #xxxxxx,D2'");
2941 return error("unrecognised R:Y: parallel move syntax: Unexpected text after 'S,'");
2943 else if (*tok == '(')
2946 // U 'ea' can only be '(Rn)-Nn', '(Rn)+Nn', '(Rn)-' or '(Rn)+'
2949 if (*tok >= KW_R0 && *tok <= KW_R7)
2951 ea1 = (*tok++ - KW_R0);
2954 return error("unrecognised U parallel move syntax: expected 'Rn' after '('");
2957 return error("unrecognised U parallel move syntax: expected ')' after '(Rn'");
2966 else if (*tok >= KW_N0 && *tok <= KW_N7)
2969 if ((*tok++ & 7) != ea1)
2970 return error("unrecognised U parallel move syntax: Same register number expected for Rn, Nn in '(Rn)+Nn')");
2975 return error("unrecognised U parallel move syntax: expected End-Of-Line after '(Rn)+Nn'");
2978 return error("unrecognised U parallel move syntax: expected End-Of-Line or 'Nn' after '(Rn)+'");
2980 else if (*tok == '-')
2990 else if (*tok >= KW_N0 && *tok <= KW_N7)
2993 if ((*tok++ & 7) != ea1)
2994 return error("unrecognised U parallel move syntax: Same register number expected for Rn, Nn in '(Rn)-Nn')");
2999 return error("unrecognised U parallel move syntax: expected End-Of-Line after '(Rn)-Nn'");
3003 inst = B16(00100000, 01000000);
3008 return error("extra (unexpected) text found");