1 According to this, the HD63701 is equivalent to a 6808! Joy! Or is it... Hmm...
2 #if (HAS_M6800 || HAS_M6801 || HAS_M6802 || HAS_M6803 || HAS_M6808 || HAS_HD63701)
3 #include "cpu/m6800/m6800.h"
6 roms R1-R2 contain 6809 instructions (32K)
8 rom R3 contains 4 8K chunks. Mapped to CPU #2 ($6000-7FFF. BS is at $D803.)
10 rom R4 contains 2 16K chunks. Mapped to CPU #2? (32K)
11 Possibly only seen by custom IC. Possibly music data.
13 rom R5 contains character data encoded hi nibble/lo nibble
14 in an array of 2x8 bytes. (overlap determines 3rd color + 1x8 bytes from R6
15 determine 4 more colors [3 bit color]) (32K, 16K, 64K, 32K)
17 roms R5,6 & R7,8 contain character data encoded hi/lo nibble, bits
20 roms R9-R16 contain sprite data in 4-bit encoded pixels,
21 in an array of 8x16 bytes. (16x16 pixels) (all following are 64K)
23 roms R17-R20 contain screen tile data (mapped to $6000-7FFF of CPU #1.
24 Bank switch is at $6600. 32 8K chunks)
25 roms R21-R22 contain PCM sample data (encoded 8 bits at 5512.5 Hz)
27 Char matrix is 36x28 (Text mode)
29 -> CMOS seems to be mapped to $5400 in RAM1...
39 $8A14 (ROM1) is the start of the routine that puts the self-test text on
41 $89E2 (ROM1) is entry point for self-test routine, w/0-4 in $542B (# of
44 Dipswitch 1&2 are mapped to $423D-4C, $424D-5C (odds only)
45 $4268 is mapped to the test pattern switch
46 $423D is self-test switch
48 $4000-?(maybe to 40FF) seems to be involved with sprite processing.
49 $4900 seems to be sprite address (to start. Normally $FF, but then $60)
50 First byte seems to be an enable (16 bytes per sprite?)
51 $4400-441F is Albatross sprite (32 bytes per sprite?)
52 $9000-9002, 9004-9006, 9400-9402, 9404-9406 are screen base addresses.
53 Initial values are: 020C, 060E, 0A0B, 0E0D (inc/dec by 2s, except last)
54 Scr initial offsets are 0118, 1118, 2118, 3208
55 $6800 is bank switch for CPU #1 (32 8K banks)
56 $D803 is bank switch for CPU #2 (4 8K banks)
57 $6000, 6200, 6400, 6600 are voice. 6200 & 6600 are sample # to play,
58 6000 & 6400 are the strobe lines.
62 CPU #1's stack is mapped to $5FFF, #2 to $43FF
65 1-1: On-self test, off-normal
66 1-2 & 1-3: 00-1coin1credit (left)
70 1-4: on-no attract sound, off-sound
71 1-5: Factory use only-always off, never on
72 1-6: Screen Hold-off normal, on hold
73 1-7 & 1-8: coin per credit (right)
78 2-1: Number of Lives-off 3, on 5
79 2-2: Bonus lives-off 70K/200K, on 100K/300K
80 2-3: Timer: off 120, on 150
81 2-4: Difficulty-off Normal, on easy
82 2-5: select level-off no, on yes
83 2-6 & 2-7: Cabinet type
85 01 Type B(cocktail, no flip)
87 11 Type C(cocktail, flip)
88 2-8: Continuation-off 6 games max, on 3 games max
91 Date: Thu, 30 Jul 1998 18:45:51 -0500
92 From: Lee Saito <ksaito@concentric.net>
93 To: Jimmy Hamm <jlhamm@pacificnet.net>
94 Subject: Re: Rolling Thunder clock freqs
98 > >> I need to know the clock frequency and IRQ frequency of both processors,
100 > >> if you could look at the E and Q lines (pins 34 and 35 of the 6809s) and
102 > >> IRQ lines (pin 3 of the 6809s) that would be great!
105 OK. I'm looking at the signals now...
107 First, processor at 11A:
109 pin 3 (IRQ line): Pulses vary in duration, making it somewhat difficult to
110 determine frequency, but it's about 60 Hz (around 16 -17ms per pulse, 60Hz
111 would be 16.6ms, I think) This seems to be tied to the sound processor?
112 (pulses get real short when no sounds are playing)
114 pin 35: approx 650 ns/cycle = 1.538 MHz
116 pin 34: same as 35 (1.538 Mhz)
120 Pin 3: Same as 11A (looks like 60Hz to me)
122 Pin 35: Same as other processor (1.538 MHz)
124 pin 34: Same as other processor (1.538 MHz)