2 // DAC (really, Synchronous Serial Interface) Handler
4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Caz (BeOS)
6 // Rewritten by James Hammons
7 // (C) 2010 Underground Software
9 // JLH = James Hammons <jlhamm@acm.org>
12 // --- ---------- -------------------------------------------------------------
13 // JLH 01/16/2010 Created this log ;-)
14 // JLH 04/30/2012 Changed SDL audio handler to run JERRY
17 // Need to set up defaults that the BIOS sets for the SSI here in DACInit()... !!! FIX !!!
18 // or something like that... Seems like it already does, but it doesn't seem to
19 // work correctly...! Perhaps just need to set up SSI stuff so BUTCH doesn't get
22 // After testing on a real Jaguar, it seems clear that the I2S interrupt drives
23 // the audio subsystem. So while you can drive the audio at a *slower* rate than
24 // set by SCLK, you can't drive it any *faster*. Also note, that if the I2S
25 // interrupt is not enabled/running on the DSP, then there is no audio. Also,
26 // audio can be muted by clearing bit 8 of JOYSTICK (JOY1).
28 // Approach: We can run the DSP in the host system's audio IRQ, by running the
29 // DSP for the alloted time (depending on the host buffer size & sample rate)
30 // by simply reading the L/R_I2S (L/RTXD) registers at regular intervals. We
31 // would also have to time the I2S/TIMER0/TIMER1 interrupts in the DSP as well.
32 // This way, we can run the host audio IRQ at, say, 48 KHz and not have to care
33 // so much about SCLK and running a separate buffer and all the attendant
34 // garbage that comes with that awful approach.
36 // There would still be potential gotchas, as the SCLK can theoretically drive
37 // the I2S at 26590906 / 2 (for SCLK == 0) = 13.3 MHz which corresponds to an
38 // audio rate 416 KHz (dividing the I2S rate by 32, for 16-bit stereo). It
39 // seems doubtful that anything useful could come of such a high rate, and we
40 // can probably safely ignore any such ridiculously high audio rates. It won't
41 // sound the same as on a real Jaguar, but who cares? :-)
52 #include "m68000/m68kinterface.h"
59 #define BUFFER_SIZE 0x10000 // Make the DAC buffers 64K x 16 bits
60 #define DAC_AUDIO_RATE 48000 // Set the audio rate to 48 KHz
62 // Jaguar memory locations
69 #define SMODE 0xF1A154
73 // These are defined in memory.h/cpp
74 //uint16_t lrxd, rrxd; // I2S ports (into Jaguar)
78 static SDL_AudioSpec desired;
79 static bool SDLSoundInitialized;
80 static uint8_t SCLKFrequencyDivider = 19; // Default is roughly 22 KHz (20774 Hz in NTSC mode)
81 /*static*/ uint16_t serialMode = 0;
83 // Private function prototypes
85 void SDLSoundCallback(void * userdata, Uint8 * buffer, int length);
86 void DSPSampleCallback(void);
90 // Initialize the SDL sound system
94 SDLSoundInitialized = false;
96 // if (!vjs.audioEnabled)
99 WriteLog("DAC: DSP/host audio playback disabled.\n");
103 desired.freq = DAC_AUDIO_RATE;
104 desired.format = AUDIO_S16SYS;
105 desired.channels = 2;
106 desired.samples = 2048; // 2K buffer = audio delay of 42.67 ms (@ 48 KHz)
107 desired.callback = SDLSoundCallback;
109 if (SDL_OpenAudio(&desired, NULL) < 0) // NULL means SDL guarantees what we want
110 WriteLog("DAC: Failed to initialize SDL sound...\n");
113 SDLSoundInitialized = true;
115 SDL_PauseAudio(false); // Start playback!
116 WriteLog("DAC: Successfully initialized. Sample rate: %u\n", desired.freq);
119 ltxd = lrxd = desired.silence;
121 uint32_t riscClockRate = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
122 uint32_t cyclesPerSample = riscClockRate / DAC_AUDIO_RATE;
123 WriteLog("DAC: RISC clock = %u, cyclesPerSample = %u\n", riscClockRate, cyclesPerSample);
128 // Reset the sound buffer FIFOs
132 // LeftFIFOHeadPtr = LeftFIFOTailPtr = 0, RightFIFOHeadPtr = RightFIFOTailPtr = 1;
133 ltxd = lrxd = desired.silence;
138 // Pause/unpause the SDL audio thread
140 void DACPauseAudioThread(bool state/*= true*/)
142 SDL_PauseAudio(state);
147 // Close down the SDL sound subsystem
151 if (SDLSoundInitialized)
153 SDL_PauseAudio(true);
157 WriteLog("DAC: Done.\n");
161 // Approach: Run the DSP for however many cycles needed to correspond to whatever sample rate
162 // we've set the audio to run at. So, e.g., if we run it at 48 KHz, then we would run the DSP
163 // for however much time it takes to fill the buffer. So with a 2K buffer, this would correspond
164 // to running the DSP for 0.042666... seconds. At 26590906 Hz, this would correspond to
165 // running the DSP for 1134545 cycles. You would then sample the L/RTXD registers every
166 // 1134545 / 2048 = 554 cycles to fill the buffer. You would also have to manage interrupt
167 // timing as well (generating them at the proper times), but that shouldn't be too difficult...
168 // If the DSP isn't running, then fill the buffer with L/RTXD and exit.
171 // SDL callback routine to fill audio buffer
173 // Note: The samples are packed in the buffer in 16 bit left/16 bit right pairs.
174 // Also, length is the length of the buffer in BYTES
176 static Uint8 * sampleBuffer;
177 static int bufferIndex = 0;
178 static int numberOfSamples = 0;
179 static bool bufferDone = false;
180 void SDLSoundCallback(void * userdata, Uint8 * buffer, int length)
182 // 1st, check to see if the DSP is running. If not, fill the buffer with L/RXTD and exit.
186 for(int i=0; i<(length/2); i+=2)
188 ((uint16_t *)buffer)[i + 0] = ltxd;
189 ((uint16_t *)buffer)[i + 1] = rtxd;
195 // The length of time we're dealing with here is 1/48000 s, so we multiply this
196 // by the number of cycles per second to get the number of cycles for one sample.
197 uint32_t riscClockRate = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
198 uint32_t cyclesPerSample = riscClockRate / DAC_AUDIO_RATE;
199 // This is the length of time
200 // timePerSample = (1000000.0 / (double)riscClockRate) * ();
202 // Now, run the DSP for that length of time for each sample we need to make
205 sampleBuffer = buffer;
206 numberOfSamples = length / 2;
209 SetCallbackTime(DSPSampleCallback, 1000000.0 / (double)DAC_AUDIO_RATE, EVENT_JERRY);
211 // These timings are tied to NTSC, need to fix that in event.cpp/h!
214 double timeToNextEvent = GetTimeToNextEvent(EVENT_JERRY);
218 if (vjs.usePipelinedDSP)
219 DSPExecP2(USEC_TO_RISC_CYCLES(timeToNextEvent));
221 DSPExec(USEC_TO_RISC_CYCLES(timeToNextEvent));
224 HandleNextEvent(EVENT_JERRY);
230 void DSPSampleCallback(void)
232 ((uint16_t *)sampleBuffer)[bufferIndex + 0] = ltxd;
233 ((uint16_t *)sampleBuffer)[bufferIndex + 1] = rtxd;
236 if (bufferIndex == numberOfSamples)
242 SetCallbackTime(DSPSampleCallback, 1000000.0 / (double)DAC_AUDIO_RATE, EVENT_JERRY);
248 // Calculate the frequency of SCLK * 32 using the divider
250 int GetCalculatedFrequency(void)
252 int systemClockFrequency = (vjs.hardwareTypeNTSC ? RISC_CLOCK_RATE_NTSC : RISC_CLOCK_RATE_PAL);
254 // We divide by 32 here in order to find the frequency of 32 SCLKs in a row (transferring
255 // 16 bits of left data + 16 bits of right data = 32 bits, 1 SCLK = 1 bit transferred).
256 return systemClockFrequency / (32 * (2 * (SCLKFrequencyDivider + 1)));
262 // LTXD/RTXD/SCLK/SMODE ($F1A148/4C/50/54)
264 void DACWriteByte(uint32_t offset, uint8_t data, uint32_t who/*= UNKNOWN*/)
266 WriteLog("DAC: %s writing BYTE %02X at %08X\n", whoName[who], data, offset);
267 if (offset == SCLK + 3)
268 DACWriteWord(offset - 3, (uint16_t)data);
272 void DACWriteWord(uint32_t offset, uint16_t data, uint32_t who/*= UNKNOWN*/)
274 if (offset == LTXD + 2)
278 else if (offset == RTXD + 2)
282 else if (offset == SCLK + 2) // Sample rate
284 WriteLog("DAC: Writing %u to SCLK...\n", data);
286 if ((uint8_t)data != SCLKFrequencyDivider)
287 SCLKFrequencyDivider = (uint8_t)data;
289 else if (offset == SMODE + 2)
292 WriteLog("DAC: %s writing to SMODE. Bits: %s%s%s%s%s%s [68K PC=%08X]\n", whoName[who],
293 (data & 0x01 ? "INTERNAL " : ""), (data & 0x02 ? "MODE " : ""),
294 (data & 0x04 ? "WSEN " : ""), (data & 0x08 ? "RISING " : ""),
295 (data & 0x10 ? "FALLING " : ""), (data & 0x20 ? "EVERYWORD" : ""),
296 m68k_get_reg(NULL, M68K_REG_PC));
302 // LRXD/RRXD/SSTAT ($F1A148/4C/50)
304 uint8_t DACReadByte(uint32_t offset, uint32_t who/*= UNKNOWN*/)
306 // WriteLog("DAC: %s reading byte from %08X\n", whoName[who], offset);
311 //static uint16_t fakeWord = 0;
312 uint16_t DACReadWord(uint32_t offset, uint32_t who/*= UNKNOWN*/)
314 // WriteLog("DAC: %s reading word from %08X\n", whoName[who], offset);
316 // WriteLog("DAC: %s reading WORD %04X from %08X\n", whoName[who], fakeWord, offset);
317 // return fakeWord++;
318 //NOTE: This only works if a bunch of things are set in BUTCH which we currently don't
319 // check for. !!! FIX !!!
320 // Partially fixed: We check for I2SCNTRL in the JERRY I2S routine...
321 // return GetWordFromButchSSI(offset, who);
322 if (offset == LRXD || offset == RRXD)
324 else if (offset == LRXD + 2)
326 else if (offset == RRXD + 2)
329 return 0xFFFF; // May need SSTAT as well... (but may be a Jaguar II only feature)